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Merge pull request #446 from UweBonnes/stm32f730_h750 

Handle STM32F730 and STM32H750.
This commit is contained in:
UweBonnes 2019-02-21 20:18:19 +01:00 committed by GitHub
parent a3bbdc26c0 56fb0f7766
commit dcd20ef08c
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GPG Key ID: 4AEE18F83AFDEB23
2 changed files with 17 additions and 6 deletions
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13
src/target/stm32f4.c
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@ -339,12 +339,17 @@ static bool stm32f4_attach(target *t)
remains = banksize - 0x20000; /* 128 k in small sectors.*/ remains = banksize - 0x20000; /* 128 k in small sectors.*/
if (is_f7) { if (is_f7) {
stm32f4_add_flash(t, ITCM_BASE, 0x10000, 0x4000, 0, split); stm32f4_add_flash(t, ITCM_BASE, 0x10000, 0x4000, 0, split);
stm32f4_add_flash(t, 0x0210000, 0x10000, 0x10000, 4, split); if (banksize > 0x10000) {
stm32f4_add_flash(t, 0x0220000, remains, 0x20000, 5, split); /* STM32F730 has only 64 kiB flash! */
stm32f4_add_flash(t, 0x0210000, 0x10000, 0x10000, 4, split);
stm32f4_add_flash(t, 0x0220000, remains, 0x20000, 5, split);
}
} }
stm32f4_add_flash(t, 0x8000000, 0x10000, 0x4000, 0, split); stm32f4_add_flash(t, 0x8000000, 0x10000, 0x4000, 0, split);
stm32f4_add_flash(t, 0x8010000, 0x10000, 0x10000, 4, split); if (banksize > 0x10000) {
stm32f4_add_flash(t, 0x8020000, remains, 0x20000, 5, split); stm32f4_add_flash(t, 0x8010000, 0x10000, 0x10000, 4, split);
stm32f4_add_flash(t, 0x8020000, remains, 0x20000, 5, split);
}
if (use_dual_bank) { if (use_dual_bank) {
if (is_f7) { if (is_f7) {
uint32_t bk1 = ITCM_BASE + banksize; uint32_t bk1 = ITCM_BASE + banksize;

10
src/target/stm32h7.c
View File

@ -187,6 +187,14 @@ static bool stm32h7_attach(target *t)
uint32_t optsr = target_mem_read32(t, FPEC1_BASE + FLASH_OPTSR); uint32_t optsr = target_mem_read32(t, FPEC1_BASE + FLASH_OPTSR);
if (!(optsr & FLASH_OPTSR_IWDG1_SW)) if (!(optsr & FLASH_OPTSR_IWDG1_SW))
tc_printf(t, "Hardware IWDG running. Expect failure. Set IWDG1_SW!"); tc_printf(t, "Hardware IWDG running. Expect failure. Set IWDG1_SW!");
uint32_t flashsize = target_mem_read32(t, FLASH_SIZE_REG);
flashsize &= 0xffff;
if (flashsize == 128) { /* H750 has only 128 kByte!*/
stm32h7_add_flash(t, 0x8000000, FLASH_SECTOR_SIZE, FLASH_SECTOR_SIZE);
} else {
stm32h7_add_flash(t, 0x8000000, 0x100000, FLASH_SECTOR_SIZE);
stm32h7_add_flash(t, 0x8100000, 0x100000, FLASH_SECTOR_SIZE);
}
return true; return true;
} }
@ -213,8 +221,6 @@ bool stm32h7_probe(target *t)
target_add_ram(t, 0x32000000, 0x20000); /* AHB SRAM2, 128 k */ target_add_ram(t, 0x32000000, 0x20000); /* AHB SRAM2, 128 k */
target_add_ram(t, 0x34000000, 0x08000); /* AHB SRAM3, 32 k */ target_add_ram(t, 0x34000000, 0x08000); /* AHB SRAM3, 32 k */
target_add_ram(t, 0x38000000, 0x01000); /* AHB SRAM4, 32 k */ target_add_ram(t, 0x38000000, 0x01000); /* AHB SRAM4, 32 k */
stm32h7_add_flash(t, 0x8000000, 0x100000, FLASH_SECTOR_SIZE);
stm32h7_add_flash(t, 0x8100000, 0x100000, FLASH_SECTOR_SIZE);
return true; return true;
} }
return false; return false;