Cortex-M: Detect and handle flash patch revision.
According to ARM v7-M Architecture Reference Manual ARM DDI 0403E.b (ID120114)
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@ -89,6 +89,7 @@ struct cortexm_priv {
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uint8_t type;
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uint8_t size;
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} hw_watchpoint[CORTEXM_MAX_WATCHPOINTS];
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unsigned flash_patch_revision;
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unsigned hw_watchpoint_max;
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/* Breakpoint unit status */
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uint32_t hw_breakpoint[CORTEXM_MAX_BREAKPOINTS];
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@ -283,6 +284,7 @@ bool cortexm_attach(target *t)
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r = target_mem_read32(t, CORTEXM_FPB_CTRL);
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if (((r >> 4) & 0xf) < priv->hw_breakpoint_max) /* only look at NUM_COMP1 */
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priv->hw_breakpoint_max = (r >> 4) & 0xf;
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priv->flash_patch_revision = (r >> 28);
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priv->hw_watchpoint_max = CORTEXM_MAX_WATCHPOINTS;
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r = target_mem_read32(t, CORTEXM_DWT_CTRL);
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if ((r >> 28) > priv->hw_watchpoint_max)
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@ -637,10 +639,13 @@ static int cortexm_set_hw_bp(target *t, uint32_t addr)
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{
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ADIv5_AP_t *ap = adiv5_target_ap(t);
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struct cortexm_priv *priv = ap->priv;
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uint32_t val = addr & 0x1FFFFFFC;
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uint32_t val = addr;
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unsigned i;
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val |= (addr & 2)?0x80000000:0x40000000;
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if (priv->flash_patch_revision == 0) {
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val = addr & 0x1FFFFFFC;
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val |= (addr & 2)?0x80000000:0x40000000;
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}
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val |= 1;
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for(i = 0; i < priv->hw_breakpoint_max; i++)
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