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Cortex-M: Detect and handle flash patch revision. 

According to ARM v7-M Architecture Reference Manual
ARM DDI 0403E.b (ID120114)
This commit is contained in:
Uwe Bonnes 2015-08-20 20:33:38 +02:00
parent 51e2adc6d9
commit f7492d93be
1 changed files with 7 additions and 2 deletions
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7
src/cortexm.c
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@ -89,6 +89,7 @@ struct cortexm_priv {
uint8_t type; uint8_t type;
uint8_t size; uint8_t size;
} hw_watchpoint[CORTEXM_MAX_WATCHPOINTS]; } hw_watchpoint[CORTEXM_MAX_WATCHPOINTS];
unsigned flash_patch_revision;
unsigned hw_watchpoint_max; unsigned hw_watchpoint_max;
/* Breakpoint unit status */ /* Breakpoint unit status */
uint32_t hw_breakpoint[CORTEXM_MAX_BREAKPOINTS]; uint32_t hw_breakpoint[CORTEXM_MAX_BREAKPOINTS];
@ -283,6 +284,7 @@ bool cortexm_attach(target *t)
r = target_mem_read32(t, CORTEXM_FPB_CTRL); r = target_mem_read32(t, CORTEXM_FPB_CTRL);
if (((r >> 4) & 0xf) < priv->hw_breakpoint_max) /* only look at NUM_COMP1 */ if (((r >> 4) & 0xf) < priv->hw_breakpoint_max) /* only look at NUM_COMP1 */
priv->hw_breakpoint_max = (r >> 4) & 0xf; priv->hw_breakpoint_max = (r >> 4) & 0xf;
priv->flash_patch_revision = (r >> 28);
priv->hw_watchpoint_max = CORTEXM_MAX_WATCHPOINTS; priv->hw_watchpoint_max = CORTEXM_MAX_WATCHPOINTS;
r = target_mem_read32(t, CORTEXM_DWT_CTRL); r = target_mem_read32(t, CORTEXM_DWT_CTRL);
if ((r >> 28) > priv->hw_watchpoint_max) if ((r >> 28) > priv->hw_watchpoint_max)
@ -637,10 +639,13 @@ static int cortexm_set_hw_bp(target *t, uint32_t addr)
{ {
ADIv5_AP_t *ap = adiv5_target_ap(t); ADIv5_AP_t *ap = adiv5_target_ap(t);
struct cortexm_priv *priv = ap->priv; struct cortexm_priv *priv = ap->priv;
uint32_t val = addr & 0x1FFFFFFC; uint32_t val = addr;
unsigned i; unsigned i;
if (priv->flash_patch_revision == 0) {
val = addr & 0x1FFFFFFC;
val |= (addr & 2)?0x80000000:0x40000000; val |= (addr & 2)?0x80000000:0x40000000;
}
val |= 1; val |= 1;
for(i = 0; i < priv->hw_breakpoint_max; i++) for(i = 0; i < priv->hw_breakpoint_max; i++)