traceswoasync: Implement async swo for stm32.
Use for stlink. Uses dma with large buffer. Pull up swo to provide idle level on unconnected swo pin.
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93bc3a155a
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@ -26,6 +26,7 @@ SRC += cdcacm.c \
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serialno.c \
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timing.c \
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timing_stm32.c \
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traceswoasync.c \
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stlink_common.c \
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all: blackmagic.bin blackmagic_dfu.bin blackmagic_dfu.hex dfu_upgrade.bin dfu_upgrade.hex
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@ -68,6 +68,9 @@
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#define LED_PORT_UART GPIOC
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#define LED_UART GPIO14
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#define PLATFORM_HAS_TRACESWO 1
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#define NUM_TRACE_PACKETS (192) /* This is an 12K buffer */
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#define TMS_SET_MODE() \
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gpio_set_mode(TMS_PORT, GPIO_MODE_OUTPUT_50_MHZ, \
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GPIO_CNF_OUTPUT_PUSHPULL, TMS_PIN);
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@ -87,13 +90,12 @@
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#define USB_ISR usb_lp_can_rx0_isr
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/* Interrupt priorities. Low numbers are high priority.
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* For now USART2 preempts USB which may spin while buffer is drained.
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* TIM3 is used for traceswo capture and must be highest priority.
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*/
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#define IRQ_PRI_USB (2 << 4)
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#define IRQ_PRI_USBUSART (1 << 4)
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#define IRQ_PRI_USBUSART_TIM (3 << 4)
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#define IRQ_PRI_USB_VBUS (14 << 4)
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#define IRQ_PRI_TIM3 (0 << 4)
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#define IRQ_PRI_SWO_DMA (1 << 4)
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#define USBUSART USART2
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#define USBUSART_CR1 USART2_CR1
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@ -115,6 +117,20 @@ int usbuart_debug_write(const char *buf, size_t len);
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# define DEBUG(...)
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#endif
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/* On F103, only USART1 is on AHB2 and can reach 4.5 MBaud at 72 MHz.*/
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#define SWO_UART USART1
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#define SWO_UART_DR USART1_DR
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#define SWO_UART_CLK RCC_USART1
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#define SWO_UART_PORT GPIOA
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#define SWO_UART_RX_PIN GPIO10
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/* This DMA channel is set by the USART in use */
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#define SWO_DMA_BUS DMA1
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#define SWO_DMA_CLK RCC_DMA1
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#define SWO_DMA_CHAN DMA_CHANNEL5
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#define SWO_DMA_IRQ NVIC_DMA1_CHANNEL5_IRQ
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#define SWO_DMA_ISR(x) dma1_channel5_isr(x)
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extern uint16_t led_idle_run;
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#define LED_IDLE_RUN led_idle_run
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#define SET_RUN_STATE(state) {running_status = (state);}
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@ -0,0 +1,133 @@
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/*
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* This file is part of the Black Magic Debug project.
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*
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* Based on work that is Copyright (C) 2017 Black Sphere Technologies Ltd.
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* Copyright (C) 2017 Dave Marples <dave@marples.net>
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*
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* This program is free software: you can redistribute it and/or modify
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* it under the terms of the GNU General Public License as published by
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* the Free Software Foundation, either version 3 of the License, or
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* (at your option) any later version.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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* You should have received a copy of the GNU General Public License
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* along with this program. If not, see <http://www.gnu.org/licenses/>.
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*/
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/* This file implements capture of the TRACESWO output using ASYNC signalling.
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*
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* ARM DDI 0403D - ARMv7M Architecture Reference Manual
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* ARM DDI 0337I - Cortex-M3 Technical Reference Manual
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* ARM DDI 0314H - CoreSight Components Technical Reference Manual
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*/
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/* TDO/TRACESWO signal comes into the SWOUSART RX pin.
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*/
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#include "general.h"
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#include "cdcacm.h"
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#include "platform.h"
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#include <libopencmsis/core_cm3.h>
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#include <libopencm3/cm3/nvic.h>
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#include <libopencm3/stm32/timer.h>
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#include <libopencm3/stm32/f1/rcc.h>
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#include <libopencm3/stm32/usart.h>
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#include <libopencm3/stm32/dma.h>
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/* For speed this is set to the USB transfer size */
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#define FULL_SWO_PACKET (64)
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/* Default line rate....used as default for a request without baudrate */
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#define DEFAULTSPEED (2250000)
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static volatile uint32_t w; /* Packet currently received via UART */
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static volatile uint32_t r; /* Packet currently waiting to transmit to USB */
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/* Packets arrived from the SWO interface */
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static uint8_t trace_rx_buf[NUM_TRACE_PACKETS * FULL_SWO_PACKET];
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/* Packet pingpong buffer used for receiving packets */
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static uint8_t pingpong_buf[2 * FULL_SWO_PACKET];
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void trace_buf_drain(usbd_device *dev, uint8_t ep)
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{
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static volatile char inBufDrain;
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/* If we are already in this routine then we don't need to come in again */
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if (__atomic_test_and_set (&inBufDrain, __ATOMIC_RELAXED))
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return;
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/* Attempt to write everything we buffered */
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if ((w != r) && (usbd_ep_write_packet(dev, ep,
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&trace_rx_buf[r * FULL_SWO_PACKET],
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FULL_SWO_PACKET)))
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r =(r + 1) % NUM_TRACE_PACKETS;
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__atomic_clear (&inBufDrain, __ATOMIC_RELAXED);
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}
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void traceswo_setspeed(uint32_t baudrate)
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{
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dma_disable_channel(SWO_DMA_BUS, SWO_DMA_CHAN);
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usart_disable(SWO_UART);
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usart_set_baudrate(SWO_UART, baudrate);
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usart_set_databits(SWO_UART, 8);
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usart_set_stopbits(SWO_UART, USART_STOPBITS_1);
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usart_set_mode(SWO_UART, USART_MODE_RX);
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usart_set_parity(SWO_UART, USART_PARITY_NONE);
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usart_set_flow_control(SWO_UART, USART_FLOWCONTROL_NONE);
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/* Set up DMA channel*/
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dma_channel_reset(SWO_DMA_BUS, SWO_DMA_CHAN);
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dma_set_peripheral_address(SWO_DMA_BUS, SWO_DMA_CHAN,
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(uint32_t)&SWO_UART_DR);
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dma_set_read_from_peripheral(SWO_DMA_BUS, SWO_DMA_CHAN);
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dma_enable_memory_increment_mode(SWO_DMA_BUS, SWO_DMA_CHAN);
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dma_set_peripheral_size(SWO_DMA_BUS, SWO_DMA_CHAN, DMA_CCR_PSIZE_8BIT);
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dma_set_memory_size(SWO_DMA_BUS, SWO_DMA_CHAN, DMA_CCR_MSIZE_8BIT);
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dma_set_priority(SWO_DMA_BUS, SWO_DMA_CHAN, DMA_CCR_PL_HIGH);
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dma_enable_transfer_complete_interrupt(SWO_DMA_BUS, SWO_DMA_CHAN);
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dma_enable_half_transfer_interrupt(SWO_DMA_BUS, SWO_DMA_CHAN);
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dma_enable_circular_mode(SWO_DMA_BUS,SWO_DMA_CHAN);
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usart_enable(SWO_UART);
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nvic_enable_irq(SWO_DMA_IRQ);
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w = r = 0;
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dma_set_memory_address(SWO_DMA_BUS, SWO_DMA_CHAN, (uint32_t)pingpong_buf);
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dma_set_number_of_data(SWO_DMA_BUS, SWO_DMA_CHAN, 2 * FULL_SWO_PACKET);
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dma_enable_channel(SWO_DMA_BUS, SWO_DMA_CHAN);
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usart_enable_rx_dma(SWO_UART);
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}
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void SWO_DMA_ISR(void)
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{
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if (DMA_ISR(SWO_DMA_BUS) & DMA_ISR_HTIF(SWO_DMA_CHAN)) {
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DMA_IFCR(SWO_DMA_BUS) |= DMA_ISR_HTIF(SWO_DMA_CHAN);
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memcpy(&trace_rx_buf[w * FULL_SWO_PACKET], pingpong_buf,
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FULL_SWO_PACKET);
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}
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if (DMA_ISR(SWO_DMA_BUS) & DMA_ISR_TCIF(SWO_DMA_CHAN)) {
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DMA_IFCR(SWO_DMA_BUS) |= DMA_ISR_TCIF(SWO_DMA_CHAN);
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memcpy(&trace_rx_buf[w * FULL_SWO_PACKET],
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&pingpong_buf[FULL_SWO_PACKET], FULL_SWO_PACKET);
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}
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w = (w + 1) % NUM_TRACE_PACKETS;
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trace_buf_drain(usbdev, 0x85);
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}
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void traceswo_init(uint32_t baudrate)
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{
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if (!baudrate)
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baudrate = DEFAULTSPEED;
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rcc_periph_clock_enable(SWO_UART_CLK);
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rcc_periph_clock_enable(SWO_DMA_CLK);
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gpio_set_mode(SWO_UART_PORT, GPIO_MODE_INPUT,
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GPIO_CNF_INPUT_PULL_UPDOWN, SWO_UART_RX_PIN);
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/* Pull SWO pin high to keep open SWO line ind uart idle state!*/
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gpio_set(SWO_UART_PORT, SWO_UART_RX_PIN);
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nvic_set_priority(SWO_DMA_IRQ, IRQ_PRI_SWO_DMA);
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nvic_enable_irq(SWO_DMA_IRQ);
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traceswo_setspeed(baudrate);
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}
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