94afb264e4
command: Cleaned up and improved the naming of cmd_reset and cmd_connect_reset
2022-06-26 16:51:58 -07:00
12fefa73c9
platforms: Cleaned up and fixed many markdown lint errors, improving the formatting of many of the platform README's
2022-06-26 16:51:58 -07:00
0dae6a4019
misc: Renamed connect_assert_nrst to clarify usage and align naming
2022-06-26 16:51:58 -07:00
b226c53d13
misc: Renamed CORTEXM_TOPT_INHIBIT_NRST to clarify usage and align naming
2022-06-26 16:51:58 -07:00
5edf549b48
misc: Updated comments and READMEs to properly reflect pinouts and function
2022-06-26 16:51:58 -07:00
2eaa579965
platforms: NRST and TRST naming consistency
...
This aligns the nRST and nTRST pin naming with the bulk of the README's for the platforms along with the hardware
2022-06-26 16:51:58 -07:00
a8e12d716d
misc: Renamed platform_nrst_{get,set}_val to clarify naming and provide consistency
2022-06-26 16:51:58 -07:00
dbb7a81c0a
misc: Added a code of conduct based on the Contributors Covenant
2022-06-26 16:39:31 -07:00
bc9032da06
Fix uninitialized variables in target sam3x
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Exposed while building hosted with -Og option
2022-06-26 18:52:12 -04:00
0612f2dc79
hosted: Documented the new command line option and added it to the ZSH completions
2022-06-26 14:28:35 -07:00
52dcf46e61
command: Done a little cleanup of the formatting and layout
2022-06-26 14:28:35 -07:00
10a4c3f77e
hosted: Implemented the extra logic to implement auto-scan in the CLI
2022-06-26 14:28:35 -07:00
2aea7238af
command: Implemented the new 'auto_scan' command for the firmware
2022-06-26 14:28:35 -07:00
ce3544b206
hosted: Removed unwanted automatic switch over to JTAG when SWD scan fails
2022-06-26 14:28:35 -07:00
b713376ce7
hosted/cmsis_dap: Fixed the naming of the cmsis_type_e enum
2022-06-26 14:24:08 -07:00
07321a4114
ch32f1: Fixed another broken debug print that made assumptions about %x and %d that are wrong
2022-06-26 14:19:46 -07:00
680a009690
cortexm: Added additional debug information for part probing
2022-06-26 14:19:46 -07:00
b5b2d4dc95
ch32f1: Re-ordered a couple of the operation in ch32f1_probe so it plays nicer with the STM32 parts
2022-06-26 14:19:46 -07:00
0368b76078
ch32f1: Further formatting and layout cleanup
2022-06-26 14:19:46 -07:00
fbc87cc518
ch32f1: Fixed the probe routine distrubing state for other parts wrt `t->idcode`
...
The CH32F1 routine now reads the IDCode into a local.
If the part number matches and appears to be the chip (based on Flash locking), it only then writes the IDCode into `t->idcode`, which is at the point we can only `return true` from the probe routine anyway.
2022-06-26 14:19:46 -07:00
08a8988462
ch32f1: formatting cleanup to bring things closer to inline with the rest of the codebase
2022-06-26 14:19:46 -07:00
9aba7ecce2
Define the long options structure as const.
2022-06-26 17:08:32 -04:00
84408fef57
Remove unwanted whitespace
2022-06-26 17:08:32 -04:00
3495207980
Further help text updates
2022-06-26 17:08:32 -04:00
7edd4b3379
Textual corrections to help
2022-06-26 17:08:32 -04:00
39bf17b768
Add back code lost during recent rebase
2022-06-26 17:08:32 -04:00
7dd82418e0
Implement long options initial commit
2022-06-26 17:08:32 -04:00
6f38b844af
stm32/serialno: Fixed a regression in 24 character serial number suport which was causing them to display all 0's
2022-06-26 14:06:18 -07:00
4a0e373b49
stm32/serialno: Fixed a small regression that made it in with #1041 resulting in a transposition of alpha characters in serial numbers
2022-06-26 14:06:18 -07:00
2673e34ddd
cortexm: fixed an issue with watchpoint handling and a register sanity check
2022-06-26 13:44:45 -04:00
1009329882
stlinkv2: Treat STLINK_SWD_AP_FAULT after STLINK_ERROR_WAIT as STLINK_ERROR_WAIT
...
cortexm_initial_halt() repeats the DHCSR write with high values for TRNCNT in
CSW. This is needed to catch a STM32F7 mostly in WFI. While the repeated write
is running, STLINKV3 on a Nucleo-WL55 (V3J7M2B0S0) answers first with
STLINK_SWD_AP_WAIT and on more read if write command is still running with
STLINK_SWD_AP_FAULT. At some point when the last command is finished, normal
STLINK_ERROR_OK indicates finally successful read. Treat STLINK_SWD_AP_FAULT
after STLINK_ERROR_WAIT as STLINK_ERROR_WAIT in that case. STLINK_SWD_AP_FAULT
may still be issued on other invalid accesses and should still be treated as
error in the other possible cases. Fixes #1071 .
2022-06-26 12:08:23 -04:00
b1a02d4f48
Correct filenames in the rest of the files using cl_utils.h
2022-06-26 12:04:21 -04:00
664a91b254
Fix filename in cmsis_dap.c
2022-06-26 12:04:21 -04:00
8a86faf49d
Rename cl_utils.* to cli.*, and fix references
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File "serial_unix.c" edited but Linux build not done (Windows only dev environment)
2022-06-26 12:04:21 -04:00
0ebcba458d
Move all files from "pc" folder to "hosted", update Makefile.inc
2022-06-26 12:04:21 -04:00
fcae730bf8
Correct scanf format specifier
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Rather than casting here, use PRIu32 - as in "%" PRIu32 ".%" PRIu32 - it's undefined behaviour and quite illegal to do the cast as, depending on platform, you'll end up with only some of the bytes in units and tenths written and which ones and what that means will depend on endianess.
2022-06-26 12:02:41 -04:00
02d2ba98d5
Enable power control in BMPA and add required functions
2022-06-26 12:02:41 -04:00
80c98df2f9
stm32wxxx: CPU2 needs wake-up call and has unexpected PIDR4 in AP1
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"Single" core STM32WLE still sees AP1 but on first scan aborts gracefully
after some errors and on later runs sees AP1 as unusable. Fixes #832 .
Decode the Cross trigger interface found on CPU2 on STM32WBxx.
2022-06-25 16:52:36 -04:00
471ba19a77
adiv5.c: Read all CIDR data in one call.
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E.g on STM32WXXX AP1 with C2BOOT not set, the AP base registers have valid
values but reading them fails and turns the AP unusable. BMDA reading CIDR
with multiple calls will will loop and finally hang up BMD. Other target
devices may show similar behaviour.
Reading CIDR with a single call allows recovery from in that case and
additional spares target transactions.
2022-06-25 16:52:36 -04:00
14d3846663
gdb_main: Fix a formatting bug that breaks, among other things, breakpoints
2022-06-24 18:35:31 -07:00
d99ab22f95
readme: sample usage update
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Signed-off-by: Rafael Silva <perigoso@riseup.net>
2022-06-24 21:24:51 -04:00
e702afad69
rp: Clean up code a little bit
2022-06-24 20:44:00 -04:00
e67cb9f43c
rp: Update rp_get_flash_length algorithm
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Try to look for repeating sectors before reverting to reading the
JEDEC ID of the flash chip. This way we don't interrupt the flash
execution if a valid program is running, but can detect the flash
size if the flash memory has been erased.
2022-06-24 20:44:00 -04:00
f2cb13cf36
rp: Add rp_attach and rp_detach callbacks
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Query JEDEC ID of flash chip on attach to be able to decode flash
chip size.
2022-06-24 20:44:00 -04:00
354e37fbad
rp: Tidy up some other things
2022-06-24 20:44:00 -04:00
ce273889fc
rp: Refector rp_flash_write
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Fix typo in debug message
2022-06-24 20:44:00 -04:00
f4261c465e
rp: Refactor rp_flash_erase
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Always align erase length to 4k sector size.
Check that start address and length are actually inside the flash.
2022-06-24 20:44:00 -04:00
dd571467b5
target/sam: slight gpnvm command usage correctness
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Signed-off-by: Rafael Silva <perigoso@riseup.net>
2022-06-24 20:19:47 -04:00
d85e9fb7a2
hosted: Un-marked hid.c as exectuable as it can't be
2022-06-15 12:56:33 -04:00
14d7286db1
stlink: Added a little extra whitespace to help the readability of the platform header
2022-06-15 12:56:24 -04:00
dragonmux
SId Price
Maciej Musiał
Uwe Bonnes
Rafael Silva
James Turton