Commit Graph

9 Commits

Author SHA1 Message Date
Gareth McMullin 8b4342394f Overhaul of timeouts so they may be nested. 2016-06-28 14:35:43 +12:00
Gareth McMullin 90c0c28327 cortexa: Redirect read of PC through r0. MCR is unpredictable for r15. 2016-06-23 12:00:04 +12:00
Gareth McMullin 13602c5d85 cortexa: Also assert SRST to reset. 2016-04-20 12:55:12 -07:00
Gareth McMullin 68bf825042 cortexa: Disable interrupts while single stepping. 2016-04-20 11:35:58 -07:00
Gareth McMullin 88bf92ac36 cortexa: Fix write back of PC and CPSR. 2016-04-20 11:35:25 -07:00
Gareth McMullin 0ab878dcd2 cortexa: Add short delay after reset, before reattaching.
Allows the early bootloader to configure the DDR ram.
2016-04-19 13:29:22 -07:00
Gareth McMullin a2ec877b73 cortexa: Restore cache clean and invalidate on memory writes.
Include a small optimisation of APB access to speed up the process.
2016-04-19 13:24:05 -07:00
Gareth McMullin 49f89cfc95 cortexa: Fix detach.
Also pulls out internal register cache functions from halt/resume.
2016-04-19 13:24:05 -07:00
Gareth McMullin f6b574e0b0 Cortex-A target support. 2016-04-19 13:24:05 -07:00