Commit Graph

1060 Commits

Author SHA1 Message Date
Emil Fresk 1ee6d4503e Update to split 'special' into its sane parts (update from @mubes) 2018-03-24 16:44:59 +01:00
jrwhite 0ddd8b55d7 divide-by-zero fix 2018-03-11 14:35:38 -05:00
Konsgn 04fbabb299 mkl27 support 2018-01-21 23:43:01 -05:00
konsgn 1fe870b8df added MKL27<128kB support 2018-01-16 13:23:36 -05:00
Gareth McMullin a9219c3616
Merge pull request #314 from adamheinrich/usbuart-ignore-noise
platforms/stm32: Ignore noise errors on USBUART
2018-01-15 08:29:18 +13:00
Adam Heinrich f5cac4c78d platforms/stm32: Ignore noise errors on USBUART 2018-01-13 21:11:17 +01:00
Gareth McMullin dd055b675e
Merge pull request #313 from UweBonnes/stm32f3_ccm
stm32f1.c: Add missing fall through statement needed by GCC7.
2017-12-18 10:33:08 -08:00
Uwe Bonnes 922f857de7 stm32f1.c: Add missing fall through statement needed by GCC7. 2017-12-18 13:56:59 +01:00
Gareth McMullin a3484e3d3b
Merge pull request #311 from UweBonnes/f3_ccm
stm32f1.c: Export CCM RAM of F303.
2017-12-12 14:49:21 -08:00
Uwe Bonnes 1f3c235205 src/target/stm32f1.c: Add CCM Ram of STM32F303 devices. 2017-12-08 13:39:24 +01:00
Gareth McMullin 568655063f
Merge pull request #300 from gsmcmullin/m7-cache
Cache support for Cortex-M7
2017-11-07 08:44:56 +13:00
Gareth McMullin 048e8447a5 target: Only support buffered flash writes 2017-10-13 08:58:37 +13:00
Gareth McMullin c53a12bfd1 cortexm: Better cache support for Cortex-M7
- On probe, read CTR for cache presence and minimum line length
- Make D-Cache clean a function
- Clean before memory reads
- Clean and invalidate before memory writes
- Flush all I-Cache before resume
2017-10-12 09:26:01 +13:00
Nick Downing 0e5b3ab00e Make Cortex M driver write DCCIMVAC (Data cache clean and invalidate by address to the PoC=Point of Coherency) prior to reading or writing each 32 bytes of RAM 2017-10-12 08:41:58 +13:00
Gareth McMullin 9a5b31c37b Fix fallthrough warnings on gcc 7 2017-10-09 11:07:29 +13:00
Gareth McMullin 231d42d581 Merge pull request #297 from UweBonnes/write_size
target: Fix calculation of erase size.
2017-10-06 19:40:02 +13:00
Uwe Bonnes 120a2d9378 target: Fix calculation of erase size. 2017-10-05 22:11:01 +02:00
Gareth McMullin 5950d8f56c Merge pull request #293 from UweBonnes/write_size
target: Fix wrong size calculation for write.
2017-10-05 09:07:18 +13:00
Gareth McMullin ed8366813d Merge pull request #294 from UweBonnes/stm32_mem
stm32_mem: Really wait 5 seconds for DFU device to appear.
2017-10-05 09:03:09 +13:00
Uwe Bonnes dc29e45606 stm32_mem: Really wait 5 seconds for DFU device to appear. 2017-10-04 21:53:53 +02:00
Uwe Bonnes a7815fff3d target.c: No need to split write while still in same flash block. 2017-10-04 21:52:29 +02:00
Uwe Bonnes 25610e5ec5 target: Fix unconsistant use of tmplen. 2017-10-04 21:52:29 +02:00
Gareth McMullin 72c86f939e Merge pull request #296 from gsmcmullin/libftdi_tdi_tdo_fix
libftdi: Fix tdi_tdo_seq result unpacking
2017-10-05 08:32:08 +13:00
Gareth McMullin f27f3bad5c libftdi: Fix tdi_tdo_seq result unpacking 2017-10-05 08:26:33 +13:00
Gareth McMullin 2db42ba8e5 Merge pull request #287 from gsmcmullin/update_libopencm3
Update libopencm3
2017-10-04 10:58:44 +13:00
Gareth McMullin 19e58a7205 Merge pull request #284 from UweBonnes/stm32_mem
stm32_mem.py: Print longer strings and small formatting changes.
2017-10-03 10:41:04 +13:00
Uwe Bonnes 2b2b6d8f31 stm32_mem.py: Allow to set start address. 2017-10-02 21:30:56 +02:00
Uwe Bonnes 7cc9ee9d7a stm32_mem.py: Verify after write when bootloader supports upload
This should help people using STM32F103C8 above 64 k.
2017-10-02 21:30:56 +02:00
Uwe Bonnes 613208c939 stm32_mem: Allow to switch from dfu to application without flashing. 2017-10-02 21:30:56 +02:00
Uwe Bonnes c41dfaef9a stm32_mem.py: Run automatically after switching to DFU mode. 2017-10-02 21:30:56 +02:00
Uwe Bonnes 4f3f4cb898 stm32_mem.py: Deny to work with the STM DFU bootloader
To support the STM DFU bootloader, the interface descriptor needs to be
evaluated. Erase may only be called once per sector.
2017-10-02 21:30:56 +02:00
Uwe Bonnes 4c6f735452 stm32_mem.py: Handle multiple devices. 2017-10-02 21:30:56 +02:00
Gareth McMullin eb7547111a Merge pull request #285 from UweBonnes/f4_rework
F4 rework
2017-10-03 07:23:52 +13:00
Uwe Bonnes 0aa47113f3 stm32f4: Fix F4 dual bank OPTCR1 to option byte mapping. 2017-10-02 16:22:14 +02:00
Uwe Bonnes c4d3712b39 stm32f4.c: Rework flash structure recognition.
Dual bank devices do not have sectors (8)12..15 !
Dual banks devices need to MER1 set for mass erase.
F72x has different FLASHSIZE_BASE
2017-10-02 16:22:14 +02:00
Gareth McMullin 0ed66547d5 Fix libopencm3 breakage 2017-09-25 11:17:03 +13:00
Gareth McMullin f345cd24dc Update libopencm3 pointer 2017-09-25 10:04:05 +13:00
Gareth McMullin ad71db05b9 Merge pull request #283 from UweBonnes/rdi
Make ENABLE_DEBUG infrastucture available  and use for st- and swlink
2017-09-25 08:12:23 +13:00
Uwe Bonnes 4966168802 s[t|w]link: Implement ENABLE_DEBUG. 2017-09-23 16:40:28 +02:00
Uwe Bonnes ce1ef6e41b stm32: Move rdi handling to common stm32 code. 2017-09-23 16:39:35 +02:00
Gareth McMullin 98ab873784 Merge pull request #281 from UweBonnes/nucleo144
stlink: Use common initialization and detect V2.1 boards.
2017-09-23 10:36:46 +12:00
Uwe Bonnes 203f6702d8 Flashsize_F103: Options for BMP on STM32F103C8 devices 2017-09-21 23:05:20 +02:00
Uwe Bonnes 963df9febc stlink: Use common initialization and detect V2.1 boards.
Factor out hardware revision detection, USB detach and power settings, as
all three program (bootloader, bmp and dfu-upgrade) need it.
2017-09-21 18:43:06 +02:00
Gareth McMullin 16f99238b1 Merge pull request #279 from gsmcmullin/cortexa-softbreak-fault-check
cortexa: Check for fault on set/clear soft breakpoint.
2017-09-20 11:30:33 +12:00
Gareth McMullin 259f1b90df cortexa: Check for fault on set/clear soft breakpoint. 2017-09-20 11:16:36 +12:00
Gareth McMullin eaaa7d2cc2 Merge pull request #276 from gsmcmullin/cortexa-remove-ahb
cortexa: Remove problematic code for AHB access.
2017-09-20 08:13:04 +12:00
Gareth McMullin 1cb4271749 cortexa: Remove problematic code for AHB access.
The old code for 'fast' memory accesses using the AHB directly
has problems with data consitency.  Until this can be resolved, I'm
removing the affected code.
2017-09-19 09:13:22 +12:00
Gareth McMullin eb46994bc9 Merge pull request #277 from gsmcmullin/travis_pip
Travis: Call pip with `--user`
2017-09-12 13:03:49 +12:00
Gareth McMullin 4af7a05249 Travis: Call pip with `--user` 2017-09-12 12:57:51 +12:00
Gareth McMullin 2df0c7d6a7 Merge pull request #261 from cpavlina/tm4c
lm3s/tm4c: add TM4C1230C3PM
2017-09-06 15:34:42 +12:00