 Triss
|
83d3dfd8cf
|
DAC powered by VBUS, VBUS to ADC2
|
2022-02-20 21:22:26 +01:00 |
|
Triss
|
a800ff401d
|
almost there
|
2022-02-20 01:05:32 +01:00 |
|
Triss
|
8e9b15f5f9
|
stuff
|
2022-02-19 20:46:59 +01:00 |
|
Triss
|
efa6b240e9
|
rev4 bullshit
|
2022-02-14 03:00:59 +01:00 |
|
Triss
|
861b69095c
|
clean up traces, fix smps footprint oops
|
2022-02-03 14:36:01 +01:00 |
|
Triss
|
9fb7db2498
|
rev3.3
|
2022-02-03 02:38:08 +01:00 |
|
Triss
|
40cd14c29c
|
add hardware revision update notes
|
2022-02-01 16:07:02 +01:00 |
|
Triss
|
6f62a61765
|
rev3.2: fix U400 footprint, D202..205 are now SOD-123F, silkscreen stuff
|
2022-02-01 15:48:27 +01:00 |
|
Triss
|
a9bbe03ebf
|
i think this warrants a revision bump
|
2022-01-26 21:48:13 +01:00 |
|
Triss
|
c944a1c0ae
|
psuflt: use Sallen-Key instead; gpio: expose 3V3 & Vdcflt
|
2022-01-26 21:44:54 +01:00 |
|
Triss
|
112f6fe171
|
optimize tracks a bit, also the return path for P22PWM
|
2022-01-20 22:56:22 +01:00 |
|
Triss
|
fb386da1f3
|
actually no, the diode thing was a mistake
|
2022-01-19 23:41:16 +01:00 |
|
Triss
|
f2e9b1d3f5
|
fix silkscreen/solderpad overlap
|
2022-01-19 23:29:34 +01:00 |
|
Triss
|
39df362eca
|
replace R500 with two diodes
|
2022-01-19 23:23:01 +01:00 |
|
Triss
|
27a3030c11
|
eh, i think rev3 is doneish
|
2022-01-18 19:25:28 +01:00 |
|
Triss
|
1373f57e54
|
remove kicadv5 schematics
|
2022-01-18 01:32:41 +01:00 |
|
Triss
|
cd75fde21e
|
rev3
|
2022-01-18 01:32:04 +01:00 |
|
Triss
|
58810e9ae1
|
update stuff (v2.1)
* external low voltage in
* ^ controlled by MAX4619
* lo voltage now buffered by opamp
* change UART pinout to sth more conventional
* misc
|
2021-12-31 20:07:16 +01:00 |
|
Triss
|
bbce79cd76
|
protection (or not). max4619 might need +5V tho
|
2021-12-22 19:56:51 +01:00 |
|
Triss
|
ec33aa2185
|
clean up tracks
|
2021-12-22 15:56:40 +01:00 |
|
Triss
|
e6a78ca066
|
ugh, kicad...
|
2021-12-22 04:52:45 +01:00 |
|
Triss
|
1a8153b65a
|
correct DS1803 footprint
|
2021-12-22 04:52:45 +01:00 |
|
Triss
|
929fdbcc25
|
bunch of stuff, should save every so often
|
2021-12-22 04:52:43 +01:00 |
|
Triss
|
328896073f
|
ok i think its ready. silkscreen time now
|
2021-12-22 04:52:42 +01:00 |
|
Triss
|
5a641c13e0
|
digipot on backside
|
2021-12-22 04:52:41 +01:00 |
|
Triss
|
2b56a94fe7
|
base bord routing done, some stuff still TODO
|
2021-12-22 04:52:40 +01:00 |
|
Triss
|
60d38466db
|
redo board layout, sigh
|
2021-12-22 04:52:40 +01:00 |
|
Triss
|
fab55daf60
|
basic board layout done
|
2021-12-22 04:52:39 +01:00 |
|
Triss
|
4cd5db4d59
|
schematic done(?)
|
2021-12-22 04:52:38 +01:00 |
|
Triss
|
a488bb2484
|
no regc
|
2021-12-22 04:52:37 +01:00 |
|
Triss
|
dee386cb12
|
regc version
|
2021-12-22 04:52:37 +01:00 |
|
Triss
|
d51f1f36e6
|
v1, targetting vdd
|
2021-12-22 04:52:35 +01:00 |