fix svd parser & generator stuff
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parent
4a9db32d33
commit
bab3f7141f
15
svd/svd.py
15
svd/svd.py
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@ -176,8 +176,8 @@ class SvdPeripheral(NamedTuple):
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disableCondition: str
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baseAddress: int
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registerProperties: SvdRegisterProperties
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addressBlock: SvdAddressBlock
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interrupt: SvdInterrupt
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addressBlock: Sequence[SvdAddressBlock]
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interrupt: Sequence[SvdInterrupt]
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registers: Sequence[Union[SvdRegister, SvdCluster]]
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@ -198,5 +198,16 @@ class SvdDevice(NamedTuple):
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peripherals: Sequence[SvdPeripheral]
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vendorExtensions: Any
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def __eq__(self, other):
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return self.vendor == other.vendor and self.vendorID == other.vendorID \
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and self.name == other.name and self.series == other.series and \
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self.version == other.version and self.description == other.description \
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and self.licenseText == other.licenseText and self.cpu == other.cpu \
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and self.headerSystemFilename == other.headerSystemFilename and \
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self.headerDefinitionsPrefix == other.headerDefinitionsPrefix and \
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self.addressUnitBits == other.addressUnitBits and self.width == other.width \
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and self.registerProperties == other.registerProperties and \
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self.peripherals == other.peripherals
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# TODO: functions for expanding/flattening registerProperties, dimElements and derivedFrom?
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@ -1,19 +1,18 @@
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import xml, xml.etree
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import xml.etree.ElementTree as ET
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import typing, collections.abc
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from svd import *
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from typing import get_type_hints
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# FIXME:
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# * peripheral registers not emitting
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def ser_one(v) -> str:
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assert v is not None
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if isinstance(v, bool): return "true" if v else "false"
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elif isinstance(v, int): return hex(v)
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elif isinstance(v, str): return v
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elif isinstance(v, str):
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return v.replace('&', "&").replace('<', "<").replace('>', ">")
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elif type(v) == tuple:
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return "r%dp%d" % (v[0], v[1])
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else: return None
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@ -47,9 +46,17 @@ type2tag = {
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SvdPeripheral: 'peripheral',
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SvdDevice: 'device',
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}
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flattenchildren = {
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SvdEnumeratedValues: {'enumeratedValue'},
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SvdCluster: {'cluster','register'},
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SvdDimArrayIndex: {'enumeratedValue'},
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SvdPeripheral: {'interrupt','addressBlock'},
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}
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def gen_generic(f, svdelem, T, tag, attrs=(), extraattr="", no_outer=False):
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def gen_generic(f, svdelem, T: type, tag: str, attrs=(), extraattr="", no_outer=False, rec=[]):
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rec=[*rec, tag]
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#print(rec, T, type(svdelem))
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atdict={}
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childdict={}
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@ -71,18 +78,33 @@ def gen_generic(f, svdelem, T, tag, attrs=(), extraattr="", no_outer=False):
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typ = types[k]
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x = ser_one(v)
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if x is None: # TODO: optimize
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if '__origin__' in typ.__dict__ and typ.__origin__ == collections.abc.Sequence:
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#print('k', k, "typ",typ)
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if typ == typing.Any and k == 'vendorExtensions':
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if type(v) == ET.Element:
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#print("v",v,type(v))
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xstr = ET.tostring(v, method='xml')#, encoding='utf8')
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xstr = xstr.decode()
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#print("xstr",xstr)
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f.write(xstr)
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else:
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# uuuuuh idk fuck
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f.write(repr(v))
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f.write('\n')
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elif typ == list or ('__origin__' in typ.__dict__ and typ.__origin__ in {collections.abc.Sequence,list}):
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if len(v) > 0:
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f.write("<%s>\n" % k)
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flatten = k in flattenchildren.get(T, ())
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if not flatten: f.write("<%s>\n" % k)
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ttt = typ.__args__[0]
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isunion = '__origin__' in ttt.__dict__ and ttt.__origin__ == typing.Union
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isdyn = ttt == typing.Any or ('__origin__' in ttt.__dict__ and ttt.__origin__ == typing.Union)
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for x in v:
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if isunion: ttt = type(x)
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gen_generic(f, x, ttt, type2tag[ttt], type2attr.get(ttt, ()))
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f.write("</%s>\n" % k)
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if isdyn: ttt = type(x)
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#print("ttt",ttt)
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gen_generic(f, x, ttt, type2tag[ttt], type2attr.get(ttt, ()), rec=[*rec, k])
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if not flatten: f.write("</%s>\n" % k)
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else:
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noouter = typ in {SvdDimElement, SvdRegisterProperties}
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gen_generic(f, v, typ, k, type2attr.get(typ, ()), no_outer=noouter)
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gen_generic(f, v, typ, k, type2attr.get(typ, ()), no_outer=noouter, rec=[*rec, k])
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else:
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f.write("<%s>%s</%s>\n"%(k, x, k))
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@ -192,6 +192,9 @@ def parse_registers(xd) -> Sequence[Union[SvdCluster, SvdRegister]]:
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def parse_peripheral(xd) -> SvdPeripheral:
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return parse_generic(xd, SvdPeripheral, 'peripheral', True, True, False, {
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'registers': parse_registers, # FIXME
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}, {
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'interrupt': parse_interrupt,
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'addressBlock': parse_addressBlock
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})
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