Fix sim driver and simio_timer
- Fix sim driver so that it can handle two bytes read/write. - Add error message regarding odd size write to sim driver. - Fix simio_timer constructor so that can accept size. - Fix simio_timer so that we read/write channels' registers.
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@ -619,7 +619,7 @@ static int sim_readmem(device_t dev_base, address_t addr,
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}
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/* Read word IO addresses */
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while (len > 2 && (addr < 0x200)) {
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while (len >= 2 && addr < 0x200) {
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uint16_t data = 0;
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simio_read(addr, &data);
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@ -654,7 +654,14 @@ static int sim_writemem(device_t dev_base, address_t addr,
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}
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/* Write word IO addresses */
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while (len > 2 && (addr < 0x200)) {
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if (len == 1 && addr < 0x200) {
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printc_err("sim: memory write on word IO, "
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"at least 2 bytes data are necessary.\n");
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} else if (len % 2 != 0 && addr < 0x200) {
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printc_err("sim: memory write on word IO, "
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"the last byte is ignored.\n");
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}
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while (len >= 2 && addr < 0x200) {
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simio_write(addr, ((uint16_t)mem[1] << 8) | mem[0]);
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mem += 2;
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len -= 2;
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@ -88,6 +88,7 @@ static struct simio_device *timer_create(char **arg_text)
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size_text);
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return NULL;
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}
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size = value;
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if (size < 2 || size > MAX_CCRS) {
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printc_err("timer: invalid size: %d\n", size);
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@ -282,7 +283,7 @@ static int timer_info(struct simio_device *dev)
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printc("\n");
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for (i = 0; i < tr->size; i++)
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printc("Channel %2d, TACTL = 0x%04x, TACCR = 0x%04x\n",
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printc("Channel %2d, TACCTL = 0x%04x, TACCR = 0x%04x\n",
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i, tr->ctls[i], tr->ccrs[i]);
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return 0;
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@ -307,7 +308,7 @@ static int timer_write(struct simio_device *dev,
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}
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if (addr >= tr->base_addr + 2 &&
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addr < tr->base_addr + tr->size + 2) {
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addr < tr->base_addr + (tr->size << 1) + 2) {
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int index = ((addr & 0xf) - 2) >> 1;
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tr->ctls[index] = (data & 0xf9f7) |
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@ -316,7 +317,7 @@ static int timer_write(struct simio_device *dev,
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}
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if (addr >= tr->base_addr + 0x12 &&
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addr < tr->base_addr + tr->size + 0x12) {
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addr < tr->base_addr + (tr->size << 1) + 0x12) {
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int index = ((addr & 0xf) - 2) >> 1;
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tr->ccrs[index] = data;
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@ -348,13 +349,13 @@ static int timer_read(struct simio_device *dev,
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}
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if (addr >= tr->base_addr + 2 &&
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addr < tr->base_addr + tr->size + 2) {
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addr < tr->base_addr + (tr->size << 1) + 2) {
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*data = tr->ctls[((addr & 0xf) - 2) >> 1];
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return 0;
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}
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if (addr >= tr->base_addr + 0x12 &&
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addr < tr->base_addr + tr->size + 0x12) {
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addr < tr->base_addr + (tr->size << 1) + 0x12) {
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*data = tr->ccrs[((addr & 0xf) - 2) >> 1];
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return 0;
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}
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