fix MSP430FR5994 identification issue, handle NO_BSL config failure gracefully
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dc77c43d80
commit
3602ed39f9
12
chipinfo.db
12
chipinfo.db
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@ -85042,7 +85042,7 @@ const struct chipinfo chipinfo_db[] = { {
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{0},
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{0},
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},
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.id = {
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/*.id = {
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.ver_id = 0x82a1,
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.ver_sub_id = 0x0000,
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.revision = 0x10,
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@ -85051,6 +85051,16 @@ const struct chipinfo chipinfo_db[] = { {
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.config = 0x00,
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.fuses = 0x00,
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.activation_key = 0x00000000,
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},*/
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.id = {
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.ver_id = 0x82a1,
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.ver_sub_id = 0x0000,
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.revision = 0x21,
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.fab = 0x00,
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.self = 0x0000,
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.config = 0x00,
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.fuses = 0x00,
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.activation_key = 0x00000000,
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},
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.id_mask = {
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.ver_id = 0xffff,
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@ -210,19 +210,6 @@ int v3hil_comm_init(struct v3hil *h)
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r32le(h->hal.payload + 4));
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}
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/* Pick fail-safe configuration */
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/*printc_dbg("Reset parameters...\n");
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if (set_param(h, HAL_PROTO_CONFIG_CLK_CONTROL_TYPE, 0) < 0 ||
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set_param(h, HAL_PROTO_CONFIG_SFLLDEH, 0) < 0 ||
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set_param(h, HAL_PROTO_CONFIG_DEFAULT_CLK_CONTROL, 0x040f) ||
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set_param(h, HAL_PROTO_CONFIG_ENHANCED_PSA, 0) < 0 ||
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set_param(h, HAL_PROTO_CONFIG_PSA_TCKL_HIGH, 0) < 0 ||
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set_param(h, HAL_PROTO_CONFIG_POWER_TESTREG_MASK, 0) < 0 ||
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set_param(h, HAL_PROTO_CONFIG_POWER_TESTREG3V_MASK, 0) < 0 ||
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//set_param(h, HAL_PROTO_CONFIG_NO_BSL, 0) < 0 ||
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set_param(h, HAL_PROTO_CONFIG_ALT_ROM_ADDR_FOR_CPU_READ, 0) < 0)
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return -1;*/
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printc_dbg("Reset firmware...\n");
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if (hal_proto_execute(&h->hal,
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HAL_PROTO_FID_RESET_STATIC_GLOBAL_VARS, NULL, 0) < 0)
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@ -1053,9 +1040,9 @@ int v3hil_identify(struct v3hil *fet)
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set_param(fet, HAL_PROTO_CONFIG_PSA_TCKL_HIGH, 0) < 0 ||
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set_param(fet, HAL_PROTO_CONFIG_POWER_TESTREG_MASK, 0) < 0 ||
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set_param(fet, HAL_PROTO_CONFIG_POWER_TESTREG3V_MASK, 0) < 0 ||
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//set_param(fet, HAL_PROTO_CONFIG_NO_BSL, 0) < 0 ||
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set_param(fet, HAL_PROTO_CONFIG_ALT_ROM_ADDR_FOR_CPU_READ, 0) < 0)
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return -1;
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set_param(fet, HAL_PROTO_CONFIG_NO_BSL, 0); // is allowed to fail
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printc_dbg("Check JTAG fuse...\n");
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if (hal_proto_execute(&fet->hal, HAL_PROTO_FID_IS_JTAG_FUSE_BLOWN,
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@ -1128,13 +1115,13 @@ int v3hil_configure(struct v3hil *fet)
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fet->chip->power.enable_lpm5_3v) < 0 ||
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set_param(fet, HAL_PROTO_CONFIG_TESTREG3V_DISABLE_LPMX5,
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fet->chip->power.disable_lpm5_3v) < 0 ||
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set_param(fet, HAL_PROTO_CONFIG_NO_BSL,
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(fet->chip->features &
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CHIPINFO_FEATURE_NO_BSL) ? 1 : 0) < 0 ||
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set_param(fet, HAL_PROTO_CONFIG_ALT_ROM_ADDR_FOR_CPU_READ,
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(fet->chip->features &
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CHIPINFO_FEATURE_1337) ? 1 : 0) < 0)
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return -1;
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set_param(fet, HAL_PROTO_CONFIG_NO_BSL,
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(fet->chip->features &
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CHIPINFO_FEATURE_NO_BSL) ? 1 : 0); // is allowed to fail
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return 0;
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}
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