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fix MSP430FR5994 identification issue, handle NO_BSL config failure gracefully

This commit is contained in:
Triss 2022-05-09 01:42:57 +02:00
parent dc77c43d80
commit 3602ed39f9
2 changed files with 15 additions and 18 deletions
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12
chipinfo.db
View File

@ -85042,7 +85042,7 @@ const struct chipinfo chipinfo_db[] = { {
{0}, {0},
{0}, {0},
}, },
.id = { /*.id = {
.ver_id = 0x82a1, .ver_id = 0x82a1,
.ver_sub_id = 0x0000, .ver_sub_id = 0x0000,
.revision = 0x10, .revision = 0x10,
@ -85051,6 +85051,16 @@ const struct chipinfo chipinfo_db[] = { {
.config = 0x00, .config = 0x00,
.fuses = 0x00, .fuses = 0x00,
.activation_key = 0x00000000, .activation_key = 0x00000000,
},*/
.id = {
.ver_id = 0x82a1,
.ver_sub_id = 0x0000,
.revision = 0x21,
.fab = 0x00,
.self = 0x0000,
.config = 0x00,
.fuses = 0x00,
.activation_key = 0x00000000,
}, },
.id_mask = { .id_mask = {
.ver_id = 0xffff, .ver_id = 0xffff,

21
drivers/v3hil.c
View File

@ -210,19 +210,6 @@ int v3hil_comm_init(struct v3hil *h)
r32le(h->hal.payload + 4)); r32le(h->hal.payload + 4));
} }
/* Pick fail-safe configuration */
/*printc_dbg("Reset parameters...\n");
if (set_param(h, HAL_PROTO_CONFIG_CLK_CONTROL_TYPE, 0) < 0 ||
set_param(h, HAL_PROTO_CONFIG_SFLLDEH, 0) < 0 ||
set_param(h, HAL_PROTO_CONFIG_DEFAULT_CLK_CONTROL, 0x040f) ||
set_param(h, HAL_PROTO_CONFIG_ENHANCED_PSA, 0) < 0 ||
set_param(h, HAL_PROTO_CONFIG_PSA_TCKL_HIGH, 0) < 0 ||
set_param(h, HAL_PROTO_CONFIG_POWER_TESTREG_MASK, 0) < 0 ||
set_param(h, HAL_PROTO_CONFIG_POWER_TESTREG3V_MASK, 0) < 0 ||
//set_param(h, HAL_PROTO_CONFIG_NO_BSL, 0) < 0 ||
set_param(h, HAL_PROTO_CONFIG_ALT_ROM_ADDR_FOR_CPU_READ, 0) < 0)
return -1;*/
printc_dbg("Reset firmware...\n"); printc_dbg("Reset firmware...\n");
if (hal_proto_execute(&h->hal, if (hal_proto_execute(&h->hal,
HAL_PROTO_FID_RESET_STATIC_GLOBAL_VARS, NULL, 0) < 0) HAL_PROTO_FID_RESET_STATIC_GLOBAL_VARS, NULL, 0) < 0)
@ -1053,9 +1040,9 @@ int v3hil_identify(struct v3hil *fet)
set_param(fet, HAL_PROTO_CONFIG_PSA_TCKL_HIGH, 0) < 0 || set_param(fet, HAL_PROTO_CONFIG_PSA_TCKL_HIGH, 0) < 0 ||
set_param(fet, HAL_PROTO_CONFIG_POWER_TESTREG_MASK, 0) < 0 || set_param(fet, HAL_PROTO_CONFIG_POWER_TESTREG_MASK, 0) < 0 ||
set_param(fet, HAL_PROTO_CONFIG_POWER_TESTREG3V_MASK, 0) < 0 || set_param(fet, HAL_PROTO_CONFIG_POWER_TESTREG3V_MASK, 0) < 0 ||
//set_param(fet, HAL_PROTO_CONFIG_NO_BSL, 0) < 0 ||
set_param(fet, HAL_PROTO_CONFIG_ALT_ROM_ADDR_FOR_CPU_READ, 0) < 0) set_param(fet, HAL_PROTO_CONFIG_ALT_ROM_ADDR_FOR_CPU_READ, 0) < 0)
return -1; return -1;
set_param(fet, HAL_PROTO_CONFIG_NO_BSL, 0); // is allowed to fail
printc_dbg("Check JTAG fuse...\n"); printc_dbg("Check JTAG fuse...\n");
if (hal_proto_execute(&fet->hal, HAL_PROTO_FID_IS_JTAG_FUSE_BLOWN, if (hal_proto_execute(&fet->hal, HAL_PROTO_FID_IS_JTAG_FUSE_BLOWN,
@ -1128,13 +1115,13 @@ int v3hil_configure(struct v3hil *fet)
fet->chip->power.enable_lpm5_3v) < 0 || fet->chip->power.enable_lpm5_3v) < 0 ||
set_param(fet, HAL_PROTO_CONFIG_TESTREG3V_DISABLE_LPMX5, set_param(fet, HAL_PROTO_CONFIG_TESTREG3V_DISABLE_LPMX5,
fet->chip->power.disable_lpm5_3v) < 0 || fet->chip->power.disable_lpm5_3v) < 0 ||
set_param(fet, HAL_PROTO_CONFIG_NO_BSL,
(fet->chip->features &
CHIPINFO_FEATURE_NO_BSL) ? 1 : 0) < 0 ||
set_param(fet, HAL_PROTO_CONFIG_ALT_ROM_ADDR_FOR_CPU_READ, set_param(fet, HAL_PROTO_CONFIG_ALT_ROM_ADDR_FOR_CPU_READ,
(fet->chip->features & (fet->chip->features &
CHIPINFO_FEATURE_1337) ? 1 : 0) < 0) CHIPINFO_FEATURE_1337) ? 1 : 0) < 0)
return -1; return -1;
set_param(fet, HAL_PROTO_CONFIG_NO_BSL,
(fet->chip->features &
CHIPINFO_FEATURE_NO_BSL) ? 1 : 0); // is allowed to fail
return 0; return 0;
} }