Simulation bug fixes.
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parent
070de76844
commit
39338c5a73
22
sim.c
22
sim.c
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@ -204,6 +204,7 @@ static int step_double(u_int16_t ins)
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u_int32_t dst_data;
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u_int32_t res_data;
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u_int32_t msb = is_byte ? 0x80 : 0x8000;
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u_int32_t mask = is_byte ? 0xff : 0xffff;
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fetch_operand(amode_src, sreg, is_byte, NULL, &src_data);
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fetch_operand(amode_dst, dreg, is_byte, &dst_addr,
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@ -223,7 +224,7 @@ static int step_double(u_int16_t ins)
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if (opcode == MSP430_OP_ADDC || opcode == MSP430_OP_SUBC)
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res_data = (sim_regs[MSP430_REG_SR] &
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MSP430_SR_C) ? 1 : 0;
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else if (opcode == MSP430_OP_SUB)
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else if (opcode == MSP430_OP_SUB || opcode == MSP430_OP_CMP)
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res_data = 1;
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else
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res_data = 0;
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@ -232,7 +233,7 @@ static int step_double(u_int16_t ins)
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res_data += dst_data;
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sim_regs[MSP430_REG_SR] &= ~ARITH_BITS;
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if (!res_data)
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if (!(res_data & mask))
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sim_regs[MSP430_REG_SR] |= MSP430_SR_Z;
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if (res_data & msb)
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sim_regs[MSP430_REG_SR] |= MSP430_SR_N;
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@ -249,7 +250,7 @@ static int step_double(u_int16_t ins)
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res_data++;
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sim_regs[MSP430_REG_SR] &= ~ARITH_BITS;
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if (!res_data)
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if (!(res_data & mask))
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sim_regs[MSP430_REG_SR] |= MSP430_SR_Z;
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if (res_data == 1)
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sim_regs[MSP430_REG_SR] |= MSP430_SR_N;
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@ -264,7 +265,7 @@ static int step_double(u_int16_t ins)
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sim_regs[MSP430_REG_SR] &= ~ARITH_BITS;
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sim_regs[MSP430_REG_SR] |=
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res_data ? MSP430_SR_C : MSP430_SR_Z;
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(res_data & mask) ? MSP430_SR_C : MSP430_SR_Z;
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if (res_data & msb)
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sim_regs[MSP430_REG_SR] |= MSP430_SR_N;
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break;
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@ -281,7 +282,7 @@ static int step_double(u_int16_t ins)
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res_data = dst_data ^ src_data;
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sim_regs[MSP430_REG_SR] &= ~ARITH_BITS;
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sim_regs[MSP430_REG_SR] |=
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res_data ? MSP430_SR_C : MSP430_SR_Z;
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(res_data & mask) ? MSP430_SR_C : MSP430_SR_Z;
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if (res_data & msb)
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sim_regs[MSP430_REG_SR] |= MSP430_SR_N;
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if (src_data & dst_data & msb)
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@ -308,6 +309,7 @@ static int step_single(u_int16_t ins)
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int amode = (ins >> 4) & 0x3;
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int reg = ins & 0x000f;
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u_int16_t msb = is_byte ? 0x80 : 0x8000;
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u_int32_t mask = is_byte ? 0xff : 0xffff;
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u_int16_t src_addr = 0;
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u_int32_t src_data;
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u_int32_t res_data;
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@ -326,7 +328,7 @@ static int step_single(u_int16_t ins)
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}
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sim_regs[MSP430_REG_SR] &= ~ARITH_BITS;
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if (!res_data)
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if (!(res_data & mask))
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sim_regs[MSP430_REG_SR] |= MSP430_SR_Z;
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if (res_data & msb)
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sim_regs[MSP430_REG_SR] |= MSP430_SR_N;
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@ -347,7 +349,8 @@ static int step_single(u_int16_t ins)
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sim_regs[MSP430_REG_SR] |= MSP430_SR_N;
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}
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sim_regs[MSP430_REG_SR] |= res_data ? MSP430_SR_C : MSP430_SR_Z;
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sim_regs[MSP430_REG_SR] |=
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(res_data & mask) ? MSP430_SR_C : MSP430_SR_Z;
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break;
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case MSP430_OP_PUSH:
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@ -511,6 +514,11 @@ static int sim_wait(void)
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sim_regs[MSP430_REG_PC] == run_breakpoint)
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break;
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if (sim_regs[MSP430_REG_SR] & MSP430_SR_CPUOFF) {
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printf("CPU disabled\n");
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break;
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}
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if (ctrlc_check()) {
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run_mode = RUN_HALTED;
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return 1;
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