Document IO simulator in manual.
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mspdebug.man
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mspdebug.man
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@ -79,16 +79,9 @@ mode. A 64k buffer is allocated to simulate the device memory. The CPU
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core alone is emulated (no peripheral emulation).
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core alone is emulated (no peripheral emulation).
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During simulation, addresses below 0x0200 are assumed to be IO memory.
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During simulation, addresses below 0x0200 are assumed to be IO memory.
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When data is written to an IO memory address, a message is displayed
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Programmed IO writes to and from IO memory are handled by the IO
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on the console showing the program counter location, address written
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simulator, which can be configured and controlled with the \fBsimio\fR
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to, and data. The data value is also written to simulated RAM at the
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command, described below.
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relevant address.
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When data is read from IO memory, the user is notified similarly and
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prompted to supply the data. At this prompt, address expressions can
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be entered. If no value is entered, the value is read from simulated
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RAM. The user can press Ctrl+C to abort an IO request and stop
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execution.
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This mode is intended for testing of changes to MSPDebug, and for
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This mode is intended for testing of changes to MSPDebug, and for
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aiding the disassembly of MSP430 binaries (as all binary and symbol
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aiding the disassembly of MSP430 binaries (as all binary and symbol
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@ -255,6 +248,7 @@ Match instructions using the specified mode in the destination operand. See
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below for a list of modes. This option implies that no-argument instructions
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below for a list of modes. This option implies that no-argument instructions
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are not matched.
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are not matched.
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.RE
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.RE
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.IP
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For single-operand instructions, the operand is considered to be the
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For single-operand instructions, the operand is considered to be the
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destination operand.
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destination operand.
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@ -369,6 +363,38 @@ instructions at the address selected by the program counter.
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An optional count can be specified to step multiple times. If no
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An optional count can be specified to step multiple times. If no
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argument is given, the CPU steps once. This command supports repeat
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argument is given, the CPU steps once. This command supports repeat
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execution.
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execution.
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.IP "\fBsimio add\fR \fIclass\fR \fIname\fR [\fIargs ...\fR]"
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Add a new peripheral to the IO simulator. The \fIclass\fR parameter may be
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any of the peripheral types named in the output of the \fBsimio classes\fR
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command. The \fIname\fR parameter is a unique name assigned by the user to
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this peripheral instance, and is used with other commands to refer to this
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instance of the peripheral.
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Some peripheral classes take arguments upon creation. These are documented
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in the output to the \fBsimio help\fR command.
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.IP "\fBsimio classes\fR"
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List the names of the different types of peripherals which may be added to
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the simulator. You can use the \fBsimio help\fR command to obtain more
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information about each peripheral type.
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.IP "\fBsimio config\fR \fIname\fR \fIparam\fR [\fIargs ...\fR]"
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Configure or perform some action on a peripheral instance. The \fIparam\fR
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argument is specific to the peripheral type. A list of valid configuration
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commands can be obtained by using the \fBsimio help\fR command.
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.IP "\fBsimio del\fR \fIname\fR"
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Remove a previously added peripheral instance. The \fIname\fR argument
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should be the name of the peripheral that was assigned with the
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\fBsimio add\fR command.
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.IP "\fBsimio devices\fR"
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List all peripheral instances currently attached to the simulator, along
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with their types and interrupt status. You can obtain more detailed
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information for each instance with the \fBsimio info\fR command.
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.IP "\fBsimio help\fR \fIclass\fR"
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Obtain more information about a peripheral class. The documentation
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given will list constructor arguments and configuration parameters for
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the device type.
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.IP "\fBsimio info\fR \fIname\fR"
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Display detailed status information for a particular peripheral. The type
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of information displayed is specific to each type of peripheral.
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.IP "\fBsym clear\fR"
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.IP "\fBsym clear\fR"
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Clear the symbol table, deleting all symbols.
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Clear the symbol table, deleting all symbols.
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.IP "\fBsym set\fR \fIname\fR \fIvalue\fR"
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.IP "\fBsym set\fR \fIname\fR \fIvalue\fR"
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@ -400,6 +426,83 @@ Rename symbols by searching for those matching the given regular
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expression and substituting the given string for the matched portion. The
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expression and substituting the given string for the matched portion. The
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symbols renamed are displayed, as well as a total count of all symbols
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symbols renamed are displayed, as well as a total count of all symbols
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renamed.
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renamed.
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.SH IO SIMULATOR
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The IO simulator subsystem consists of a database of device classes, and a
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list of instances of those classes. Each device class has a different
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set of constructor arguments, configuration parameters and information which
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may be displayed. This section describes the operation of the available
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device classes in detail.
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In the list below, each device class is listed, followed by its constructor
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arguments.
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.IP "\fBtimer\fR [\fIsize\fR]"
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This peripheral simulators Timer_A modules, and can be used to simulate
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Timer_B modules, provided that the extended features aren't required.
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The constructor takes a size argument specifying the number of capture/compare
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registers in this peripheral instance. The number of such registers may not
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be less than 2, or greater than 7.
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The IO addresses and IRQs used are configurable. The default IO addresses used
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are those specified for Timer_A in the MSP430 hardware documentation.
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.RS
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.IP "\fBbase\fR \fIaddress\fR"
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Alter the base IO address. By default, this is 0x0160. By setting this to 0x0180,
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a Timer_B module may be simulated.
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.IP "\fBirq0\fR \fInumber\fR"
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Set the TACCR0 interrupt vector number. By default, this is interrupt vector 9.
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This interrupt is self-clearing, and higher priority than the TACCR1/TAIFG
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vector.
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.IP "\fBirq1\fR \fInumber\fR"
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Set the TACCR1/TAIFG interrupt vector. By default, this is interrupt vector 8.
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.IP "\fBiv\fR \fIaddress\fR"
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Alter the address of the interrupt vector register. By default, this is 0x012E.
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By setting this to 0x011E, a Timer_B module may be simulated.
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.IP "\fBset\fR \fIchannel\fR \fIvalue\fR"
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When Timer_A is used in capture mode, the CCI bit in each capture register reflects
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the state of the corresponding input pin, and can't be altered in software. This
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configuration command can be used to simulate changes in input pin state, and will
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trigger the corresponding interrupts if the peripheral is so configured.
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.RE
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.IP "\fBtracer\fR [\fIhistory-size\fR]"
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The tracer peripheral is a debugging device. It can be used to investigate
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and record the IO activity of a running program, to benchmark execution time,
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and to simulate interrupts.
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The information displayed by the tracer gives a running count of clock cycles
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from each of the system clocks, and an instruction count. A list of the \fIN\fR
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most recent IO events is also displayed (this is configurable via the \fIhistory-size\fR
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argument of the constructor). Each IO event is timestamped by the number of
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MCLK cycles that have elapsed since the last reset of the device's counter.
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The IO events that it records consist of programmed IO reads and writes,
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interrupt acceptance, and system resets. As well as keeping the IO events in a
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rotating buffer, the tracer can be configured to display the events as they
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occur.
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Note that since clock cycles don't advance while the CPU isn't running, this
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peripheral can be used to calculate execution times for blocks of code. This
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can be achieved by setting a breakpoint at the end of the code block, setting the
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program counter to the start of the code block, clearing the tracer and running
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the code. After the breakpoint is reached, the information displayed by the
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tracer will contain a count of MCLK cycles elapsed during the last run.
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The configuration parameters for this device class are:
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.RS
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.IP "\fBverbose\fR"
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Start displaying IO events as they occur, as well as recording them in the
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rotating buffer.
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.IP "\fBquiet\fR"
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Stop displaying IO events as they occur, and just record them in the buffer.
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.IP "\fBtrigger\fR \fIirq\fR"
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Signal an interrupt request to the CPU. This request will remain raised until
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accepted by the CPU or cleared by the user.
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.IP "\fBuntrigger\fR"
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Clear a signalled interrupt request.
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.IP "\fBclear\fR"
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Reset the clock cycle and instruction counts to 0, and clear the IO event
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history.
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.RE
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.SH ADDRESS EXPRESSIONS
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.SH ADDRESS EXPRESSIONS
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Any command which accepts a memory address, length or register value
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Any command which accepts a memory address, length or register value
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as an argument may be given an address expression. An address
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as an argument may be given an address expression. An address
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