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In simulation, show PC offsets at time before decoding.

This commit is contained in:
Daniel Beer 2010-03-20 16:33:38 +13:00
parent 0eca83f0e8
commit 74107d5632
1 changed files with 9 additions and 5 deletions
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14
sim.c
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@ -42,10 +42,13 @@ static u_int16_t sim_regs[DEVICE_NUM_REGS];
#define MEM_IO_END 0x200 #define MEM_IO_END 0x200
/* PC at the start of the current instruction */
static u_int16_t current_insn;
static void io_prefix(const char *prefix, u_int16_t addr, int is_byte) static void io_prefix(const char *prefix, u_int16_t addr, int is_byte)
{ {
const char *name; const char *name;
u_int16_t pc = sim_regs[MSP430_REG_PC]; u_int16_t pc = current_insn;
if (!stab_find(&pc, &name)) { if (!stab_find(&pc, &name)) {
printf("%s", name); printf("%s", name);
@ -288,7 +291,7 @@ static int step_double(u_int16_t ins)
default: default:
fprintf(stderr, "sim: invalid double-operand opcode: " fprintf(stderr, "sim: invalid double-operand opcode: "
"0x%04x (PC = 0x%04x)\n", "0x%04x (PC = 0x%04x)\n",
opcode, sim_regs[MSP430_REG_PC]); opcode, current_insn);
return -1; return -1;
} }
@ -367,7 +370,7 @@ static int step_single(u_int16_t ins)
default: default:
fprintf(stderr, "sim: unknown single-operand opcode: 0x%04x " fprintf(stderr, "sim: unknown single-operand opcode: 0x%04x "
"(PC = 0x%04x)\n", opcode, sim_regs[MSP430_REG_PC]); "(PC = 0x%04x)\n", opcode, current_insn);
return -1; return -1;
} }
@ -434,8 +437,9 @@ static int step_cpu(void)
u_int16_t ins; u_int16_t ins;
/* Fetch the instruction */ /* Fetch the instruction */
ins = MEM_GETW(sim_regs[MSP430_REG_PC]); current_insn = sim_regs[MSP430_REG_PC];
sim_regs[0] += 2; ins = MEM_GETW(current_insn);
sim_regs[MSP430_REG_PC] += 2;
/* Handle different instruction types */ /* Handle different instruction types */
if ((ins & 0xf000) >= 0x4000) if ((ins & 0xf000) >= 0x4000)