In simulation, show PC offsets at time before decoding.
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parent
0eca83f0e8
commit
74107d5632
14
sim.c
14
sim.c
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@ -42,10 +42,13 @@ static u_int16_t sim_regs[DEVICE_NUM_REGS];
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#define MEM_IO_END 0x200
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/* PC at the start of the current instruction */
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static u_int16_t current_insn;
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static void io_prefix(const char *prefix, u_int16_t addr, int is_byte)
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{
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const char *name;
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u_int16_t pc = sim_regs[MSP430_REG_PC];
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u_int16_t pc = current_insn;
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if (!stab_find(&pc, &name)) {
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printf("%s", name);
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@ -288,7 +291,7 @@ static int step_double(u_int16_t ins)
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default:
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fprintf(stderr, "sim: invalid double-operand opcode: "
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"0x%04x (PC = 0x%04x)\n",
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opcode, sim_regs[MSP430_REG_PC]);
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opcode, current_insn);
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return -1;
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}
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@ -367,7 +370,7 @@ static int step_single(u_int16_t ins)
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default:
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fprintf(stderr, "sim: unknown single-operand opcode: 0x%04x "
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"(PC = 0x%04x)\n", opcode, sim_regs[MSP430_REG_PC]);
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"(PC = 0x%04x)\n", opcode, current_insn);
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return -1;
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}
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@ -434,8 +437,9 @@ static int step_cpu(void)
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u_int16_t ins;
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/* Fetch the instruction */
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ins = MEM_GETW(sim_regs[MSP430_REG_PC]);
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sim_regs[0] += 2;
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current_insn = sim_regs[MSP430_REG_PC];
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ins = MEM_GETW(current_insn);
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sim_regs[MSP430_REG_PC] += 2;
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/* Handle different instruction types */
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if ((ins & 0xf000) >= 0x4000)
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