Added MSP430F5255 device description to fet_db
Entry added for chip ID 0x0382 (MSP430F5255) Flash/RAM Memory layout and EEM debugging facilities have been set according to device data-sheet. (msg28_data, msg29_data, MSP430_STORED_INFO entries) Flags and Parameters in msg2b_data copied from MSP430F5437A - couldn't find any documentation on those. msg29_params copied from MSP430F5437A - couldn't find any documentation on those Chip detection, flashing and single step debugging with gdb tested with MSP430F5255 using olimex-v1 hw-debugger Signed-off-by: Jan Willeke <willeke@smartmote.de>
This commit is contained in:
Eric Price
Daniel Beer
parent
74665132bb
commit
76de9f7439
134
drivers/fet_db.c
134
drivers/fet_db.c
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@ -72,7 +72,7 @@
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#define ETWPID_ADC12_A 0xD8
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#define ETWPID_ADC12_A 0xD8
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static const struct fet_db_record fet_db[] =
{{ .name= "Prototype_MSP430F11x1" /* database IDX 1*/
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static const struct fet_db_record fet_db[] = {{ .name= "Prototype_MSP430F11x1" /* database IDX 1*/
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, .msg28_data= { 0xF1, 0x12 /* ID (off: 0)*/
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, .msg28_data= { 0xF1, 0x12 /* ID (off: 0)*/
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, 0x00 /* REV (off: 2)*/
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, 0x00 /* REV (off: 2)*/
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, 0x43 /* FAB (off: 3)*/
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, 0x43 /* FAB (off: 3)*/
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@ -37094,7 +37094,137 @@ static const struct fet_db_record fet_db[] =
{{ .name= "Prototype_MSP430F
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#endif
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#endif
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} };
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},
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{ .name= "MSP430F5255" /* database IDX 8F*/
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, .msg28_data= { 0x03, 0x82 /* ID (off: 0)*/
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, 0xFF /* REV (off: 2)*/
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, 0xFF /* FAB (off: 3)*/
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, 0x00, 0x00, 0x00, 0x00
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, 0xFF /* SELF0 (off: 8)*/
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, 0xFF /* SELF1 (off: 9)*/
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, 0x00, 0x00, 0x00
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, 0xFF /* CONF (off: 13)*/
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, 0x00, 0x00
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, 0xFF /* FUSES (off: 16)*/
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, 0xFF } /* F PATT (off: 17)*/
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, .msg29_params={ 0x00, 0x8F, 0x87 /*, 0x4A */ } /* copied from MSP430F5437A - could not find this in datasheet */
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, .msg29_data={ 0x00, 0xA4, 0xFF, 0xA3, 0x02, 0x00 /* off: 0 ROM */ /* values entered according to MSP430F5255 datasheet*/
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, 0x00, 0x18, 0xFF, 0x19, 0x80, 0x00 /* off: 6 INFO */
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, 0x00, 0x24, 0xFF, 0xA3 /* off: 12 RAM */
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, 0x00, 0x00, 0x08, 0x00 /* off: 16 RAM2 */
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, 0x03, 0x00 /* off: 20 Breakpoints */
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, 0x05, 0x00 /* off: 22 Emulation */
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, 0x02, 0x00 /* off: 24 GCC (0200 -> extended )*/
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, 0x0F, 0x04 /* off: 26 Id devices */
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, 0x00, 0x00, 0x00, 0x00 /* off: 28 LCD MEM */
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, 0x08, 0x07 /* off: 32 Vcc 0 : 1800 */
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, 0x10, 0x0E /* off: 34 Vcc 1 : 3600 */
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, 0xC4, 0x09 /* off: 36 Vcc 2 : 2500 */
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, 0x70, 0x17 /* off: 38 Vcc 3 : 6000 */
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, 0x58, 0x1B /* off: 40 Vcc 4 : 7000 */
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, 0x01, 0x00 /* off: 42 Has test Vpp*/
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, 0x03, 0x00 /* off: 44 3-> Default clock control */
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, 0x00, 0x00
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, 0x00, 0x00
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, 0x00, 0x00
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, 0x01, 0x00 /* SET */
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, 0x01, 0x00 /* SET */
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, 0x01, 0x00 /* SET */
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, 0x00, 0x00
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, 0x00, 0x00
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, 0x00, 0x00
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, 0x00, 0x00
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, 0x00, 0x00
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, 0xFF, 0x00 /* SET */
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, 0xFF, 0x00 /* SET */
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, 0xFF, 0x00 /* SET */}
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, .msg2b_len= 0x4A
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, .msg2b_data= { 0x00, 0x10, 0xFF, 0x17, 0x00 /* off: 0 info org, len, banks */ /* msg2b copied from MSP430F5437A - unmodified - probably wrong */
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, 0x02, 0x02, 0x00, 0x0A, 0x00 /* off: 5 ram org, len, banks */
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, 0x40, 0x00 /* off: 10 BYTE FLAGS ?? */
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, ETWPID_WDT_A , ETWPID_TMR0_A5
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, ETWPID_TA3_0 , ETWPID_TMR0_B7
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, ETWPID_EMPTY , ETWPID_EMPTY
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, ETWPID_USCI0 , ETWPID_USCI1
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, ETWPID_USCI2 , ETWPID_USCI3
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, ETWPID_RTC , ETWPID_ADC12_A
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, ETWPID_EMPTY , ETWPID_EMPTY
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, ETWPID_EMPTY , ETWPID_EMPTY
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, 0x01, 0x01, 0x00, 0x00 /* off: 28 BYTE FLAGS ?? */
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, 0x00, 0x00
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, 0x00, 0x00
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, 0x00, 0x00
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, 0x01, 0x00 /* SET */
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, 0x01, 0x00 /* SET */
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, 0x01, 0x00 /* SET */
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, 0x01, 0x00 /* SET */
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, 0x01, 0x00 /* SET */
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, 0x01, 0x00 /* SET */
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, 0x02, 0x00 /* SET */
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, 0x01, 0x00 /* SET */
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, 0x01, 0x00 /* SET */
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, 0x00, 0x00
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, 0x00, 0x00
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, 0x00, 0x00
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, 0x00, 0x00
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, 0x00, 0x00
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, 0x00, 0x00
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, 0x00, 0x00
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, 0x00, 0x00
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, 0x00, 0x00 }
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#ifdef MSP430_STORED_INFO
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, .endian = 0xAA55 /* The value 0xaa55. */
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, .id = 0x200 /* Identification number.*/
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, .string = "MSP430F5255"
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, .cpuArch = 0x0000 /* The MSP430 architecture (non-X, X or Xv2).*/
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, .coreIpId = 0x0000 /* The CoreIP ID.*/
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, .deviceIdPtr= 0x24263F /* The Device-ID Pointer.*/
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, .mainStart = 0xA400, .mainEnd = 0x2A3FF /* MAIN Memory range */
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, .infoStart = 0x1800, .infoEnd = 0x19FF /* INFO Memory range */
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, .ramStart = 0x2400, .ramEnd = 0xA3FF /* RAM Memory range.*/
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, .ram2Start = 0x0000, .ram2End = 0x0000 /* RAM Memory range.*/
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, .lcdStart = 0x0000, .lcdEnd = 0x0000 /* LCD Memory range.*/
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, .bslStart = 0x1000, .bslEnd = 0x17FF /* BSL Memory range.*/
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, .vccMinOp = 0x0708, .vccMaxOp= 0x0E10 /* Vcc range during operation [mVolts].*/
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, .hasFramMemory = 0 /* FRAM Memory type */
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, .hasTestVpp = 1 /* Device has TEST/VPP.*/
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, .nBreakpoints = 3 /* Number of breakpoints.*/
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, .nRegTrigger = 1 /* Number of CPU Register Trigger.*/
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, .nCombinations = 4 /* Number of EEM Trigger Combinations.*/
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, .nBreakOps = 1 /* Breakpoint Modes*/
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, .nBreakRdWr = 1
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, .nBreakRdDma = 1
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, .TrigerMask = 1 /* Trigger Mask for Breakpoint */
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, .nRegTriggerMod= 1 /* Register Trigger modes*/
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, .nStateStorage = 1 /* MSP430 has Stage Storage*/
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, .nCycleCount = 1 /* Number of cycle counters of MSP430*/
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, .nCycleCountOps= 1 /* Cycle couter modes*/
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, .nSequencer = 1 /* Msp430 has Sequencer*/
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, .clockControl = 2 /* Clock control level.*/
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, .emulation = 0x0005 /* Emulation level.*/
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, .jtagId = 0x0000 /* The JTAG ID - value returned on an instruction shift.*/
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, .eemVersion = 0x2800 /* The EEM Version Number.*/
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#endif
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},
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};
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const struct fet_db_record *fet_db_find_by_msg28(uint8_t *data, int len )
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const struct fet_db_record *fet_db_find_by_msg28(uint8_t *data, int len )
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{ int i;
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{ int i;
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