Various corrections to manual page.
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mspdebug.man
40
mspdebug.man
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@ -16,8 +16,8 @@ which can be used to reflash the device memory, inspect memory and
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registers, set registers, and control the CPU (single step, run and
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registers, set registers, and control the CPU (single step, run and
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run to breakpoint).
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run to breakpoint).
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It supports ELF32, Intel HEX and BSD-style symbol tables (such as the
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It supports a variety of file formats, described in the section
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output produced by \fBnm\fR(1)). It can also be used as a remote stub
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\fBBINARY FORMATS\fR below. It can also be used as a remote stub
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for \fBgdb\fR(1).
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for \fBgdb\fR(1).
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On startup, MSPDebug will look for a file called .mspdebug in the user's
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On startup, MSPDebug will look for a file called .mspdebug in the user's
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@ -78,8 +78,7 @@ supported.
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Connect to an Olimex MSP-JTAG-ISO device. Only tty access is supported.
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Connect to an Olimex MSP-JTAG-ISO device. Only tty access is supported.
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.IP "\fBsim\fR"
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.IP "\fBsim\fR"
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Do not connect to any hardware device, but instead start in simulation
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Do not connect to any hardware device, but instead start in simulation
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mode. A 64k buffer is allocated to simulate the device memory. The CPU
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mode. A 64k buffer is allocated to simulate the device memory.
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core alone is emulated (no peripheral emulation).
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During simulation, addresses below 0x0200 are assumed to be IO memory.
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During simulation, addresses below 0x0200 are assumed to be IO memory.
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Programmed IO writes to and from IO memory are handled by the IO
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Programmed IO writes to and from IO memory are handled by the IO
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@ -102,10 +101,8 @@ MSP430F419 chips. By sending a special command sequence, you can obtain
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access to the bootloader and inspect memory on the MSP430F419 in the
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access to the bootloader and inspect memory on the MSP430F419 in the
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programming device itself.
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programming device itself.
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Currently, only memory inspection is supported. CPU control via the
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Currently, only memory read/write and erase are supported. CPU control
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bootloader is not possible. Memory erase and write is possible, but is
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via the bootloader is not possible.
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currently not implemented, for lack of ability to test it. If implemented,
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this would allow firmware updates to FET430UIF devices.
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USB connection is not supported for this driver.
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USB connection is not supported for this driver.
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.IP "\fBflash-bsl\fR"
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.IP "\fBflash-bsl\fR"
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@ -368,14 +365,6 @@ Add a new breakpoint. The breakpoint location is an address expression. An
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optional index may be specified, indicating that this new breakpoint should
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optional index may be specified, indicating that this new breakpoint should
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overwrite an existing slot. If no index is specified, then the breakpoint
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overwrite an existing slot. If no index is specified, then the breakpoint
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will be stored in the next unused slot.
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will be stored in the next unused slot.
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.IP "\fBstep\fR [\fIcount\fR]"
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Step the CPU through one or more instructions. After stepping, the new
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register values are displayed, as well as a disassembly of the
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instructions at the address selected by the program counter.
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An optional count can be specified to step multiple times. If no
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argument is given, the CPU steps once. This command supports repeat
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execution.
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.IP "\fBsimio add\fR \fIclass\fR \fIname\fR [\fIargs ...\fR]"
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.IP "\fBsimio add\fR \fIclass\fR \fIname\fR [\fIargs ...\fR]"
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Add a new peripheral to the IO simulator. The \fIclass\fR parameter may be
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Add a new peripheral to the IO simulator. The \fIclass\fR parameter may be
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any of the peripheral types named in the output of the \fBsimio classes\fR
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any of the peripheral types named in the output of the \fBsimio classes\fR
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@ -408,6 +397,14 @@ the device type.
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.IP "\fBsimio info\fR \fIname\fR"
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.IP "\fBsimio info\fR \fIname\fR"
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Display detailed status information for a particular peripheral. The type
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Display detailed status information for a particular peripheral. The type
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of information displayed is specific to each type of peripheral.
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of information displayed is specific to each type of peripheral.
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.IP "\fBstep\fR [\fIcount\fR]"
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Step the CPU through one or more instructions. After stepping, the new
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register values are displayed, as well as a disassembly of the
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instructions at the address selected by the program counter.
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An optional count can be specified to step multiple times. If no
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argument is given, the CPU steps once. This command supports repeat
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execution.
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.IP "\fBsym clear\fR"
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.IP "\fBsym clear\fR"
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Clear the symbol table, deleting all symbols.
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Clear the symbol table, deleting all symbols.
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.IP "\fBsym set\fR \fIname\fR \fIvalue\fR"
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.IP "\fBsym set\fR \fIname\fR \fIvalue\fR"
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@ -599,8 +596,6 @@ The following are all valid examples of address expressions:
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.B main+0x3f
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.B main+0x3f
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.br
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.br
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.B __bss_end-__bss_start
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.B __bss_end-__bss_start
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.SH SEE ALSO
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\fBnm\fR(1), \fBgdb\fR(1), \fBobjcopy\fR(1)
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.SH OPTIONS
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.SH OPTIONS
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MSPDebug's behaviour can be configured via the following variables:
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MSPDebug's behaviour can be configured via the following variables:
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.IP "\fBcolor\fR (boolean)"
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.IP "\fBcolor\fR (boolean)"
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@ -621,16 +616,13 @@ no radix specifier, this value gives the input radix, which is
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If set, MSPDebug will supress most of its debug-related output. This option
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If set, MSPDebug will supress most of its debug-related output. This option
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defaults to false, but can be set true on start-up using the \fB-q\fR
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defaults to false, but can be set true on start-up using the \fB-q\fR
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command-line option.
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command-line option.
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.SH SEE ALSO
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\fBnm\fR(1), \fBgdb\fR(1), \fBobjcopy\fR(1)
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.SH BUGS
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.SH BUGS
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If you find any bugs, you should report them to the author at
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If you find any bugs, you should report them to the author at
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dlbeer@gmail.com. It would help if you could include a transcript
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dlbeer@gmail.com. It would help if you could include a transcript
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of an MSPDebug session illustrating the program, as well as any
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of an MSPDebug session illustrating the program, as well as any
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relevant binaries or other files. Below, known bugs in the current
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relevant binaries or other files.
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version of MSPDebug are described.
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When using the GDB remote stub in simulation and an IO read request
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occurs, any request to interrupt from GDB will not be acknowledged
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until the IO request is either completed or aborted.
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.SH COPYRIGHT
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.SH COPYRIGHT
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Copyright (C) 2009-2011 Daniel Beer <dlbeer@gmail.com>
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Copyright (C) 2009-2011 Daniel Beer <dlbeer@gmail.com>
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