jtaglib: fix register reading on MSP430G2452 and similar chips
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@ -272,7 +272,7 @@ void jtag_default_tms_sequence(struct jtdev *p, int bits, unsigned int value)
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jtag_tck_clr(p);
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jtag_tck_clr(p);
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if (value & (1u << i))
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if (value & (1u << i))
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jtag_tms_set(p);
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jtag_tms_set(p);
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else
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else
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jtag_tms_clr(p);
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jtag_tms_clr(p);
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jtag_tck_set(p);
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jtag_tck_set(p);
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}
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}
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@ -1000,17 +1000,25 @@ address_t jtag_read_reg(struct jtdev *p, int reg)
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jtag_tclk_set(p);
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jtag_tclk_set(p);
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jtag_tclk_clr(p);
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jtag_tclk_clr(p);
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jtag_tclk_set(p);
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jtag_tclk_set(p);
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jtag_tclk_clr(p);
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/* older code did an extra clock cycle -- don't do this! will put the
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jtag_tclk_set(p);
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* current instruction word on the data bus instead of the register value
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* on the G2452, making it useless. the clock cycles are still required to
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* move to the next instruction, but those should be done later. */
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/*jtag_tclk_clr(p);
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jtag_tclk_set(p);*/
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/* Read databus which contains the registers value */
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/* Read databus which contains the registers value */
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jtag_ir_shift(p, IR_DATA_CAPTURE);
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jtag_ir_shift(p, IR_DATA_CAPTURE);
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value = jtag_dr_shift_16(p, 0x0000);
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value = jtag_dr_shift_16(p, 0x0000);
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jtag_tclk_clr(p);
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/* JTAG controls RW & BYTE */
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/* JTAG controls RW & BYTE */
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jtag_ir_shift(p, IR_CNTRL_SIG_16BIT);
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jtag_ir_shift(p, IR_CNTRL_SIG_16BIT);
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jtag_dr_shift_16(p, 0x2401);
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jtag_dr_shift_16(p, 0x2401);
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jtag_tclk_set(p);
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/* Return value read from register */
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/* Return value read from register */
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return value;
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return value;
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}
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}
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@ -1163,9 +1171,9 @@ unsigned int jtag_cpu_state( struct jtdev *p )
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/*----------------------------------------------------------------------------*/
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/*----------------------------------------------------------------------------*/
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int jtag_get_config_fuses( struct jtdev *p )
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int jtag_get_config_fuses( struct jtdev *p )
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{
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{
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jtag_ir_shift(p, IR_CONFIG_FUSES);
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jtag_ir_shift(p, IR_CONFIG_FUSES);
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return jtag_dr_shift_8(p, 0);
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return jtag_dr_shift_8(p, 0);
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}
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}
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/*----------------------------------------------------------------------------*/
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/*----------------------------------------------------------------------------*/
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