dis: decode MSP430X group 14xx non-address instructions (RxxM).
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19
dis.c
19
dis.c
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@ -459,7 +459,16 @@ int dis_decode(const uint8_t *code, address_t offset, address_t len,
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insn->dsize = MSP430_DSIZE_UNKNOWN;
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insn->dsize = MSP430_DSIZE_UNKNOWN;
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}
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}
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} else {
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} else {
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if ((op & 0xfc00) == 0x1400) {
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if ((op & 0xf0e0) == 0x0040) {
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insn->itype = MSP430_ITYPE_SINGLE;
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insn->op = op & 0xf3e0;
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insn->dst_mode = MSP430_AMODE_REGISTER;
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insn->dst_reg = op & 0xf;
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insn->rep_index = (op >> 10) & 3;
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insn->dsize = (op & 0x0010) ?
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MSP430_DSIZE_WORD : MSP430_DSIZE_AWORD;
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ret = 2;
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} else if ((op & 0xfc00) == 0x1400) {
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insn->itype = MSP430_ITYPE_SINGLE;
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insn->itype = MSP430_ITYPE_SINGLE;
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insn->op = op & 0xfe00;
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insn->op = op & 0xfe00;
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insn->dst_mode = MSP430_AMODE_REGISTER;
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insn->dst_mode = MSP430_AMODE_REGISTER;
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@ -590,7 +599,13 @@ static const struct {
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/* MSP430X group 14xx */
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/* MSP430X group 14xx */
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{MSP430_OP_PUSHM, "PUSHM"},
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{MSP430_OP_PUSHM, "PUSHM"},
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{MSP430_OP_POPM, "POPM"}
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{MSP430_OP_POPM, "POPM"},
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/* MSP430X group 00xx, non-address */
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{MSP430_OP_RRCM, "RRCM"},
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{MSP430_OP_RRAM, "RRAM"},
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{MSP430_OP_RLAM, "RLAM"},
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{MSP430_OP_RRUM, "RRUM"}
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};
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};
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/* Return the mnemonic for an operation, if possible. */
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/* Return the mnemonic for an operation, if possible. */
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8
dis.h
8
dis.h
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@ -209,7 +209,13 @@ typedef enum {
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/* MSP430X group 14xx */
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/* MSP430X group 14xx */
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MSP430_OP_PUSHM = 0x1400,
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MSP430_OP_PUSHM = 0x1400,
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MSP430_OP_POPM = 0x1600
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MSP430_OP_POPM = 0x1600,
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/* MSP430X group 00xx, non-address */
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MSP430_OP_RRCM = 0x0040,
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MSP430_OP_RRAM = 0x0140,
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MSP430_OP_RLAM = 0x0240,
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MSP430_OP_RRUM = 0x0340
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} msp430_op_t;
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} msp430_op_t;
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/* This represents a decoded instruction. All decoded addresses are
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/* This represents a decoded instruction. All decoded addresses are
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