Triss
c801faeb80
jtaglib: test previous commit on 0x89 device, properly write the wdt password
2022-07-31 20:09:13 +02:00
Triss
2373d33bbb
jtaglib: use context save/restore mechanism to keep track of registers etc.
2022-07-31 19:24:54 +02:00
Triss
37aacaca2d
jtaglib: Xv2 read/write reg now (finally) working, PC gets reset every so often due to other routines
2022-07-31 19:24:51 +02:00
Triss
649d82b695
jtaglib xv2: memory accesses start to work now
2022-07-31 19:24:31 +02:00
Triss
2170693f2f
jtaglib: getting cpuxv2 stuff to work, very slowly...
2022-07-31 19:24:08 +02:00
Triss
9809da335e
jtaglib: proper device identification
2022-07-31 19:24:08 +02:00
Triss
ddfffa06fb
jtagdev, pif, mehfet: refactor device_class ops to be unified under jtagdev instead of using separate implementations
2022-07-31 19:24:08 +02:00
Triss
0a8ebf4a66
jtaglib: read JTAG ID early enough to know which procedures to use for JTAG access
2022-07-31 19:24:04 +02:00
Triss
5f30c8c217
jtaglib: refactor
...
In order to support CPUX and Xv2 devices, some refactoring is needed:
* split jtaglib into files concerning low-level JTAG/SBW physical layer
stuff, and a file containing the actual debug routines. the latter is
implemented in a separate file per CPU type (CPUX and Xv2 currently empty)
* use a lookup table dependig on the JTAG ID or CPU type to select which
function to use
* move the 'struct device' dependency in pif and mehfet to jtdev, as it
is needed everywhere, especially for device identification
In a next step, the following actions can be performed:
* Unify the read and write callbacks in pif and mehfet (used in readmem
and writemem of struct device) to remove the redundancy
* Unify the init_device function in pif and mehfet to properly detect
the device type, as done in v3hil. The device base type does query
this data independenly, however, which feels unwanted.
2022-07-31 19:23:24 +02:00
Triss
f1d416944c
jtaglib: add 20-bit DR shift function
2022-07-31 19:23:19 +02:00
Triss
a1a06e7e65
jtaglib: fix register reading on MSP430G2452 and similar chips
2021-10-11 12:34:59 +02:00
Triss
ab76a0ef3c
jtaglib: refactor: allow driver backends to implement higher-level IR/DR-shifts, TMS-sequence, etc. commands instead of requiring a bit-banging interface
2021-10-10 00:05:50 +02:00
0c5f33ec42
fix jtag_read_reg and jtag_write_reg functions according to the documentation: SLAU320 MSP430 Programming via JTAG User's Guide
...
tclk set and clr was in wrong order
2020-06-01 06:56:52 +02:00
8a1afe6c91
Add a function to the device struct to handle config fuses.
...
Also provide a getconfigfuses implementation for the pif based drivers (pif
and gpio).
2017-06-14 13:28:07 -06:00
916f63ef82
Add toggling the test and reset pins to make gpio 4-wire JTAG work
...
on SBW-enabled targets
2016-11-23 13:58:12 -06:00
fdaad416b2
jtaglib: implement breakpoints.
2015-02-24 11:58:40 +13:00
320e560b99
jtaglib: implement single-stepping.
2015-02-24 11:37:29 +13:00
9497265e72
gpio driver prepare patch
...
moves jtdev functions to pointers, to exchange late on.
Signed-off-by: Jan Willeke <willeke@smartmote.de>
2015-02-04 12:48:30 +13:00
55671036a6
Re-style drivers/jtaglib.{c,h} to match the rest of the code
...
Strictly style changes only.
Signed-off-by: Tamas TEVESZ <ice@extreme.hu>
2013-12-13 06:37:04 +13:00
e14a578555
Parallel JTAG driver (Linux only for now).
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Based on a patch submitted by Peter Bägel <peter@baegel.de>.
2012-10-12 11:33:20 +13:00
Triss
iddq
Alex Orange
John Pitney
Peter Bägel (DF5EQ)
Jan Willeke
Tamas TEVESZ
Daniel Beer