108 lines
3.3 KiB
C
108 lines
3.3 KiB
C
/* MSPDebug - debugging tool for the eZ430
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* Copyright (C) 2009 Daniel Beer
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License as published by
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* the Free Software Foundation; either version 2 of the License, or
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* (at your option) any later version.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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* You should have received a copy of the GNU General Public License
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* along with this program; if not, write to the Free Software
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* Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
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*/
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#ifndef FET_H_
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#define FET_H_
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#include <sys/types.h>
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/* This structure is used to provide an interface to a lower-level
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* transport. The transport mechanism is viewed as a stream by the FET
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* controller, which handles packet encapsulation, checksums and other
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* high-level functions.
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*/
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struct fet_transport {
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int (*send)(const char *data, int len);
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int (*recv)(char *data, int max_len);
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void (*close)(void);
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};
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/* Start up the FET controller by specifying a transport, a voltage in
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* millivolts and a set of protocol mode flags.
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*/
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#define FET_PROTO_SPYBIWIRE 0x01
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#define FET_PROTO_RF2500 0x02
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int fet_open(const struct fet_transport *transport,
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int proto_flags, int vcc_mv);
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/* Shut down the connection to the FET. This also closes the underlying
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* transport.
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*/
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int fet_close(void);
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/* Issue a reset to the CPU. The CPU can be reset via any combination
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* of three methods, and you can choose whether or not to leave the CPU
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* halted after reset.
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*/
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#define FET_RESET_PUC 0x01
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#define FET_RESET_RST 0x02
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#define FET_RESET_VCC 0x04
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#define FET_RESET_ALL 0x07
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#define FET_RESET_HALT 0x10
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int fet_reset(int flags);
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/* Retrieve and store register values. There are 16 16-bit registers in
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* the MSP430 CPU. regs must always be a pointer to an array of 16
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* u_int16_t.
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*/
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#define FET_NUM_REGS 16
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int fet_get_context(u_int16_t *regs);
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int fet_set_context(u_int16_t *regs);
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/* Erase the CPU's internal flash. */
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#define FET_ERASE_ALL 0x01
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#define FET_ERASE_MAIN 0x02
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#define FET_ERASE_ADDR 0x03
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#define FET_ERASE_INFO 0x04
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int fet_erase(int type, u_int16_t addr);
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/* Read and write memory. fet_write_mem can be used to reflash the
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* device, but only after an erase.
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*/
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int fet_read_mem(u_int16_t addr, char *buffer, int count);
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int fet_write_mem(u_int16_t addr, char *buffer, int count);
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/* Fetch the device status. If the device is currently running, then
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* the FET_POLL_RUNNING flag will be set. FET_POLL_BREAKPOINT is set
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* when the device hits the preset breakpoint, and then resets on the
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* next call to fet_poll().
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*/
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#define FET_POLL_RUNNING 0x01
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#define FET_POLL_BREAKPOINT 0x02
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int fet_poll(void);
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/* CPU run/step/stop control. While the CPU is running, memory and
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* registers are inaccessible (only fet_poll() or fet_stop()) will
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* work. fet_step() is used to single-step the CPU.
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*/
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int fet_step(void);
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int fet_run(void);
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int fet_stop(void);
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/* Set or clear the breakpoint address. Only one breakpoint can be set
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* at a time.
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*/
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int fet_break(int enable, u_int16_t addr);
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#endif
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