592 lines
13 KiB
C
592 lines
13 KiB
C
/* MSPDebug - debugging tool for the eZ430
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* Copyright (C) 2009, 2010 Daniel Beer
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License as published by
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* the Free Software Foundation; either version 2 of the License, or
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* (at your option) any later version.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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* You should have received a copy of the GNU General Public License
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* along with this program; if not, write to the Free Software
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* Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
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*/
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#include <stdlib.h>
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#include <string.h>
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#include <stdio.h>
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#include <ctype.h>
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#include "device.h"
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#include "dis.h"
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#include "util.h"
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#include "sim.h"
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#define MEM_SIZE 65536
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#define MEM_IO_END 0x200
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struct sim_device {
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struct device base;
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sim_fetch_func_t fetch_func;
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sim_store_func_t store_func;
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void *user_data;
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uint8_t memory[MEM_SIZE];
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uint16_t regs[DEVICE_NUM_REGS];
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int running;
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uint16_t current_insn;
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int have_breakpoint;
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uint16_t breakpoint_addr;
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};
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#define MEM_GETB(dev, offset) ((dev)->memory[offset])
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#define MEM_SETB(dev, offset, value) ((dev)->memory[offset] = (value))
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#define MEM_GETW(dev, offset) \
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((dev)->memory[offset] | \
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((dev)->memory[(offset + 1) & 0xffff] << 8))
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#define MEM_SETW(dev, offset, value) \
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do { \
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(dev)->memory[offset] = (value) & 0xff; \
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(dev)->memory[(offset + 1) & 0xffff] = (value) >> 8; \
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} while (0);
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static int fetch_operand(struct sim_device *dev,
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int amode, int reg, int is_byte,
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uint16_t *addr_ret, uint32_t *data_ret)
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{
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uint16_t addr = 0;
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uint32_t mask = is_byte ? 0xff : 0xffff;
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switch (amode) {
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case MSP430_AMODE_REGISTER:
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if (reg == MSP430_REG_R3) {
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if (data_ret)
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*data_ret = 0;
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return 0;
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}
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if (data_ret)
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*data_ret = dev->regs[reg] & mask;
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return 0;
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case MSP430_AMODE_INDEXED:
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if (reg == MSP430_REG_R3) {
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if (data_ret)
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*data_ret = 1;
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return 0;
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}
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addr = MEM_GETW(dev, dev->regs[MSP430_REG_PC]);
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dev->regs[MSP430_REG_PC] += 2;
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if (reg != MSP430_REG_SR)
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addr += dev->regs[reg];
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break;
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case MSP430_AMODE_INDIRECT:
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if (reg == MSP430_REG_SR) {
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if (data_ret)
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*data_ret = 4;
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return 0;
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}
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if (reg == MSP430_REG_R3) {
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if (data_ret)
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*data_ret = 2;
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return 0;
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}
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addr = dev->regs[reg];
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break;
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case MSP430_AMODE_INDIRECT_INC:
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if (reg == MSP430_REG_SR) {
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if (data_ret)
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*data_ret = 8;
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return 0;
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}
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if (reg == MSP430_REG_R3) {
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if (data_ret)
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*data_ret = mask;
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return 0;
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}
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addr = dev->regs[reg];
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dev->regs[reg] += 2;
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break;
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}
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if (addr_ret)
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*addr_ret = addr;
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if (data_ret) {
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*data_ret = MEM_GETW(dev, addr) & mask;
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if (addr < MEM_IO_END && dev->fetch_func) {
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uint16_t data16 = *data_ret;
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int ret;
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ret = dev->fetch_func(dev->user_data,
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dev->current_insn,
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addr, is_byte, &data16);
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*data_ret = data16;
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return ret;
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}
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}
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return 0;
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}
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static void store_operand(struct sim_device *dev,
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int amode, int reg, int is_byte,
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uint16_t addr, uint16_t data)
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{
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if (is_byte)
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MEM_SETB(dev, addr, data);
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else
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MEM_SETW(dev, addr, data);
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if (amode == MSP430_AMODE_REGISTER)
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dev->regs[reg] = data;
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else if (addr < MEM_IO_END && dev->store_func)
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dev->store_func(dev->user_data, dev->current_insn,
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addr, is_byte, data);
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}
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#define ARITH_BITS (MSP430_SR_V | MSP430_SR_N | MSP430_SR_Z | MSP430_SR_C)
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static int step_double(struct sim_device *dev, uint16_t ins)
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{
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uint16_t opcode = ins & 0xf000;
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int sreg = (ins >> 8) & 0xf;
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int amode_dst = (ins >> 7) & 1;
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int is_byte = ins & 0x0040;
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int amode_src = (ins >> 4) & 0x3;
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int dreg = ins & 0x000f;
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uint32_t src_data;
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uint16_t dst_addr = 0;
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uint32_t dst_data;
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uint32_t res_data;
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uint32_t msb = is_byte ? 0x80 : 0x8000;
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uint32_t mask = is_byte ? 0xff : 0xffff;
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if (fetch_operand(dev, amode_src, sreg, is_byte, NULL, &src_data) < 0)
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return -1;
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if (fetch_operand(dev, amode_dst, dreg, is_byte, &dst_addr,
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opcode == MSP430_OP_MOV ? NULL : &dst_data) < 0)
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return -1;
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switch (opcode) {
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case MSP430_OP_MOV:
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res_data = src_data;
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break;
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case MSP430_OP_SUB:
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case MSP430_OP_SUBC:
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case MSP430_OP_CMP:
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src_data = ~src_data;
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case MSP430_OP_ADD:
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case MSP430_OP_ADDC:
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if (opcode == MSP430_OP_ADDC || opcode == MSP430_OP_SUBC)
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res_data = (dev->regs[MSP430_REG_SR] &
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MSP430_SR_C) ? 1 : 0;
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else if (opcode == MSP430_OP_SUB || opcode == MSP430_OP_CMP)
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res_data = 1;
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else
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res_data = 0;
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res_data += src_data;
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res_data += dst_data;
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dev->regs[MSP430_REG_SR] &= ~ARITH_BITS;
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if (!(res_data & mask))
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dev->regs[MSP430_REG_SR] |= MSP430_SR_Z;
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if (res_data & msb)
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dev->regs[MSP430_REG_SR] |= MSP430_SR_N;
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if (res_data & (msb << 1))
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dev->regs[MSP430_REG_SR] |= MSP430_SR_C;
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if (!((src_data ^ dst_data) & msb) &&
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(src_data ^ dst_data) & msb)
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dev->regs[MSP430_REG_SR] |= MSP430_SR_V;
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break;
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case MSP430_OP_DADD:
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res_data = src_data + dst_data;
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if (dev->regs[MSP430_REG_SR] & MSP430_SR_C)
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res_data++;
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dev->regs[MSP430_REG_SR] &= ~ARITH_BITS;
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if (!(res_data & mask))
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dev->regs[MSP430_REG_SR] |= MSP430_SR_Z;
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if (res_data == 1)
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dev->regs[MSP430_REG_SR] |= MSP430_SR_N;
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if ((is_byte && res_data > 99) ||
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(!is_byte && res_data > 9999))
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dev->regs[MSP430_REG_SR] |= MSP430_SR_C;
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break;
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case MSP430_OP_BIT:
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case MSP430_OP_AND:
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res_data = src_data & dst_data;
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dev->regs[MSP430_REG_SR] &= ~ARITH_BITS;
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dev->regs[MSP430_REG_SR] |=
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(res_data & mask) ? MSP430_SR_C : MSP430_SR_Z;
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if (res_data & msb)
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dev->regs[MSP430_REG_SR] |= MSP430_SR_N;
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break;
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case MSP430_OP_BIC:
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res_data = dst_data & ~src_data;
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break;
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case MSP430_OP_BIS:
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res_data = dst_data | src_data;
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break;
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case MSP430_OP_XOR:
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res_data = dst_data ^ src_data;
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dev->regs[MSP430_REG_SR] &= ~ARITH_BITS;
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dev->regs[MSP430_REG_SR] |=
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(res_data & mask) ? MSP430_SR_C : MSP430_SR_Z;
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if (res_data & msb)
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dev->regs[MSP430_REG_SR] |= MSP430_SR_N;
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if (src_data & dst_data & msb)
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dev->regs[MSP430_REG_SR] |= MSP430_SR_V;
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break;
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default:
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fprintf(stderr, "sim: invalid double-operand opcode: "
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"0x%04x (PC = 0x%04x)\n",
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opcode, dev->current_insn);
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return -1;
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}
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if (opcode != MSP430_OP_CMP && opcode != MSP430_OP_BIT)
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store_operand(dev, amode_dst, dreg, is_byte,
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dst_addr, res_data);
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return 0;
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}
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static int step_single(struct sim_device *dev, uint16_t ins)
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{
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uint16_t opcode = ins & 0xff80;
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int is_byte = ins & 0x0040;
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int amode = (ins >> 4) & 0x3;
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int reg = ins & 0x000f;
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uint16_t msb = is_byte ? 0x80 : 0x8000;
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uint32_t mask = is_byte ? 0xff : 0xffff;
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uint16_t src_addr = 0;
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uint32_t src_data;
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uint32_t res_data = 0;
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if (fetch_operand(dev, amode, reg, is_byte, &src_addr, &src_data) < 0)
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return -1;
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switch (opcode) {
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case MSP430_OP_RRC:
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case MSP430_OP_RRA:
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res_data = (src_data >> 1) & ~msb;
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if (opcode == MSP430_OP_RRC) {
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if (dev->regs[MSP430_REG_SR] & MSP430_SR_C)
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res_data |= msb;
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} else {
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res_data |= src_data & msb;
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}
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dev->regs[MSP430_REG_SR] &= ~ARITH_BITS;
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if (!(res_data & mask))
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dev->regs[MSP430_REG_SR] |= MSP430_SR_Z;
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if (res_data & msb)
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dev->regs[MSP430_REG_SR] |= MSP430_SR_N;
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if (src_data & 1)
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dev->regs[MSP430_REG_SR] |= MSP430_SR_C;
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break;
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case MSP430_OP_SWPB:
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res_data = ((src_data & 0xff) << 8) | ((src_data >> 8) & 0xff);
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break;
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case MSP430_OP_SXT:
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res_data = src_data & 0xff;
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dev->regs[MSP430_REG_SR] &= ~ARITH_BITS;
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if (src_data & 0x80) {
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res_data |= 0xff00;
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dev->regs[MSP430_REG_SR] |= MSP430_SR_N;
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}
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dev->regs[MSP430_REG_SR] |=
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(res_data & mask) ? MSP430_SR_C : MSP430_SR_Z;
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break;
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case MSP430_OP_PUSH:
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dev->regs[MSP430_REG_SP] -= 2;
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MEM_SETW(dev, dev->regs[MSP430_REG_SP], src_data);
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break;
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case MSP430_OP_CALL:
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dev->regs[MSP430_REG_SP] -= 2;
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MEM_SETW(dev, dev->regs[MSP430_REG_SP],
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dev->regs[MSP430_REG_PC]);
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dev->regs[MSP430_REG_PC] = src_data;
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break;
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case MSP430_OP_RETI:
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dev->regs[MSP430_REG_SR] =
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MEM_GETW(dev, dev->regs[MSP430_REG_SP]);
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dev->regs[MSP430_REG_SP] += 2;
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dev->regs[MSP430_REG_PC] =
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MEM_GETW(dev, dev->regs[MSP430_REG_SP]);
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dev->regs[MSP430_REG_SP] += 2;
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break;
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default:
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fprintf(stderr, "sim: unknown single-operand opcode: 0x%04x "
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"(PC = 0x%04x)\n", opcode, dev->current_insn);
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return -1;
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}
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if (opcode != MSP430_OP_PUSH && opcode != MSP430_OP_CALL &&
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opcode != MSP430_OP_RETI)
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store_operand(dev, amode, reg, is_byte, src_addr, res_data);
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return 0;
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}
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static int step_jump(struct sim_device *dev, uint16_t ins)
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{
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uint16_t opcode = ins & 0xfc00;
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uint16_t pc_offset = (ins & 0x03ff) << 1;
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uint16_t sr = dev->regs[MSP430_REG_SR];
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if (pc_offset & 0x0400)
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pc_offset |= 0xff800;
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switch (opcode) {
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case MSP430_OP_JNZ:
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sr = !(sr & MSP430_SR_Z);
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break;
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case MSP430_OP_JZ:
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sr &= MSP430_SR_Z;
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break;
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case MSP430_OP_JNC:
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sr = !(sr & MSP430_SR_C);
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break;
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case MSP430_OP_JC:
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sr &= MSP430_SR_C;
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break;
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case MSP430_OP_JN:
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sr &= MSP430_SR_N;
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break;
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case MSP430_OP_JGE:
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sr = ((sr & MSP430_SR_N) ? 1 : 0) ==
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((sr & MSP430_SR_V) ? 1 : 0);
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break;
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case MSP430_OP_JL:
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sr = ((sr & MSP430_SR_N) ? 1 : 0) !=
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((sr & MSP430_SR_V) ? 1 : 0);
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break;
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case MSP430_OP_JMP:
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sr = 1;
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break;
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}
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if (sr)
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dev->regs[MSP430_REG_PC] += pc_offset;
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return 0;
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}
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static int step_cpu(struct sim_device *dev)
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{
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uint16_t ins;
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int ret;
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/* Fetch the instruction */
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dev->current_insn = dev->regs[MSP430_REG_PC];
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ins = MEM_GETW(dev, dev->current_insn);
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dev->regs[MSP430_REG_PC] += 2;
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/* Handle different instruction types */
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if ((ins & 0xf000) >= 0x4000)
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ret = step_double(dev, ins);
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else if ((ins & 0xf000) >= 0x2000)
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ret = step_jump(dev, ins);
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else
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ret = step_single(dev, ins);
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/* If things went wrong, restart at the current instruction */
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if (ret < 0)
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dev->regs[MSP430_REG_PC] = dev->current_insn;
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return ret;
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}
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/************************************************************************
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* Device interface
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*/
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static void sim_destroy(device_t dev_base)
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{
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free(dev_base);
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}
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static int sim_readmem(device_t dev_base, uint16_t addr,
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uint8_t *mem, int len)
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{
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struct sim_device *dev = (struct sim_device *)dev_base;
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if (addr + len > MEM_SIZE)
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len = MEM_SIZE - addr;
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memcpy(mem, dev->memory + addr, len);
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return 0;
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}
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static int sim_writemem(device_t dev_base, uint16_t addr,
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const uint8_t *mem, int len)
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{
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struct sim_device *dev = (struct sim_device *)dev_base;
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if (addr + len > MEM_SIZE)
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len = MEM_SIZE - addr;
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memcpy(dev->memory + addr, mem, len);
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return 0;
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}
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static int sim_getregs(device_t dev_base, uint16_t *regs)
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{
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struct sim_device *dev = (struct sim_device *)dev_base;
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memcpy(regs, dev->regs, sizeof(dev->regs));
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return 0;
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}
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static int sim_setregs(device_t dev_base, const uint16_t *regs)
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{
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struct sim_device *dev = (struct sim_device *)dev_base;
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memcpy(dev->regs, regs, sizeof(dev->regs));
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return 0;
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}
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static int sim_breakpoint(device_t dev_base, int enabled, uint16_t addr)
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{
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struct sim_device *dev = (struct sim_device *)dev_base;
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dev->have_breakpoint = enabled;
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dev->breakpoint_addr = addr;
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return 0;
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}
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static int sim_ctl(device_t dev_base, device_ctl_t op)
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{
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struct sim_device *dev = (struct sim_device *)dev_base;
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switch (op) {
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case DEVICE_CTL_RESET:
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memset(dev->regs, 0, sizeof(dev->regs));
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dev->regs[MSP430_REG_PC] = MEM_GETW(dev, 0xfffe);
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return 0;
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case DEVICE_CTL_ERASE:
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memset(dev->memory, 0xff, MEM_SIZE);
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return 0;
|
|
|
|
case DEVICE_CTL_HALT:
|
|
dev->running = 0;
|
|
return 0;
|
|
|
|
case DEVICE_CTL_STEP:
|
|
return step_cpu(dev);
|
|
|
|
case DEVICE_CTL_RUN:
|
|
dev->running = 1;
|
|
return 0;
|
|
}
|
|
|
|
return 0;
|
|
}
|
|
|
|
static device_status_t sim_poll(device_t dev_base)
|
|
{
|
|
struct sim_device *dev = (struct sim_device *)dev_base;
|
|
int count = 1000000;
|
|
|
|
ctrlc_reset();
|
|
while (dev->running && count > 0) {
|
|
if (dev->have_breakpoint &&
|
|
dev->regs[MSP430_REG_PC] == dev->breakpoint_addr) {
|
|
printf("Breakpoint reached\n");
|
|
dev->running = 0;
|
|
break;
|
|
}
|
|
|
|
if (dev->regs[MSP430_REG_SR] & MSP430_SR_CPUOFF) {
|
|
printf("CPU disabled\n");
|
|
dev->running = 0;
|
|
break;
|
|
}
|
|
|
|
if (step_cpu(dev) < 0) {
|
|
dev->running = 0;
|
|
return DEVICE_STATUS_ERROR;
|
|
}
|
|
|
|
if (ctrlc_check())
|
|
return DEVICE_STATUS_INTR;
|
|
|
|
count--;
|
|
}
|
|
|
|
return dev->running ? DEVICE_STATUS_RUNNING : DEVICE_STATUS_HALTED;
|
|
}
|
|
|
|
device_t sim_open(sim_fetch_func_t fetch_func,
|
|
sim_store_func_t store_func,
|
|
void *user_data)
|
|
{
|
|
struct sim_device *dev = malloc(sizeof(*dev));
|
|
|
|
if (!dev) {
|
|
perror("can't allocate memory for simulation");
|
|
return NULL;
|
|
}
|
|
|
|
dev->base.destroy = sim_destroy;
|
|
dev->base.readmem = sim_readmem;
|
|
dev->base.writemem = sim_writemem;
|
|
dev->base.getregs = sim_getregs;
|
|
dev->base.setregs = sim_setregs;
|
|
dev->base.breakpoint = sim_breakpoint;
|
|
dev->base.ctl = sim_ctl;
|
|
dev->base.poll = sim_poll;
|
|
|
|
dev->fetch_func = fetch_func;
|
|
dev->store_func = store_func;
|
|
dev->user_data = user_data;
|
|
|
|
memset(dev->memory, 0xff, sizeof(dev->memory));
|
|
memset(dev->regs, 0xff, sizeof(dev->regs));
|
|
|
|
dev->running = 0;
|
|
dev->current_insn = 0;
|
|
dev->have_breakpoint = 0;
|
|
dev->breakpoint_addr = 0;
|
|
|
|
printf("Simulation started, 0x%x bytes of RAM\n", MEM_SIZE);
|
|
return (device_t)dev;
|
|
}
|