578 lines
14 KiB
C
578 lines
14 KiB
C
/* MSPDebug - debugging tool for the eZ430
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* Copyright (C) 2009, 2010 Daniel Beer
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License as published by
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* the Free Software Foundation; either version 2 of the License, or
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* (at your option) any later version.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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* You should have received a copy of the GNU General Public License
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* along with this program; if not, write to the Free Software
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* Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
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*/
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#include <assert.h>
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#include <stdlib.h>
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#include <string.h>
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#include <stdio.h>
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#include <ctype.h>
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#include "dis.h"
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#include "util.h"
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/**********************************************************************/
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/* Disassembler
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*/
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/* Decode a single-operand instruction.
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*
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* Returns the number of bytes consumed in decoding, or -1 if the a
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* valid single-operand instruction could not be found.
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*/
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static int decode_single(const u_int8_t *code, u_int16_t offset,
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u_int16_t size, struct msp430_instruction *insn)
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{
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u_int16_t op = (code[1] << 8) | code[0];
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int need_arg = 0;
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insn->op = op & 0xff80;
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insn->is_byte_op = op & 0x0400;
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insn->dst_mode = (op >> 4) & 0x3;
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insn->dst_reg = op & 0xf;
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switch (insn->dst_mode) {
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case MSP430_AMODE_REGISTER: break;
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case MSP430_AMODE_INDEXED:
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need_arg = 1;
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if (insn->dst_reg == MSP430_REG_PC) {
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insn->dst_addr = offset + 2;
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insn->dst_mode = MSP430_AMODE_SYMBOLIC;
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} else if (insn->dst_reg == MSP430_REG_SR)
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insn->dst_mode = MSP430_AMODE_ABSOLUTE;
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break;
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case MSP430_AMODE_INDIRECT: break;
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case MSP430_AMODE_INDIRECT_INC:
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if (insn->dst_reg == MSP430_REG_PC) {
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insn->dst_mode = MSP430_AMODE_IMMEDIATE;
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need_arg = 1;
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}
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break;
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default: break;
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}
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if (need_arg) {
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if (size < 4)
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return -1;
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insn->dst_addr += (code[3] << 8) | code[2];
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return 4;
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}
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return 2;
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}
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/* Decode a double-operand instruction.
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*
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* Returns the number of bytes consumed or -1 if a valid instruction
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* could not be found.
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*/
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static int decode_double(const u_int8_t *code, u_int16_t offset,
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u_int16_t size, struct msp430_instruction *insn)
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{
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u_int16_t op = (code[1] << 8) | code[0];
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int need_src = 0;
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int need_dst = 0;
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int ret = 2;
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insn->op = op & 0xf000;
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insn->is_byte_op = op & 0x0040;
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insn->src_mode = (op >> 4) & 0x3;
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insn->src_reg = (op >> 8) & 0xf;
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insn->dst_mode = (op >> 7) & 0x1;
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insn->dst_reg = op & 0xf;
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switch (insn->dst_mode) {
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case MSP430_AMODE_REGISTER: break;
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case MSP430_AMODE_INDEXED:
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need_dst = 1;
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if (insn->dst_reg == MSP430_REG_PC) {
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insn->dst_mode = MSP430_AMODE_SYMBOLIC;
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insn->dst_addr = offset + 2;
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} else if (insn->dst_reg == MSP430_REG_SR)
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insn->dst_mode = MSP430_AMODE_ABSOLUTE;
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break;
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default: break;
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}
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switch (insn->src_mode) {
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case MSP430_AMODE_REGISTER: break;
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case MSP430_AMODE_INDEXED:
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need_src = 1;
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if (insn->src_reg == MSP430_REG_PC) {
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insn->src_mode = MSP430_AMODE_SYMBOLIC;
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insn->dst_addr = offset + 2;
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} else if (insn->src_reg == MSP430_REG_SR)
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insn->src_mode = MSP430_AMODE_ABSOLUTE;
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else if (insn->src_reg == MSP430_REG_R3)
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need_src = 0;
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break;
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case MSP430_AMODE_INDIRECT: break;
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case MSP430_AMODE_INDIRECT_INC:
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if (insn->src_reg == MSP430_REG_PC) {
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insn->src_mode = MSP430_AMODE_IMMEDIATE;
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need_src = 1;
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}
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break;
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default: break;
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}
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offset += 2;
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code += 2;
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size -= 2;
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if (need_src) {
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if (size < 2)
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return -1;
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insn->src_addr += (code[1] << 8) | code[0];
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offset += 2;
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code += 2;
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size -= 2;
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ret += 2;
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}
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if (need_dst) {
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if (size < 2)
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return -1;
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insn->dst_addr += (code[1] << 8) | code[0];
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ret += 2;
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}
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return ret;
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}
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/* Decode a jump instruction.
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*
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* All jump instructions are one word in length, so this function
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* always returns 2 (to indicate the consumption of 2 bytes).
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*/
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static int decode_jump(const u_int8_t *code, u_int16_t offset, u_int16_t len,
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struct msp430_instruction *insn)
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{
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u_int16_t op = (code[1] << 8) | code[0];
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int tgtrel = op & 0x3ff;
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if (tgtrel & 0x200)
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tgtrel -= 0x400;
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insn->op = op & 0xfc00;
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insn->dst_addr = offset + 2 + tgtrel * 2;
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insn->dst_mode = MSP430_AMODE_SYMBOLIC;
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insn->dst_reg = MSP430_REG_PC;
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return 2;
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}
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static void remap_cgen(msp430_amode_t *mode,
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u_int16_t *addr,
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msp430_reg_t *reg)
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{
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if (*reg == MSP430_REG_SR) {
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if (*mode == MSP430_AMODE_INDIRECT) {
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*mode = MSP430_AMODE_IMMEDIATE;
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*addr = 4;
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} else if (*mode == MSP430_AMODE_INDIRECT_INC) {
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*mode = MSP430_AMODE_IMMEDIATE;
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*addr = 8;
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}
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} else if (*reg == MSP430_REG_R3) {
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if (*mode == MSP430_AMODE_REGISTER)
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*addr = 0;
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else if (*mode == MSP430_AMODE_INDEXED)
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*addr = 1;
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else if (*mode == MSP430_AMODE_INDIRECT)
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*addr = 2;
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else if (*mode == MSP430_AMODE_INDIRECT_INC)
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*addr = 0xffff;
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*mode = MSP430_AMODE_IMMEDIATE;
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}
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}
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/* Take a decoded instruction and replace certain addressing modes of
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* the constant generator registers with their corresponding immediate
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* values.
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*/
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static void find_cgens(struct msp430_instruction *insn)
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{
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if (insn->itype == MSP430_ITYPE_DOUBLE)
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remap_cgen(&insn->src_mode, &insn->src_addr,
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&insn->src_reg);
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else if (insn->itype == MSP430_ITYPE_SINGLE)
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remap_cgen(&insn->dst_mode, &insn->dst_addr,
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&insn->dst_reg);
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}
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/* Recognise special cases of real instructions and translate them to
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* emulated instructions.
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*/
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static void find_emulated_ops(struct msp430_instruction *insn)
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{
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switch (insn->op) {
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case MSP430_OP_ADD:
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if (insn->src_mode == MSP430_AMODE_IMMEDIATE) {
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if (insn->src_addr == 1) {
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insn->op = MSP430_OP_INC;
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insn->itype = MSP430_ITYPE_SINGLE;
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} else if (insn->src_addr == 2) {
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insn->op = MSP430_OP_INCD;
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insn->itype = MSP430_ITYPE_SINGLE;
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}
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} else if (insn->dst_mode == insn->src_mode &&
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insn->dst_reg == insn->src_reg &&
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insn->dst_addr == insn->src_addr) {
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insn->op = MSP430_OP_RLA;
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insn->itype = MSP430_ITYPE_SINGLE;
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}
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break;
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case MSP430_OP_ADDC:
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if (insn->src_mode == MSP430_AMODE_IMMEDIATE &&
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!insn->src_addr) {
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insn->op = MSP430_OP_ADC;
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insn->itype = MSP430_ITYPE_SINGLE;
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} else if (insn->dst_mode == insn->src_mode &&
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insn->dst_reg == insn->src_reg &&
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insn->dst_addr == insn->src_addr) {
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insn->op = MSP430_OP_RLC;
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insn->itype = MSP430_ITYPE_SINGLE;
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}
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break;
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case MSP430_OP_BIC:
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if (insn->dst_mode == MSP430_AMODE_REGISTER &&
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insn->dst_reg == MSP430_REG_SR &&
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insn->src_mode == MSP430_AMODE_IMMEDIATE) {
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if (insn->src_addr == 1) {
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insn->op = MSP430_OP_CLRC;
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insn->itype = MSP430_ITYPE_NOARG;
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} else if (insn->src_addr == 4) {
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insn->op = MSP430_OP_CLRN;
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insn->itype = MSP430_ITYPE_NOARG;
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} else if (insn->src_addr == 2) {
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insn->op = MSP430_OP_CLRZ;
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insn->itype = MSP430_ITYPE_NOARG;
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} else if (insn->src_addr == 8) {
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insn->op = MSP430_OP_DINT;
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insn->itype = MSP430_ITYPE_NOARG;
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}
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}
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break;
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case MSP430_OP_BIS:
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if (insn->dst_mode == MSP430_AMODE_REGISTER &&
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insn->dst_reg == MSP430_REG_SR &&
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insn->src_mode == MSP430_AMODE_IMMEDIATE) {
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if (insn->src_addr == 1) {
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insn->op = MSP430_OP_SETC;
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insn->itype = MSP430_ITYPE_NOARG;
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} else if (insn->src_addr == 4) {
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insn->op = MSP430_OP_SETN;
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insn->itype = MSP430_ITYPE_NOARG;
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} else if (insn->src_addr == 2) {
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insn->op = MSP430_OP_SETZ;
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insn->itype = MSP430_ITYPE_NOARG;
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} else if (insn->src_addr == 8) {
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insn->op = MSP430_OP_EINT;
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insn->itype = MSP430_ITYPE_NOARG;
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}
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}
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break;
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case MSP430_OP_CMP:
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if (insn->src_mode == MSP430_AMODE_IMMEDIATE &&
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!insn->src_addr) {
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insn->op = MSP430_OP_TST;
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insn->itype = MSP430_ITYPE_SINGLE;
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}
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break;
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case MSP430_OP_DADD:
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if (insn->src_mode == MSP430_AMODE_IMMEDIATE &&
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!insn->src_addr) {
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insn->op = MSP430_OP_DADC;
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insn->itype = MSP430_ITYPE_SINGLE;
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}
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break;
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case MSP430_OP_MOV:
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if (insn->src_mode == MSP430_AMODE_INDIRECT_INC &&
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insn->src_reg == MSP430_REG_SP) {
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if (insn->dst_mode == MSP430_AMODE_REGISTER &&
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insn->dst_reg == MSP430_REG_PC) {
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insn->op = MSP430_OP_RET;
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insn->itype = MSP430_ITYPE_NOARG;
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} else {
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insn->op = MSP430_OP_POP;
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insn->itype = MSP430_ITYPE_SINGLE;
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}
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} else if (insn->dst_mode == MSP430_AMODE_REGISTER &&
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insn->dst_reg == MSP430_REG_PC) {
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insn->op = MSP430_OP_BR;
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insn->itype = MSP430_ITYPE_SINGLE;
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insn->dst_mode = insn->src_mode;
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insn->dst_reg = insn->src_reg;
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insn->dst_addr = insn->src_addr;
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} else if (insn->src_mode == MSP430_AMODE_IMMEDIATE &&
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!insn->src_addr) {
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if (insn->dst_mode == MSP430_AMODE_REGISTER &&
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insn->dst_reg == MSP430_REG_R3) {
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insn->op = MSP430_OP_NOP;
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insn->itype = MSP430_ITYPE_NOARG;
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} else {
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insn->op = MSP430_OP_CLR;
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insn->itype = MSP430_ITYPE_SINGLE;
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}
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}
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break;
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case MSP430_OP_SUB:
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if (insn->src_mode == MSP430_AMODE_IMMEDIATE) {
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if (insn->src_addr == 1) {
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insn->op = MSP430_OP_DEC;
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insn->itype = MSP430_ITYPE_SINGLE;
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} else if (insn->src_addr == 2) {
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insn->op = MSP430_OP_DECD;
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insn->itype = MSP430_ITYPE_SINGLE;
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}
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}
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break;
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case MSP430_OP_SUBC:
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if (insn->src_mode == MSP430_AMODE_IMMEDIATE &&
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!insn->src_addr) {
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insn->op = MSP430_OP_SBC;
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insn->itype = MSP430_ITYPE_SINGLE;
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}
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break;
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case MSP430_OP_XOR:
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if (insn->src_mode == MSP430_AMODE_IMMEDIATE &&
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insn->src_addr == 0xffff) {
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insn->op = MSP430_OP_INV;
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insn->itype = MSP430_ITYPE_SINGLE;
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}
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break;
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default: break;
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}
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}
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/* Decode a single instruction.
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*
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* Returns the number of bytes consumed, or -1 if an error occured.
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*
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* The caller needs to pass a pointer to the bytes to be decoded, the
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* virtual offset of those bytes, and the maximum number available. If
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* successful, the decoded instruction is written into the structure
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* pointed to by insn.
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*/
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int dis_decode(const u_int8_t *code, u_int16_t offset, u_int16_t len,
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struct msp430_instruction *insn)
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{
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u_int16_t op;
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int ret;
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memset(insn, 0, sizeof(*insn));
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if (len < 2)
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return -1;
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insn->offset = offset;
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op = (code[1] << 8) | code[0];
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if ((op & 0xf000) == 0x1000)
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insn->itype = MSP430_ITYPE_SINGLE;
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else if ((op & 0xff00) >= 0x2000 &&
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(op & 0xff00) < 0x4000)
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insn->itype = MSP430_ITYPE_JUMP;
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else if ((op & 0xf000) >= 0x4000)
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insn->itype = MSP430_ITYPE_DOUBLE;
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else
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return -1;
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switch (insn->itype) {
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case MSP430_ITYPE_SINGLE:
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ret = decode_single(code, offset, len, insn);
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break;
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case MSP430_ITYPE_DOUBLE:
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ret = decode_double(code, offset, len, insn);
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break;
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case MSP430_ITYPE_JUMP:
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ret = decode_jump(code, offset, len, insn);
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break;
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default: break;
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}
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find_cgens(insn);
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find_emulated_ops(insn);
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if (insn->is_byte_op) {
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if (insn->src_mode == MSP430_AMODE_IMMEDIATE)
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insn->src_addr &= 0xff;
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if (insn->dst_mode == MSP430_AMODE_IMMEDIATE)
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insn->dst_addr &= 0xff;
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}
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insn->len = ret;
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return ret;
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}
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static const struct {
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msp430_op_t op;
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const char *mnemonic;
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} opcode_names[] = {
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/* Single operand */
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{MSP430_OP_RRC, "RRC"},
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{MSP430_OP_SWPB, "SWPB"},
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{MSP430_OP_RRA, "RRA"},
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{MSP430_OP_SXT, "SXT"},
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{MSP430_OP_PUSH, "PUSH"},
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{MSP430_OP_CALL, "CALL"},
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{MSP430_OP_RETI, "RETI"},
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/* Jump */
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{MSP430_OP_JNZ, "JNZ"},
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{MSP430_OP_JZ, "JZ"},
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{MSP430_OP_JNC, "JNC"},
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{MSP430_OP_JC, "JC"},
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{MSP430_OP_JN, "JN"},
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{MSP430_OP_JL, "JL"},
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{MSP430_OP_JGE, "JGE"},
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{MSP430_OP_JMP, "JMP"},
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/* Double operand */
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{MSP430_OP_MOV, "MOV"},
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{MSP430_OP_ADD, "ADD"},
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{MSP430_OP_ADDC, "ADDC"},
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{MSP430_OP_SUBC, "SUBC"},
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{MSP430_OP_SUB, "SUB"},
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{MSP430_OP_CMP, "CMP"},
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{MSP430_OP_DADD, "DADD"},
|
|
{MSP430_OP_BIT, "BIT"},
|
|
{MSP430_OP_BIC, "BIC"},
|
|
{MSP430_OP_BIS, "BIS"},
|
|
{MSP430_OP_XOR, "XOR"},
|
|
{MSP430_OP_AND, "AND"},
|
|
|
|
/* Emulated instructions */
|
|
{MSP430_OP_ADC, "ADC"},
|
|
{MSP430_OP_BR, "BR"},
|
|
{MSP430_OP_CLR, "CLR"},
|
|
{MSP430_OP_CLRC, "CLRC"},
|
|
{MSP430_OP_CLRN, "CLRN"},
|
|
{MSP430_OP_CLRZ, "CLRZ"},
|
|
{MSP430_OP_DADC, "DADC"},
|
|
{MSP430_OP_DEC, "DEC"},
|
|
{MSP430_OP_DECD, "DECD"},
|
|
{MSP430_OP_DINT, "DINT"},
|
|
{MSP430_OP_EINT, "EINT"},
|
|
{MSP430_OP_INC, "INC"},
|
|
{MSP430_OP_INCD, "INCD"},
|
|
{MSP430_OP_INV, "INV"},
|
|
{MSP430_OP_NOP, "NOP"},
|
|
{MSP430_OP_POP, "POP"},
|
|
{MSP430_OP_RET, "RET"},
|
|
{MSP430_OP_RLA, "RLA"},
|
|
{MSP430_OP_RLC, "RLC"},
|
|
{MSP430_OP_SBC, "SBC"},
|
|
{MSP430_OP_SETC, "SETC"},
|
|
{MSP430_OP_SETN, "SETN"},
|
|
{MSP430_OP_SETZ, "SETZ"},
|
|
{MSP430_OP_TST, "TST"}
|
|
};
|
|
|
|
/* Return the mnemonic for an operation, if possible. */
|
|
const char *dis_opcode_name(msp430_op_t op)
|
|
{
|
|
int i;
|
|
|
|
for (i = 0; i < ARRAY_LEN(opcode_names); i++)
|
|
if (op == opcode_names[i].op)
|
|
return opcode_names[i].mnemonic;
|
|
|
|
return NULL;
|
|
}
|
|
|
|
msp430_op_t dis_opcode_from_name(const char *name)
|
|
{
|
|
int i;
|
|
|
|
for (i = 0; i < ARRAY_LEN(opcode_names); i++)
|
|
if (!strcasecmp(name, opcode_names[i].mnemonic))
|
|
return opcode_names[i].op;
|
|
|
|
return -1;
|
|
}
|
|
|
|
static const char *const msp430_reg_names[] = {
|
|
"PC", "SP", "SR", "R3",
|
|
"R4", "R5", "R6", "R7",
|
|
"R8", "R9", "R10", "R11",
|
|
"R12", "R13", "R14", "R15"
|
|
};
|
|
|
|
msp430_reg_t dis_reg_from_name(const char *name)
|
|
{
|
|
const char *num = name;
|
|
|
|
while (num && isdigit(*num))
|
|
num++;
|
|
|
|
if (*num) {
|
|
msp430_reg_t r = atoi(num);
|
|
|
|
if (r >= 0 && r <= 15)
|
|
return r;
|
|
}
|
|
|
|
if (!strcasecmp(name, "pc"))
|
|
return 0;
|
|
if (!strcasecmp(name, "sp"))
|
|
return 1;
|
|
if (!strcasecmp(name, "sr"))
|
|
return 2;
|
|
|
|
return -1;
|
|
}
|
|
|
|
const char *dis_reg_name(msp430_reg_t reg)
|
|
{
|
|
if (reg >= 0 && reg <= 15)
|
|
return msp430_reg_names[reg];
|
|
|
|
return NULL;
|
|
}
|