lots of stuff
This commit is contained in:
parent
cbdd6fb838
commit
69ab51a5e1
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@ -26,8 +26,8 @@ if(FAMILY STREQUAL "rp2040")
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add_executable(${PROJECT})
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add_executable(${PROJECT})
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pico_enable_stdio_uart(${PROJECT} 1)
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pico_enable_stdio_uart(${PROJECT} 0)
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pico_enable_stdio_usb(${PROJECT} 0)
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pico_enable_stdio_usb(${PROJECT} 1)
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# Example source
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# Example source
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target_sources(${PROJECT} PUBLIC
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target_sources(${PROJECT} PUBLIC
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${CMAKE_CURRENT_SOURCE_DIR}/src/main.c
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${CMAKE_CURRENT_SOURCE_DIR}/src/main.c
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@ -46,7 +46,12 @@ if(FAMILY STREQUAL "rp2040")
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${CMAKE_CURRENT_SOURCE_DIR}/src/tool78/tool78_cmds.c
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${CMAKE_CURRENT_SOURCE_DIR}/src/tool78/tool78_cmds.c
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${CMAKE_CURRENT_SOURCE_DIR}/src/test/piotest.c
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${CMAKE_CURRENT_SOURCE_DIR}/src/test/piotest.c
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${CMAKE_CURRENT_SOURCE_DIR}/src/test/delaytest.c
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${CMAKE_CURRENT_SOURCE_DIR}/src/test/delaytest.c
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${CMAKE_CURRENT_SOURCE_DIR}/src/test/piodump.c
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${CMAKE_CURRENT_SOURCE_DIR}/src/glitch/glitch.c
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${CMAKE_CURRENT_SOURCE_DIR}/src/glitch/glitch.c
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${CMAKE_CURRENT_SOURCE_DIR}/src/cli/cli.c
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${CMAKE_CURRENT_SOURCE_DIR}/src/cli/msp430.c
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${CMAKE_CURRENT_SOURCE_DIR}/src/cli/rl78.c
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${CMAKE_CURRENT_SOURCE_DIR}/src/cli/rl78-glitch.c
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)
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)
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# Example include
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# Example include
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@ -57,13 +62,14 @@ if(FAMILY STREQUAL "rp2040")
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${CMAKE_CURRENT_SOURCE_DIR}/src/tool78/
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${CMAKE_CURRENT_SOURCE_DIR}/src/tool78/
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${CMAKE_CURRENT_SOURCE_DIR}/src/test/
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${CMAKE_CURRENT_SOURCE_DIR}/src/test/
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${CMAKE_CURRENT_SOURCE_DIR}/src/glitch/
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${CMAKE_CURRENT_SOURCE_DIR}/src/glitch/
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${CMAKE_CURRENT_SOURCE_DIR}/src/cli/
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)
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)
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# Example defines
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# Example defines
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target_compile_definitions(${PROJECT} PUBLIC
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target_compile_definitions(${PROJECT} PUBLIC
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)
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)
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target_link_libraries(${PROJECT} pico_stdlib pico_unique_id
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target_link_libraries(${PROJECT} pico_stdlib pico_unique_id hardware_adc
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hardware_pio hardware_dma hardware_pwm cmsis_core pico_multicore)
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hardware_pio hardware_dma hardware_pwm cmsis_core pico_multicore)
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pico_generate_pio_header(${PROJECT} ${CMAKE_CURRENT_SOURCE_DIR}/src/msp430/sbw.pio)
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pico_generate_pio_header(${PROJECT} ${CMAKE_CURRENT_SOURCE_DIR}/src/msp430/sbw.pio)
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@ -0,0 +1,138 @@
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#include <stddef.h>
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#include <stdbool.h>
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#include <stdio.h>
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#include <string.h>
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#include <hardware/structs/iobank0.h>
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#include <hardware/adc.h>
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#include <hardware/flash.h>
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#include <hardware/gpio.h>
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#include <pico/stdlib.h>
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#include <pico/stdio_usb.h>
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#include <pico/binary_info.h>
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#include "cli.h"
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void piotest(void);
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void delaytest(void);
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void piodump_main(void);
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void cli_msp430_phy(void);
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void cli_msp430_conn(void);
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void cli_msp430_dump(void);
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void cli_msp430_flash(void);
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void cli_tool78_testtest(void);
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void cli_tool78_prototest(void);
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void cli_tool78_ocdtest(void);
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void cli_tool78_glitch_dump(void);
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void cli_tool78_glitch_paramsearch(void);
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void cli_tool78_glitch_ocd_dump(void);
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static void adc_init_stuff() {
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adc_init();
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adc_gpio_init(27);
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adc_select_input(1);
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sio_hw->gpio_set = 1u << 26;
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sio_hw->gpio_oe_set = 1u << 26;
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gpio_set_function(26, GPIO_FUNC_SIO);
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}
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static void cli_adc_test(void) {
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adc_init_stuff();
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while (true) {
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printf("ADC=%04lx\n", (uint32_t)adc_read());
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busy_wait_ms(16);
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}
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}
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static void cli_erase_flash(void) {
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flash_range_erase(0, FLASH_PAGE_SIZE);
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static const uint8_t eyecatcher[FLASH_PAGE_SIZE] = "NUKE";
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flash_range_program(0, eyecatcher, FLASH_PAGE_SIZE);
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}
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static struct cli_cmd cmds[] = {
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{ "adctest", cli_adc_test },
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{ "piotest", piotest },
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{ "delaytest", delaytest },
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{ "eraseflash", cli_erase_flash },
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{ "piodump", piodump_main },
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{ "m430phy", cli_msp430_phy },
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{ "m430conn", cli_msp430_conn },
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{ "m430dump", cli_msp430_dump },
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{ "m430flash", cli_msp430_flash },
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{ "rl78phy", cli_tool78_testtest },
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{ "rl78sfp", cli_tool78_prototest },
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{ "rl78ocd", cli_tool78_ocdtest },
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{ "g78dump", cli_tool78_glitch_dump },
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{ "g78param", cli_tool78_glitch_paramsearch },
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{ "g78ocd", cli_tool78_glitch_ocd_dump },
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{ NULL, NULL } // final
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};
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void cli_init(void) {
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stdio_usb_init();
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while (!stdio_usb_connected()) ;
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printf("Hi! Run a command, or 'help' for help.\n");
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}
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static char buf[256];
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static const char* readline(void) {
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memset(buf, 0, sizeof buf);
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for (size_t off = 0; ; ) {
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int c = getchar();
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if (c == EOF) break;
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putchar(c);
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if (c == '\r') return buf;
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if (c == '\n') continue;
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if (strlen(buf) >= 255) return buf;
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if (c == '\b') {
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buf[off] = '\0';
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--off;
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} else if (c == '\t') {
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// TODO: tab completion?
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} else {
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buf[off] = (char)c;
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++off;
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}
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}
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return buf;
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}
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static void print_help(void) {
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printf("Enter 'help' or one of the below commands from the list to run:\n");
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printf("\n");
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printf("\t%s\n", "help");
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for (size_t i = 0; cmds[i].name && cmds[i].func; ++i) {
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printf("\t%s\n", cmds[i].name);
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}
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}
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void cli_main(void) {
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printf("\n> "); fflush(stdout);
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const char* line = readline();
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printf("\n");
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for (size_t i = 0; cmds[i].name && cmds[i].func; ++i) {
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if (!strcmp(line, cmds[i].name)) {
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cmds[i].func();
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return;
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}
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}
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print_help();
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}
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@ -0,0 +1,16 @@
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#ifndef CLI_H_
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#define CLI_H_
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typedef void (*cli_cmd_fn_t)(void);
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struct cli_cmd {
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const char* name;
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cli_cmd_fn_t func;
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};
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void cli_init(void);
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void cli_main(void);
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#endif
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#include <stdio.h>
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#include <string.h>
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#include <hardware/gpio.h>
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#include <pico/stdlib.h>
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#include "pio_sbw.h"
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#include "tap.h"
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#include "msp430dbg.h"
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void cli_msp430_phy(void);
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void cli_msp430_conn(void);
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void cli_msp430_dump(void);
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void cli_msp430_flash(void);
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static uint16_t DATA_text[0x24] = {
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0xc232,0x43c2,0x0000,0x4031,0x02fe,0x40f2,0x00ff,0x002a,0x40b2,0x5a10,0x0120,
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0x43d2,0x0000,0xd232,0xd032,0x0018,0x3ffd,0xc3d2,0x0002,0xd3d2,0x0000,0xe3d2,
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0x0029,0x4130,0x1300,0x1300,0x1300,0x1300,0x1300,0x1300,0x12b0,0xf822,0x1300,
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0x1300,0x1300,0x3fdc
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};
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static uint16_t DATA_vectors[0x10] = {
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0xf830,0xf830,0xf832,0xf834,0xf836,0xf830,0xf830,0xf830,
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0xf838,0xf83a,0xf83c,0xf842,0xf830,0xf830,0xf844,0xf846
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};
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// 2k/8k flash, 256b RAM
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static uint16_t dumpmem_ram[256>>1];
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static uint16_t dumpmem_flash[8192>>1];
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void cli_msp430_phy(void) {
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gpio_init(PINOUT_SBW_TCK);
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gpio_set_function(PINOUT_SBW_TCK, GPIO_FUNC_SIO);
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gpio_set_dir(PINOUT_SBW_TCK, true);
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gpio_put(PINOUT_SBW_TCK, true);
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sbw_preinit();
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printf("%s\n", "preinited");
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bool s = sbw_init();
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printf("%s\n", s ? "inited" : "failure");
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uint8_t tdi = 0x0f, tdo = 0;
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sbw_sequence(8, true, &tdi, &tdo);
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printf("seq done, tdo=%02x\n", tdo);
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uint8_t tms = 0xf0;
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sbw_tms_sequence(8, true, &tms);
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printf("tmsseq done\n");
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printf("%s tclk:\n", "set");
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sbw_set_tclk();
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printf("%s tclk:\n", "clr");
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sbw_clr_tclk();
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printf("%s tclk:\n", "set");
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sbw_set_tclk();
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printf("%s tclk:\n", "clr");
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sbw_clr_tclk();
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printf("doing a tclk burst now!\n");
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sbw_tclk_burst(16);
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printf("done.\n");
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sbw_tap_reset();
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sbw_check_fuse();
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uint8_t id = sbw_tap_shift_ir(msp430_ir_bypass);
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printf("JTAG ID=%02x\n", id);
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}
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void cli_msp430_conn(void) {
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gpio_init(PINOUT_SBW_TCK);
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gpio_set_function(PINOUT_SBW_TCK, GPIO_FUNC_SIO);
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gpio_set_dir(PINOUT_SBW_TCK, true);
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gpio_put(PINOUT_SBW_TCK, true);
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sbw_preinit();
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printf("%s\n", "preinited");
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bool s = sbw_init();
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printf("%s\n", s ? "inited" : "failure");
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uint32_t initv = msp430_device_get(200e3);
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printf("init -> %08lx\n", initv);
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msp430_device_release(0xfffe/*0xf800*/);
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}
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void cli_msp430_dump(void) {
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gpio_init(PINOUT_SBW_TCK);
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gpio_set_function(PINOUT_SBW_TCK, GPIO_FUNC_SIO);
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gpio_set_dir(PINOUT_SBW_TCK, true);
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gpio_put(PINOUT_SBW_TCK, true);
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sbw_preinit();
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printf("%s\n", "preinited");
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bool s = sbw_init();
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printf("%s\n", s ? "inited" : "failure");
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uint32_t initv = msp430_device_get(200e3);
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printf("init -> %08lx\n", initv);
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msp430_memory_read_block(0x0f00, 16>>1, dumpmem_ram);
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printf("info dump:\n");
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for (size_t i = 0; i < ( 16>>1); i += 4) {
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printf("%04zx: %04x %04x %04x %04x\n",
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0x0f00+(i<<1), dumpmem_ram[i+0], dumpmem_ram[i+1],
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dumpmem_ram[i+2], dumpmem_ram[i+3]
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);
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}
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msp430_memory_read_block(0x0200, 256>>1, dumpmem_ram);
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printf("RAM dump:\n");
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for (size_t i = 0; i < (256>>1); i += 4) {
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printf("%04zx: %04x %04x %04x %04x\n",
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0x0200+(i<<1), dumpmem_ram[i+0], dumpmem_ram[i+1],
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dumpmem_ram[i+2], dumpmem_ram[i+3]
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);
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}
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msp430_memory_read_block(0xe000, 8192>>1, dumpmem_flash);
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printf("flash dump:\n");
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for (size_t i = 0; i < (8192>>1); i += 4) {
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printf("%04zx: %04x %04x %04x %04x\n",
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0xe000+(i<<1), dumpmem_flash[i+0], dumpmem_flash[i+1],
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dumpmem_flash[i+2], dumpmem_flash[i+3]
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);
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}
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msp430_device_release(0xfffe/*0xf800*/);
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}
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void cli_msp430_flash(void) {
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gpio_init(PINOUT_SBW_TCK);
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gpio_set_function(PINOUT_SBW_TCK, GPIO_FUNC_SIO);
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gpio_set_dir(PINOUT_SBW_TCK, true);
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gpio_put(PINOUT_SBW_TCK, true);
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sbw_preinit();
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printf("%s\n", "preinited");
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bool s = sbw_init();
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printf("%s\n", s ? "inited" : "failure");
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uint32_t initv = msp430_device_get(200e3);
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printf("init -> %08lx\n", initv);
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printf("flashing text...\n");
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for (size_t i = 0; i < 0x24; ++i) {
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printf("%zu : %04x\n", DATA_text[i]);
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msp430_flash_write(0xf800 + (i*2), 1, &DATA_text[i]);
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}
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printf("flashing vectors...\n");
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||||||
|
for (size_t i = 0; i < 0x10; ++i) {
|
||||||
|
msp430_flash_write(0xffe0 + (i*2), 1, &DATA_vectors[i]);
|
||||||
|
}
|
||||||
|
|
||||||
|
printf("dumping for check...\n");
|
||||||
|
msp430_memory_read_block(0xf800, 0x0800>>1, dumpmem_flash);
|
||||||
|
|
||||||
|
printf("flash dump:\n");
|
||||||
|
for (size_t i = 0; i < (2048>>1); i += 4) {
|
||||||
|
printf("%04zx: %04x %04x %04x %04x\n",
|
||||||
|
0xf800+(i<<1), dumpmem_flash[i+0], dumpmem_flash[i+1],
|
||||||
|
dumpmem_flash[i+2], dumpmem_flash[i+3]
|
||||||
|
);
|
||||||
|
}
|
||||||
|
|
||||||
|
/*msp430_memory_write8(0x0024, 0x00); // P2IE =0x00 (no irq)
|
||||||
|
msp430_memory_write8(0x002e, 0x00); // P2SEL=0x00 (gpio)
|
||||||
|
msp430_memory_write8(0x0042, 0x00); // P2SEL2=0 (gpio)
|
||||||
|
msp430_memory_write8(0x002a, 0xff); // P2DIR=0xff (all out)
|
||||||
|
msp430_memory_write8(0x0029, 0x01); // P2OUT=0x01 (P2.0 hi)*/
|
||||||
|
|
||||||
|
msp430_device_release(0xfffe/*0xf800*/);
|
||||||
|
}
|
||||||
|
|
||||||
|
|
@ -0,0 +1,428 @@
|
||||||
|
|
||||||
|
#include <stdio.h>
|
||||||
|
#include <string.h>
|
||||||
|
|
||||||
|
#include <hardware/clocks.h>
|
||||||
|
#include <hardware/gpio.h>
|
||||||
|
#include <hardware/pwm.h>
|
||||||
|
#include <pico/stdlib.h>
|
||||||
|
#include <pico/binary_info.h>
|
||||||
|
|
||||||
|
#include "tool78_hw.h"
|
||||||
|
#include "tool78_cmds.h"
|
||||||
|
#include "glitch.h"
|
||||||
|
|
||||||
|
#define TRIGGER_IN_PIN (14/*-1*/)
|
||||||
|
#define GLITCH_OUT_PIN 15
|
||||||
|
|
||||||
|
void cli_tool78_glitch_dump(void);
|
||||||
|
void cli_tool78_glitch_paramsearch(void);
|
||||||
|
void cli_tool78_glitch_ocd_dump(void);
|
||||||
|
|
||||||
|
#define DUMP_OFFSET 0xef000
|
||||||
|
#define DUMP_SIZE 4096
|
||||||
|
|
||||||
|
/*
|
||||||
|
hw inited
|
||||||
|
baudrate result=0xc1
|
||||||
|
common st=193
|
||||||
|
result: 0xc1 ver=0000
|
||||||
|
init: 193
|
||||||
|
*/
|
||||||
|
/*
|
||||||
|
baudrate result=0x06
|
||||||
|
result: 0x06. sig:
|
||||||
|
0x10 0x00 0x06 0x52 0x35 0x46 0x31 0x30 0x31 0x45 0x45 0x20 0x20 0xff 0xff 0x00 0x00 0x00 0x00 0x03 0x00 0x03
|
||||||
|
secget: 0x06
|
||||||
|
sec: flg=fe bot=03 fsws=0000 fswe=003f
|
||||||
|
*/
|
||||||
|
|
||||||
|
static uint8_t databuf[DUMP_SIZE];
|
||||||
|
|
||||||
|
static void glitch_init_core1_stuff(void) {
|
||||||
|
// REGC = 2.11V / 0.47..1 uF // WUFM: REGC = 1.80V // BUT: OCD mode: always 2.1!
|
||||||
|
static const struct glitch_params gparam = (struct glitch_params){
|
||||||
|
.offset_min_us = 10,
|
||||||
|
.offset_max_us = 35433/100,
|
||||||
|
// with REGC & 10uF Vcc:
|
||||||
|
.length_min_us = 30000,//*4,
|
||||||
|
.length_max_us = 60000,//*8,
|
||||||
|
// with REGC:
|
||||||
|
/*.length_min_us = 4000,
|
||||||
|
.length_max_us = 6300,*/
|
||||||
|
// without REGC:
|
||||||
|
/*.length_min_us = 20,
|
||||||
|
.length_max_us = 70,*/
|
||||||
|
// best glitch voltages (REGC: 1uF):
|
||||||
|
// * with REGC, long pulses: 1700mV
|
||||||
|
// * no REGC, short pulses: 1300mV
|
||||||
|
// * REGC@VDD, long pulses: 42mV
|
||||||
|
// * REGC@VDD, short pulses: 0V
|
||||||
|
// * with REGC, 10uF@VDD, long pulses: 0..3mV (strict upper limit)
|
||||||
|
// * 100uF@VDD: too much, even w/o REGC
|
||||||
|
.trigger_in_pin = TRIGGER_IN_PIN,
|
||||||
|
.glitch_out_pin = GLITCH_OUT_PIN,
|
||||||
|
.trigger_in_polarity = glitch_positive,
|
||||||
|
.glitch_out_polarity = glitch_positive,
|
||||||
|
.impl = glitch_impl_core1,
|
||||||
|
.offset_cur = 0, .length_cur = 0
|
||||||
|
};
|
||||||
|
glitch_ready(&gparam);
|
||||||
|
}
|
||||||
|
static void glitch_init_pwm_stuff(void) {
|
||||||
|
const float dutycycle = (2.1f + 0.00f) / 3.3f + 0.0125f;//25f /* calibration (more) */;
|
||||||
|
const int PIN_PWM_VREG = 22;
|
||||||
|
const uint32_t pwm_period = /*5*/500; // 200 Hz at a 1 MHz clock freq
|
||||||
|
|
||||||
|
uint32_t sliceno = pwm_gpio_to_slice_num(PIN_PWM_VREG);
|
||||||
|
pwm_set_clkdiv_int_frac(sliceno, (uint8_t)(clock_get_hz(clk_sys)/1e6f), 0); // 1 MHz clock
|
||||||
|
pwm_set_wrap(sliceno, pwm_period); // total period
|
||||||
|
pwm_set_chan_level(sliceno, pwm_gpio_to_channel(PIN_PWM_VREG),
|
||||||
|
(uint32_t)(pwm_period*dutycycle));
|
||||||
|
pwm_set_phase_correct(sliceno, true);
|
||||||
|
pwm_set_output_polarity(sliceno, false, false);
|
||||||
|
pwm_set_clkdiv_mode(sliceno, PWM_DIV_FREE_RUNNING);
|
||||||
|
pwm_set_enabled(sliceno, true);
|
||||||
|
gpio_set_function(PIN_PWM_VREG, GPIO_FUNC_PWM);
|
||||||
|
}
|
||||||
|
|
||||||
|
static uint8_t exec_jmp_to_ram[] = {
|
||||||
|
0xfc, 0x00, 0xf9, 0x0f, // call !!ff900
|
||||||
|
0xd7, // ret
|
||||||
|
};
|
||||||
|
|
||||||
|
static uint8_t DATA_test_dbg__paramtest[102] = {
|
||||||
|
0x71, 0x7b, 0xfa, 0xf5, 0xf0, 0x02, 0xf5, 0x78, 0x00, 0x71, 0x6a, 0xa4, 0xcf,
|
||||||
|
0x76, 0x00, 0x01, 0xce, 0x22, 0x00, 0xf5, 0x62, 0x00, 0xf5, 0x77, 0x00, 0xf5,
|
||||||
|
0x79, 0x00, 0xf5, 0x75, 0x00, 0xf5, 0x7c, 0x00, 0xce, 0x02, 0x00, 0xce, 0x02,
|
||||||
|
0xff, 0x30, 0x00, 0xfa, 0x16, 0x52, 0x00, 0x53, 0xff, 0x51, 0x00, 0x81, 0x93,
|
||||||
|
0xdf, 0xfc, 0x92, 0x61, 0xf9, 0xdf, 0xf3, 0xce, 0x02, 0x00, 0x52, 0x18, 0x53,
|
||||||
|
0xff, 0x93, 0xdf, 0xfd, 0x92, 0xdf, 0xf8, 0x51, 0x48, 0xfc, 0xa1, 0xff, 0x0e,
|
||||||
|
0x51, 0x69, 0xfc, 0xa1, 0xff, 0x0e, 0x50, 0xaa, 0x52, 0x00, 0x92, 0x61, 0xe9,
|
||||||
|
0x61, 0x78, 0xfc, 0xa1, 0xff, 0x0e, 0xd2, 0xdf, 0xf4, 0xef, 0xbf
|
||||||
|
};
|
||||||
|
|
||||||
|
static uint8_t dumper_shellcode[0x26] = {
|
||||||
|
//0xe0, 0x07, 0x26, // 0xF07E0 location, 0x26 length of packet
|
||||||
|
0x41, 0x00, 0x34, 0x00, 0x00, 0x00, 0x11, 0x89, 0xFC, 0xA1, 0xFF, 0x0E, 0xA5, 0x15, 0x44,
|
||||||
|
0x00, 0x00, 0xDF, 0xF3, 0xEF, 0x04, 0x55, 0x00, 0x00, 0x00, 0x8E, 0xFD, 0x81, 0x5C, 0x0F,
|
||||||
|
0x9E, 0xFD, 0x71, 0x00, 0x90, 0x00, 0xEF, 0xE0
|
||||||
|
};
|
||||||
|
|
||||||
|
void cli_tool78_glitch_dump(void) {
|
||||||
|
uint8_t passwd[10] = {0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00};
|
||||||
|
uint16_t ver;
|
||||||
|
enum tool78_stat st;
|
||||||
|
int rr;
|
||||||
|
|
||||||
|
ver=0;
|
||||||
|
while (true) {
|
||||||
|
st = tool78_init_ocd(&tool78_hw_rl78_uart1, &ver, passwd);
|
||||||
|
if (st == 0xc3) {
|
||||||
|
rr = tool78_hw_rl78_uart1.recv(1, &st, 120*1000*1000);
|
||||||
|
if (rr != 1) {
|
||||||
|
printf("aaaa\n");
|
||||||
|
goto deinit_bad;
|
||||||
|
}
|
||||||
|
}
|
||||||
|
printf("result: 0x%02x ver=%04x\n", st, ver);
|
||||||
|
if (st != 0xf2 && st != 0xf0) {
|
||||||
|
printf("init: %d\n", st);
|
||||||
|
goto deinit_bad;
|
||||||
|
}
|
||||||
|
break;
|
||||||
|
}
|
||||||
|
|
||||||
|
// can't write too much at 0xf07e0 as 0xf0800 and up contains OCD state,
|
||||||
|
// overwrite this and suddenly the OCD system resets itself
|
||||||
|
st = tool78_ocd_write(&tool78_hw_rl78_uart1, 0x07e0,
|
||||||
|
sizeof(exec_jmp_to_ram), exec_jmp_to_ram);
|
||||||
|
//printf("write shellcode res 0x%02x\n", st);
|
||||||
|
if (st != 0) {
|
||||||
|
printf("trampoline write failed: %d\n", st);
|
||||||
|
goto deinit_bad;
|
||||||
|
}
|
||||||
|
|
||||||
|
st = tool78_ocd_write(&tool78_hw_rl78_uart1, 0xf900,
|
||||||
|
sizeof(dumper_shellcode), dumper_shellcode);
|
||||||
|
//printf("write shellcode res 0x%02x\n", st);
|
||||||
|
if (st != 0) {
|
||||||
|
printf("shellcode write failed: %d\n", st);
|
||||||
|
goto deinit_bad;
|
||||||
|
}
|
||||||
|
|
||||||
|
st = tool78_ocd_exec(&tool78_hw_rl78_uart1);
|
||||||
|
//printf("exec res 0x%02x\n", st);
|
||||||
|
if (st != 0) {
|
||||||
|
printf("exec failed: %d\n", st);
|
||||||
|
goto deinit_bad;
|
||||||
|
}
|
||||||
|
|
||||||
|
for (size_t iii = 0; iii < DUMP_SIZE + DUMP_OFFSET; ++iii) {
|
||||||
|
// wait for completion
|
||||||
|
size_t off = (iii < DUMP_OFFSET) ? 0 : (iii - DUMP_OFFSET);
|
||||||
|
rr = tool78_hw_rl78_uart1.recv(1, &databuf[off], 120*1000*1000);
|
||||||
|
if (rr != 1) {
|
||||||
|
printf("exec code: no response :/ (%d)\n", rr);
|
||||||
|
goto deinit_bad;
|
||||||
|
}
|
||||||
|
}
|
||||||
|
|
||||||
|
for (size_t iii = 0; iii < DUMP_SIZE; ++iii) {
|
||||||
|
printf("%02x%s", databuf[iii], ((iii & 0xf) == 0xf) ? "\n" : " ");
|
||||||
|
}
|
||||||
|
|
||||||
|
deinit_bad:
|
||||||
|
tool78_hw_rl78_uart1.deinit();
|
||||||
|
return;
|
||||||
|
}
|
||||||
|
|
||||||
|
void cli_tool78_glitch_paramsearch(void) {
|
||||||
|
glitch_init_core1_stuff();
|
||||||
|
|
||||||
|
uint8_t passwd[10] = {0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00};
|
||||||
|
uint16_t ver;
|
||||||
|
enum tool78_stat st;
|
||||||
|
int rr;
|
||||||
|
static uint8_t checkbuf[256];
|
||||||
|
bool first = true;
|
||||||
|
|
||||||
|
restart:
|
||||||
|
/*glitch_disarm();
|
||||||
|
busy_wait_ms(40);*/
|
||||||
|
|
||||||
|
ver=0;
|
||||||
|
st = tool78_init_ocd(&tool78_hw_rl78_uart1, &ver, passwd);
|
||||||
|
//printf("result: 0x%02x ver=%04x\n", st, ver);
|
||||||
|
if (st != 0xf2 && st != 0xf0) {
|
||||||
|
printf("init: %d\n", st);
|
||||||
|
goto deinit_bad;
|
||||||
|
}
|
||||||
|
|
||||||
|
// can't write too much at 0xf07e0 as 0xf0800 and up contains OCD state,
|
||||||
|
// overwrite this and suddenly the OCD system resets itself
|
||||||
|
st = tool78_ocd_write(&tool78_hw_rl78_uart1, 0x07e0,
|
||||||
|
sizeof(exec_jmp_to_ram), exec_jmp_to_ram);
|
||||||
|
//printf("write trampoline res 0x%02x\n", st);
|
||||||
|
if (st != 0) {
|
||||||
|
printf("trampoline write failed: %d\n", st);
|
||||||
|
goto deinit_bad;
|
||||||
|
}
|
||||||
|
st = tool78_ocd_write(&tool78_hw_rl78_uart1, 0xf900,
|
||||||
|
sizeof(DATA_test_dbg__paramtest), DATA_test_dbg__paramtest);
|
||||||
|
//printf("write code res 0x%02x\n", st);
|
||||||
|
if (st != 0) {
|
||||||
|
printf("code write failed: %d\n", st);
|
||||||
|
goto deinit_bad;
|
||||||
|
}
|
||||||
|
|
||||||
|
st = tool78_ocd_exec(&tool78_hw_rl78_uart1);
|
||||||
|
//printf("exec res 0x%02x\n", st);
|
||||||
|
if (st != 0) {
|
||||||
|
printf("exec failed: %d\n", st);
|
||||||
|
goto deinit_bad;
|
||||||
|
}
|
||||||
|
|
||||||
|
// test custom tool_tx call
|
||||||
|
/*rr = tool78_hw_rl78_uart1.recv(1, checkbuf, 1000);
|
||||||
|
printf("rr=%d\n", rr);
|
||||||
|
if (rr == 1) printf("0x%02x %c\n", stuff[0], stuff[0]);*/
|
||||||
|
|
||||||
|
// wait for completion
|
||||||
|
rr = tool78_hw_rl78_uart1.recv(2, checkbuf, 120*1000);
|
||||||
|
if (rr != 2) {
|
||||||
|
printf("exec code: no response :/ (%d)\n", rr);
|
||||||
|
goto deinit_bad;
|
||||||
|
}
|
||||||
|
|
||||||
|
if (checkbuf[0] != 'H' && checkbuf[1] != 'i') {
|
||||||
|
printf("bad response: %02x %02x\n", checkbuf[0], checkbuf[1]);
|
||||||
|
goto deinit_bad;
|
||||||
|
}
|
||||||
|
|
||||||
|
rr = tool78_hw_rl78_uart1.recv(256, checkbuf, 120*1000);
|
||||||
|
if (rr != 256) {
|
||||||
|
printf("exec code: no data sendback (%d)\n", rr);
|
||||||
|
goto deinit_bad;
|
||||||
|
}
|
||||||
|
|
||||||
|
for (size_t i = 0; i < 256; ++i) {
|
||||||
|
if (checkbuf[i] != (0xff^0xaa)) {
|
||||||
|
printf("bad value at index %zu: %02x\n", i, checkbuf[i]^0xaa);
|
||||||
|
goto deinit_bad;
|
||||||
|
}
|
||||||
|
}
|
||||||
|
if (first) printf("all set, let's go\n");
|
||||||
|
first = false;
|
||||||
|
|
||||||
|
while (true) {
|
||||||
|
glitch_arm();
|
||||||
|
rr = tool78_hw_rl78_uart1.recv(2, checkbuf, 120*1000);
|
||||||
|
glitch_disarm();
|
||||||
|
if (rr == 2 && (checkbuf[0] != 'H' || checkbuf[1] != 'i')) rr = 0;
|
||||||
|
if (rr == 2) {
|
||||||
|
rr = tool78_hw_rl78_uart1.recv(256, checkbuf, 120*1000);
|
||||||
|
}
|
||||||
|
|
||||||
|
if (rr <= 0) {
|
||||||
|
// timeout or something
|
||||||
|
printf("X");
|
||||||
|
tool78_hw_rl78_uart1.deinit();
|
||||||
|
goto restart;
|
||||||
|
} else {
|
||||||
|
int firstbad = -1, lastbad = -1;
|
||||||
|
for (int i = 0; i < rr; ++i) {
|
||||||
|
if (checkbuf[i] != (0xaa^0xff)) {
|
||||||
|
if (firstbad == -1) firstbad = i;
|
||||||
|
lastbad = i;
|
||||||
|
}
|
||||||
|
}
|
||||||
|
if (firstbad >= 0) {
|
||||||
|
volatile uint32_t
|
||||||
|
*off = (volatile uint32_t*)&glitch_param_cur.offset_cur,
|
||||||
|
*len = (volatile uint32_t*)&glitch_param_cur.length_cur;
|
||||||
|
printf("glitch first=%d last=%d off=%lu len=%lu rr=%d v=%02x\n",
|
||||||
|
firstbad, lastbad, *off, *len, rr, checkbuf[firstbad]^0xaa);
|
||||||
|
} else printf(".");
|
||||||
|
}
|
||||||
|
}
|
||||||
|
|
||||||
|
deinit_bad:
|
||||||
|
tool78_hw_rl78_uart1.deinit();
|
||||||
|
return;
|
||||||
|
}
|
||||||
|
|
||||||
|
void cli_tool78_glitch_ocd_dump(void) {
|
||||||
|
glitch_init_core1_stuff();
|
||||||
|
|
||||||
|
uint8_t passwd[10] = {0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00};
|
||||||
|
uint16_t ver;
|
||||||
|
int st, rr;
|
||||||
|
static uint8_t checkbuf[256];
|
||||||
|
bool first = true;
|
||||||
|
|
||||||
|
restart:
|
||||||
|
/*glitch_disarm();
|
||||||
|
busy_wait_ms(40);*/
|
||||||
|
|
||||||
|
ver=0;
|
||||||
|
st = tool78_init_ocd(&tool78_hw_rl78_uart1, &ver, passwd);
|
||||||
|
if (st == 0xc3) {
|
||||||
|
printf("aa\n");
|
||||||
|
st = 0;
|
||||||
|
rr = tool78_hw_rl78_uart1.recv(1, (uint8_t*)&st, 120*1000);
|
||||||
|
printf("rr=%d\n", rr);
|
||||||
|
if (rr != 1) {
|
||||||
|
printf("aaaa\n");
|
||||||
|
goto do_reset_stuff;
|
||||||
|
}
|
||||||
|
}
|
||||||
|
if (first) printf("result: 0x%02x ver=%04x\n", st, ver);
|
||||||
|
if (st == 0xc1) goto do_reset_stuff;
|
||||||
|
if (st != 0x10) {
|
||||||
|
printf("init: expected protect error, got %d\n", st);
|
||||||
|
goto deinit_bad;
|
||||||
|
}
|
||||||
|
busy_wait_ms(16); // leave time to recharge
|
||||||
|
|
||||||
|
// right now, the RL78 core is stuck in an infinite loop doing nothing in
|
||||||
|
// the debug monitor part of its bootrom. however, the code we need is
|
||||||
|
// right below it, so we can simply try to glitch it without having to meet
|
||||||
|
// the timing
|
||||||
|
// see https://fail0verflow.com/blog/2018/ps4-syscon/ for more info
|
||||||
|
|
||||||
|
// try up to 16 times because we can't discern between a reset and a glitch
|
||||||
|
// that had no effect. after 16 iterations without result, reset the RL78
|
||||||
|
// and try again.
|
||||||
|
// a successful glitch will output a single null byte over the TOOL0 line
|
||||||
|
|
||||||
|
// apparently we have about 95 ms until the infinite loop gets reset into
|
||||||
|
// the MCU flash automatically? somehow?? I suppose it's the WDT
|
||||||
|
if (first) printf("all set, let's go\n");
|
||||||
|
first = false;
|
||||||
|
|
||||||
|
glitch_arm();
|
||||||
|
for (size_t i = 0; i < 16; ++i) {
|
||||||
|
glitch_trigger_sw_core1();
|
||||||
|
rr = tool78_hw_rl78_uart1.recv(1, checkbuf, 12*1000);
|
||||||
|
if (rr != 1) {
|
||||||
|
busy_wait_ms(1); // leave time to recharge
|
||||||
|
printf(".");
|
||||||
|
continue;
|
||||||
|
}
|
||||||
|
|
||||||
|
printf("checkbuf: %d", checkbuf[0]);
|
||||||
|
printf("\n!!!\n");
|
||||||
|
glitch_disarm();
|
||||||
|
goto success;
|
||||||
|
}
|
||||||
|
glitch_disarm();
|
||||||
|
|
||||||
|
printf(":");
|
||||||
|
do_reset_stuff:
|
||||||
|
tool78_hw_rl78_uart1.deinit();
|
||||||
|
|
||||||
|
// glitch for way too long to power cycle
|
||||||
|
sio_hw->gpio_set = 1u << GLITCH_OUT_PIN;
|
||||||
|
busy_wait_ms(16);
|
||||||
|
sio_hw->gpio_clr = 1u << GLITCH_OUT_PIN;
|
||||||
|
|
||||||
|
goto restart;
|
||||||
|
|
||||||
|
success:
|
||||||
|
ver = 0;
|
||||||
|
st = tool78_ocd_version(&tool78_hw_rl78_uart1, &ver);
|
||||||
|
if (st) {
|
||||||
|
printf("OCD: get version failed: %d\n", st);
|
||||||
|
goto do_reset_stuff;
|
||||||
|
}
|
||||||
|
st = tool78_ocd_connect(&tool78_hw_rl78_uart1, passwd);
|
||||||
|
if (st != 0xf0 && st != 0xf2) {
|
||||||
|
printf("OCD: connect failed: %d\n", st);
|
||||||
|
goto deinit_bad;
|
||||||
|
}
|
||||||
|
|
||||||
|
// can't write too much at 0xf07e0 as 0xf0800 and up contains OCD state,
|
||||||
|
// overwrite this and suddenly the OCD system resets itself
|
||||||
|
st = tool78_ocd_write(&tool78_hw_rl78_uart1, 0x07e0,
|
||||||
|
sizeof(exec_jmp_to_ram), exec_jmp_to_ram);
|
||||||
|
//printf("write trampoline res 0x%02x\n", st);
|
||||||
|
if (st != 0) {
|
||||||
|
printf("trampoline write failed: %d\n", st);
|
||||||
|
goto deinit_bad;
|
||||||
|
}
|
||||||
|
st = tool78_ocd_write(&tool78_hw_rl78_uart1, 0xf900,
|
||||||
|
sizeof(dumper_shellcode), dumper_shellcode);
|
||||||
|
//printf("write code res 0x%02x\n", st);
|
||||||
|
if (st != 0) {
|
||||||
|
printf("code write failed: %d\n", st);
|
||||||
|
goto deinit_bad;
|
||||||
|
}
|
||||||
|
|
||||||
|
st = tool78_ocd_exec(&tool78_hw_rl78_uart1);
|
||||||
|
//printf("exec res 0x%02x\n", st);
|
||||||
|
if (st != 0) {
|
||||||
|
printf("exec failed: %d\n", st);
|
||||||
|
goto deinit_bad;
|
||||||
|
}
|
||||||
|
|
||||||
|
for (size_t iii = 0; iii < DUMP_SIZE; ++iii) {
|
||||||
|
// wait for completion
|
||||||
|
rr = tool78_hw_rl78_uart1.recv(1, &databuf[iii], 120*1000*1000);
|
||||||
|
if (rr != 1) {
|
||||||
|
printf("exec code: no response :/ (%d)\n", rr);
|
||||||
|
goto deinit_bad;
|
||||||
|
}
|
||||||
|
}
|
||||||
|
|
||||||
|
for (size_t iii = 0; iii < DUMP_SIZE; ++iii) {
|
||||||
|
printf("0x%02x%s", databuf[iii], ((iii & 0xf) == 0xf) ? "\n" : " ");
|
||||||
|
}
|
||||||
|
|
||||||
|
printf("\ndone!\n");
|
||||||
|
|
||||||
|
deinit_bad:
|
||||||
|
tool78_hw_rl78_uart1.deinit();
|
||||||
|
return;
|
||||||
|
}
|
||||||
|
|
||||||
|
|
@ -0,0 +1,164 @@
|
||||||
|
|
||||||
|
#include <stdio.h>
|
||||||
|
#include <string.h>
|
||||||
|
|
||||||
|
#include "tool78_hw.h"
|
||||||
|
#include "tool78_cmds.h"
|
||||||
|
|
||||||
|
void cli_tool78_testtest(void);
|
||||||
|
void cli_tool78_prototest(void);
|
||||||
|
void cli_tool78_ocdtest(void);
|
||||||
|
|
||||||
|
/*static uint16_t DATA_text[0x24] = {
|
||||||
|
0xc232,0x43c2,0x0000,0x4031,0x02fe,0x40f2,0x00ff,0x002a,0x40b2,0x5a10,0x0120,
|
||||||
|
0x43d2,0x0000,0xd232,0xd032,0x0018,0x3ffd,0xc3d2,0x0002,0xd3d2,0x0000,0xe3d2,
|
||||||
|
0x0029,0x4130,0x1300,0x1300,0x1300,0x1300,0x1300,0x1300,0x12b0,0xf822,0x1300,
|
||||||
|
0x1300,0x1300,0x3fdc
|
||||||
|
};
|
||||||
|
static uint16_t DATA_vectors[0x10] = {
|
||||||
|
0xf830,0xf830,0xf832,0xf834,0xf836,0xf830,0xf830,0xf830,
|
||||||
|
0xf838,0xf83a,0xf83c,0xf842,0xf830,0xf830,0xf844,0xf846
|
||||||
|
};
|
||||||
|
|
||||||
|
// 2k/8k flash, 256b RAM
|
||||||
|
static uint16_t dumpmem_ram[256>>1];
|
||||||
|
static uint16_t dumpmem_flash[8192>>1];*/
|
||||||
|
|
||||||
|
static uint8_t shellcode_test[] = {
|
||||||
|
0x51, 0x61, // mov a, #97
|
||||||
|
0xfc, 0xa1, 0xff, 0x0e, // call !!effa1
|
||||||
|
|
||||||
|
0xd7, // ret
|
||||||
|
};
|
||||||
|
|
||||||
|
//static uint8_t DATA_test_dbg[7/*85*/] = {
|
||||||
|
// /*0xe0, 0x07, 0x52,*/ 0x51, 0x61, 0xfc, 0xa1, 0xff, 0x0e,
|
||||||
|
// 0xd7,
|
||||||
|
// /*0x71, 0x7b, 0xfa, 0xf5,
|
||||||
|
// 0xf0, 0x02, 0xf5, 0x78, 0x00, 0x71, 0x6a, 0xa4, 0xcf, 0x76, 0x00, 0x01, 0xce,
|
||||||
|
// 0x22, 0x00, 0xf5, 0x62, 0x00, 0xf5, 0x77, 0x00, 0xf5, 0x79, 0x00, 0xf5, 0x75,
|
||||||
|
// 0x00, 0xf5, 0x7c, 0x00, 0xce, 0x02, 0x00, 0xce, 0x02, 0xff, 0x30, 0x00, 0xf9,
|
||||||
|
// 0x16, 0x52, 0x00, 0x53, 0xff, 0x51, 0x00, 0x81, 0x93, 0xdf, 0xfc, 0x92, 0x61,
|
||||||
|
// 0xf9, 0xdf, 0xf3, 0xce, 0x02, 0x00, 0x52, 0x00, 0x92, 0x61, 0xe9, 0xfc, 0xa1,
|
||||||
|
// 0xff, 0x0e, 0xd2, 0xdf, 0xf6, 0xef, 0xd9*/
|
||||||
|
//};
|
||||||
|
|
||||||
|
static uint8_t buf[32];
|
||||||
|
|
||||||
|
void cli_tool78_testtest(void) {
|
||||||
|
struct tool78_hw* thw = &tool78_hw_test_uart2;
|
||||||
|
|
||||||
|
printf("initing...\n");
|
||||||
|
bool r = thw->init();
|
||||||
|
printf("init: %s\n", r ? "ok" : "nope");
|
||||||
|
|
||||||
|
size_t rrr = thw->send(7, (const uint8_t*)"hello\r\n", 0);
|
||||||
|
printf("sent %zu\n", rrr);
|
||||||
|
|
||||||
|
while (true) {
|
||||||
|
size_t n = thw->recv(31, buf, 0);
|
||||||
|
buf[n] = 0;
|
||||||
|
if (n) {
|
||||||
|
printf("got %zu: '%s'\n", n, (const char*)buf);
|
||||||
|
thw->send(n, buf, 0);
|
||||||
|
}
|
||||||
|
}
|
||||||
|
}
|
||||||
|
|
||||||
|
void cli_tool78_prototest(void) {
|
||||||
|
struct tool78_hw* hw = &tool78_hw_rl78_uart1;
|
||||||
|
|
||||||
|
tool78_silicon_sig_t sig;
|
||||||
|
memset(&sig, 0, sizeof sig);
|
||||||
|
enum tool78_stat st = tool78_init_sfp(&tool78_hw_rl78_uart1, &sig);
|
||||||
|
printf("result: 0x%02x. sig:\n", st);
|
||||||
|
for (size_t i = 0; i < sizeof(struct tool78_silicon_sig_rl78); ++i)
|
||||||
|
printf("0x%02x ", ((const uint8_t*)&sig)[i]);
|
||||||
|
printf("%c", '\n');
|
||||||
|
|
||||||
|
// RL78/G11: 0x10 0x00 0x06 0x52 0x35 0x46 0x31 0x30 0x35 0x34 0x41 0x20 0x20 0xff 0x3f 0x00 0xff 0x17 0x0f 0x03 0x00 0x03
|
||||||
|
// flg=fe bot=03 fsws=0000 fswe=000f
|
||||||
|
|
||||||
|
/*
|
||||||
|
sig result=0x06
|
||||||
|
result: 0x06. sig:
|
||||||
|
0x10 0x00 0x06 0x52 0x35 0x46 0x31 0x30 0x35 0x34 0x41 0x20 0x20 0xff 0x3f 0x00 0xff 0x17 0x0f 0x03 0x00 0x03
|
||||||
|
secget: 0x06
|
||||||
|
sec: flg=fe bot=03 fsws=0000 fswe=000f
|
||||||
|
blank check: 0x06
|
||||||
|
*/
|
||||||
|
|
||||||
|
// NOTE: RL78 ONLY
|
||||||
|
struct tool78_security sec;
|
||||||
|
memset(&sec, 0, sizeof sec);
|
||||||
|
st = tool78_do_security_get(&tool78_hw_rl78_uart1, &sec);
|
||||||
|
printf("secget: 0x%02x\n", st);
|
||||||
|
printf("sec: flg=%02x bot=%02x fsws=%04x fswe=%04x\n", sec.flg, sec.bot, sec.fsws, sec.fswe);
|
||||||
|
|
||||||
|
//st = tool78_do_security_release(&tool78_hw_rl78_uart1);
|
||||||
|
//printf("sec rel: 0x%02x\n", st);
|
||||||
|
/*st = tool78_do_block_blank_check(hw, 0, 0x3ff, false);
|
||||||
|
printf("blank check: 0x%02x\n", st);*/
|
||||||
|
/*st = tool78_do_programming(hw, 0, 0x000ff, DATA_test_rom);
|
||||||
|
printf("programming: 0x%02x\n", st);*/
|
||||||
|
|
||||||
|
/*st = tool78_do_verify(hw, 0, 0x0ff, DATA_test_rom);
|
||||||
|
printf("verify: 0x%02x\n", st);*/
|
||||||
|
}
|
||||||
|
|
||||||
|
void cli_tool78_ocdtest(void) {
|
||||||
|
uint8_t passwd[10] = {0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00};
|
||||||
|
uint16_t ver;
|
||||||
|
enum tool78_stat st;
|
||||||
|
int rr;
|
||||||
|
uint8_t checkbuf[2];
|
||||||
|
bool first = true;
|
||||||
|
|
||||||
|
ver=0;
|
||||||
|
while (true) {
|
||||||
|
st = tool78_init_ocd(&tool78_hw_rl78_uart1, &ver, passwd);
|
||||||
|
if (st == 0xc3) {
|
||||||
|
rr = tool78_hw_rl78_uart1.recv(1, &st, 120*1000*1000);
|
||||||
|
if (rr != 1) {
|
||||||
|
printf("aaaa\n");
|
||||||
|
goto deinit_bad;
|
||||||
|
}
|
||||||
|
}
|
||||||
|
printf("result: 0x%02x ver=%04x\n", st, ver);
|
||||||
|
if (st != 0xf2 && st != 0xf0) {
|
||||||
|
printf("init: %d\n", st);
|
||||||
|
goto deinit_bad;
|
||||||
|
}
|
||||||
|
break;
|
||||||
|
}
|
||||||
|
|
||||||
|
// can't write too much at 0xf07e0 as 0xf0800 and up contains OCD state,
|
||||||
|
// overwrite this and suddenly the OCD system resets itself
|
||||||
|
st = tool78_ocd_write(&tool78_hw_rl78_uart1, 0x07e0,
|
||||||
|
sizeof(shellcode_test), shellcode_test);
|
||||||
|
//printf("write shellcode res 0x%02x\n", st);
|
||||||
|
if (st != 0) {
|
||||||
|
printf("shellcode write failed: %d\n", st);
|
||||||
|
goto deinit_bad;
|
||||||
|
}
|
||||||
|
|
||||||
|
st = tool78_ocd_exec(&tool78_hw_rl78_uart1);
|
||||||
|
//printf("exec res 0x%02x\n", st);
|
||||||
|
if (st != 0) {
|
||||||
|
printf("exec failed: %d\n", st);
|
||||||
|
goto deinit_bad;
|
||||||
|
}
|
||||||
|
|
||||||
|
// wait for completion
|
||||||
|
rr = tool78_hw_rl78_uart1.recv(1, checkbuf, 120*1000*1000);
|
||||||
|
if (rr != 1) {
|
||||||
|
printf("exec code: no response :/ (%d)\n", rr);
|
||||||
|
goto deinit_bad;
|
||||||
|
}
|
||||||
|
printf("result: '%c' (0x%02x)\n", checkbuf[0], checkbuf[0]);
|
||||||
|
|
||||||
|
deinit_bad:
|
||||||
|
tool78_hw_rl78_uart1.deinit();
|
||||||
|
return;
|
||||||
|
}
|
||||||
|
|
||||||
|
|
@ -9,6 +9,7 @@
|
||||||
#include <system_RP2040.h>
|
#include <system_RP2040.h>
|
||||||
#include <core_cm0plus.h>
|
#include <core_cm0plus.h>
|
||||||
#include <hardware/structs/iobank0.h>
|
#include <hardware/structs/iobank0.h>
|
||||||
|
#include <hardware/adc.h>
|
||||||
#include <hardware/clocks.h>
|
#include <hardware/clocks.h>
|
||||||
#include <hardware/gpio.h>
|
#include <hardware/gpio.h>
|
||||||
#include <hardware/irq.h>
|
#include <hardware/irq.h>
|
||||||
|
|
@ -24,7 +25,7 @@
|
||||||
#define CORE0_FUNC(f) __scratch_x(STRINGIFY(f)) f
|
#define CORE0_FUNC(f) __scratch_x(STRINGIFY(f)) f
|
||||||
#define CORE1_FUNC(f) __scratch_y(STRINGIFY(f)) f
|
#define CORE1_FUNC(f) __scratch_y(STRINGIFY(f)) f
|
||||||
|
|
||||||
struct glitch_params glitch_param_cur = {0};
|
volatile struct glitch_params glitch_param_cur = {0};
|
||||||
#define param_cur glitch_param_cur
|
#define param_cur glitch_param_cur
|
||||||
|
|
||||||
|
|
||||||
|
|
@ -47,11 +48,15 @@ static void CORE1_FUNC(pcg32_fast_init)(uint64_t seed) {
|
||||||
|
|
||||||
|
|
||||||
|
|
||||||
|
// ADC value is in low 12 bits of adc_read()
|
||||||
|
// FIXME: length_min_us = -1 => adc breaks?
|
||||||
#define CORE1_PRE_CALC() /* BIG TODO HERE! */ \
|
#define CORE1_PRE_CALC() /* BIG TODO HERE! */ \
|
||||||
uint32_t off = param_cur.offset_min_us + \
|
uint32_t off = param_cur.offset_min_us + \
|
||||||
(pcg32_fast() % (param_cur.offset_max_us - param_cur.offset_min_us)), \
|
(pcg32_fast() % (param_cur.offset_max_us - param_cur.offset_min_us)), \
|
||||||
len = param_cur.length_min_us + \
|
len = (param_cur.length_min_us < 0) \
|
||||||
(pcg32_fast() % (param_cur.length_max_us - param_cur.length_min_us)), \
|
? (((uint32_t)adc_read() * param_cur.length_max_us) >> 12) \
|
||||||
|
: (param_cur.length_min_us + (pcg32_fast() % \
|
||||||
|
(param_cur.length_max_us - param_cur.length_min_us))), \
|
||||||
iom = 1u << param_cur.glitch_out_pin \
|
iom = 1u << param_cur.glitch_out_pin \
|
||||||
|
|
||||||
#define CORE1_DO_GLITCH() \
|
#define CORE1_DO_GLITCH() \
|
||||||
|
|
@ -74,15 +79,44 @@ static void CORE1_FUNC(glitch_core1_thread)(void) {
|
||||||
if (param_cur.trigger_in_pin < 0) {
|
if (param_cur.trigger_in_pin < 0) {
|
||||||
SCB->SCR &= ~SCB_SCR_SEVONPEND_Msk; // don't resume WFE on interrupt
|
SCB->SCR &= ~SCB_SCR_SEVONPEND_Msk; // don't resume WFE on interrupt
|
||||||
|
|
||||||
|
const int irq = SIO_IRQ_PROC1;
|
||||||
|
|
||||||
|
irq_set_enabled(irq, false);
|
||||||
|
multicore_fifo_clear_irq();
|
||||||
|
irq_set_priority(irq, PICO_HIGHEST_IRQ_PRIORITY);
|
||||||
|
//delayt1_irq_enable(pio0);
|
||||||
|
//irq_set_exclusive_handler(irq, core1_irq);
|
||||||
|
__disable_irq();
|
||||||
|
irq_set_enabled(irq, true);
|
||||||
|
|
||||||
while (true) {
|
while (true) {
|
||||||
CORE1_PRE_CALC();
|
CORE1_PRE_CALC();
|
||||||
|
bool arm = *(volatile bool*)¶m_cur.armed;
|
||||||
|
|
||||||
|
__WFI();
|
||||||
|
irq_set_enabled(irq, false);
|
||||||
|
if (!arm) goto continue_;
|
||||||
|
arm = *(volatile bool*)¶m_cur.armed;
|
||||||
|
if (!arm) goto continue_;
|
||||||
|
|
||||||
|
CORE1_DO_GLITCH();
|
||||||
|
multicore_fifo_drain();
|
||||||
|
multicore_fifo_clear_irq();
|
||||||
|
continue_:
|
||||||
|
irq_set_enabled(irq, true);
|
||||||
|
}
|
||||||
|
|
||||||
|
/*while (true) {
|
||||||
|
CORE1_PRE_CALC();
|
||||||
|
bool arm = *(volatile bool*)¶m_cur.armed;
|
||||||
|
|
||||||
__WFE();
|
__WFE();
|
||||||
bool arm = *(volatile bool*)¶m_cur.armed;
|
if (!arm) continue;
|
||||||
|
arm = *(volatile bool*)¶m_cur.armed;
|
||||||
if (!arm) continue;
|
if (!arm) continue;
|
||||||
|
|
||||||
CORE1_DO_GLITCH();
|
CORE1_DO_GLITCH();
|
||||||
}
|
}*/
|
||||||
} else {
|
} else {
|
||||||
// init gpio irq
|
// init gpio irq
|
||||||
const int gpio = param_cur.trigger_in_pin;
|
const int gpio = param_cur.trigger_in_pin;
|
||||||
|
|
@ -106,11 +140,18 @@ static void CORE1_FUNC(glitch_core1_thread)(void) {
|
||||||
//CORE1_DO_GLITCH();
|
//CORE1_DO_GLITCH();
|
||||||
busy_wait_us_32(off);
|
busy_wait_us_32(off);
|
||||||
if (!(sio_hw->gpio_in & (1u<<gpio))) goto cont;
|
if (!(sio_hw->gpio_in & (1u<<gpio))) goto cont;
|
||||||
sio_hw->gpio_set = iom;
|
|
||||||
busy_wait_us_32(len);
|
|
||||||
sio_hw->gpio_clr = iom;
|
|
||||||
param_cur.offset_cur = off;
|
param_cur.offset_cur = off;
|
||||||
param_cur.length_cur = len;
|
param_cur.length_cur = len;
|
||||||
|
sio_hw->gpio_set = iom;
|
||||||
|
asm volatile(
|
||||||
|
"1: sub %[counter], #1\n"
|
||||||
|
"cmp %[counter], #0\n"
|
||||||
|
"bne 1b\n"
|
||||||
|
:[counter]"+r"(len)
|
||||||
|
::
|
||||||
|
);
|
||||||
|
//busy_wait_us_32(len);
|
||||||
|
sio_hw->gpio_clr = iom;
|
||||||
|
|
||||||
cont:
|
cont:
|
||||||
irq_set_enabled(irq, true);
|
irq_set_enabled(irq, true);
|
||||||
|
|
@ -199,6 +240,19 @@ bool CORE0_FUNC(glitch_ready)(const struct glitch_params* params) {
|
||||||
|
|
||||||
uint func = GPIO_FUNC_SIO; // TODO: PIO when implemented
|
uint func = GPIO_FUNC_SIO; // TODO: PIO when implemented
|
||||||
|
|
||||||
|
if (params->length_min_us < 0) {
|
||||||
|
// ADC1: ADC mode
|
||||||
|
adc_init();
|
||||||
|
adc_gpio_init(27);
|
||||||
|
adc_select_input(1);
|
||||||
|
// ADC0 = GPIO26 = fixed high (as vref)
|
||||||
|
sio_hw->gpio_set = 1u << 26;
|
||||||
|
sio_hw->gpio_oe_set = 1u << 26;
|
||||||
|
gpio_set_function(26, GPIO_FUNC_SIO);
|
||||||
|
} else {
|
||||||
|
gpio_set_function(26, GPIO_FUNC_NULL);
|
||||||
|
}
|
||||||
|
|
||||||
if (params->trigger_in_pin >= 0) {
|
if (params->trigger_in_pin >= 0) {
|
||||||
//gpio_set_input_hysteresis_enabled(params->trigger_in_pin, false);
|
//gpio_set_input_hysteresis_enabled(params->trigger_in_pin, false);
|
||||||
//gpio_set_dir(params->trigger_in_pin, GPIO_IN );
|
//gpio_set_dir(params->trigger_in_pin, GPIO_IN );
|
||||||
|
|
|
||||||
|
|
@ -30,14 +30,15 @@ struct glitch_params {
|
||||||
bool armed;
|
bool armed;
|
||||||
};
|
};
|
||||||
|
|
||||||
extern struct glitch_params glitch_param_cur;
|
extern volatile struct glitch_params glitch_param_cur;
|
||||||
|
|
||||||
// return false: something wrong about the parameters
|
// return false: something wrong about the parameters
|
||||||
bool glitch_ready(const struct glitch_params* params);
|
bool glitch_ready(const struct glitch_params* params);
|
||||||
void glitch_stop(void);
|
void glitch_stop(void);
|
||||||
|
|
||||||
static inline void glitch_trigger_sw_core1(void) {
|
static inline void glitch_trigger_sw_core1(void) {
|
||||||
asm volatile("sev");
|
//asm volatile("sev");
|
||||||
|
sio_hw->fifo_wr = 1;
|
||||||
}
|
}
|
||||||
static inline void glitch_trigger_sw_pio(void) {
|
static inline void glitch_trigger_sw_pio(void) {
|
||||||
// TODO: implement
|
// TODO: implement
|
||||||
|
|
|
||||||
483
src/main.c
483
src/main.c
|
|
@ -2,489 +2,18 @@
|
||||||
#include <stdio.h>
|
#include <stdio.h>
|
||||||
#include <string.h>
|
#include <string.h>
|
||||||
|
|
||||||
#include <hardware/gpio.h>
|
|
||||||
#include <pico/stdlib.h>
|
#include <pico/stdlib.h>
|
||||||
#include <pico/binary_info.h>
|
#include <pico/binary_info.h>
|
||||||
|
|
||||||
#include "pio_sbw.h"
|
#include "cli.h"
|
||||||
#include "tap.h"
|
|
||||||
#include "msp430dbg.h"
|
|
||||||
#include "tool78_hw.h"
|
|
||||||
#include "tool78_cmds.h"
|
|
||||||
#include "glitch.h"
|
|
||||||
|
|
||||||
void piotest(void);
|
|
||||||
void delaytest(void);
|
|
||||||
|
|
||||||
/*static uint16_t DATA_text[0x24] = {
|
|
||||||
0xc232,0x43c2,0x0000,0x4031,0x02fe,0x40f2,0x00ff,0x002a,0x40b2,0x5a10,0x0120,
|
|
||||||
0x43d2,0x0000,0xd232,0xd032,0x0018,0x3ffd,0xc3d2,0x0002,0xd3d2,0x0000,0xe3d2,
|
|
||||||
0x0029,0x4130,0x1300,0x1300,0x1300,0x1300,0x1300,0x1300,0x12b0,0xf822,0x1300,
|
|
||||||
0x1300,0x1300,0x3fdc
|
|
||||||
};
|
|
||||||
static uint16_t DATA_vectors[0x10] = {
|
|
||||||
0xf830,0xf830,0xf832,0xf834,0xf836,0xf830,0xf830,0xf830,
|
|
||||||
0xf838,0xf83a,0xf83c,0xf842,0xf830,0xf830,0xf844,0xf846
|
|
||||||
};
|
|
||||||
|
|
||||||
// 2k/8k flash, 256b RAM
|
|
||||||
static uint16_t dumpmem_ram[256>>1];
|
|
||||||
static uint16_t dumpmem_flash[8192>>1];*/
|
|
||||||
|
|
||||||
/*static uint8_t shellcode_test[] = {
|
|
||||||
0x51, 0x61, // mov a, #97
|
|
||||||
0xfc, 0xa1, 0xff, 0x0e, // call !!effa1
|
|
||||||
|
|
||||||
0xd7, // ret
|
|
||||||
};*/
|
|
||||||
|
|
||||||
//static uint8_t DATA_test_dbg[7/*85*/] = {
|
|
||||||
// /*0xe0, 0x07, 0x52,*/ 0x51, 0x61, 0xfc, 0xa1, 0xff, 0x0e,
|
|
||||||
// 0xd7,
|
|
||||||
// /*0x71, 0x7b, 0xfa, 0xf5,
|
|
||||||
// 0xf0, 0x02, 0xf5, 0x78, 0x00, 0x71, 0x6a, 0xa4, 0xcf, 0x76, 0x00, 0x01, 0xce,
|
|
||||||
// 0x22, 0x00, 0xf5, 0x62, 0x00, 0xf5, 0x77, 0x00, 0xf5, 0x79, 0x00, 0xf5, 0x75,
|
|
||||||
// 0x00, 0xf5, 0x7c, 0x00, 0xce, 0x02, 0x00, 0xce, 0x02, 0xff, 0x30, 0x00, 0xf9,
|
|
||||||
// 0x16, 0x52, 0x00, 0x53, 0xff, 0x51, 0x00, 0x81, 0x93, 0xdf, 0xfc, 0x92, 0x61,
|
|
||||||
// 0xf9, 0xdf, 0xf3, 0xce, 0x02, 0x00, 0x52, 0x00, 0x92, 0x61, 0xe9, 0xfc, 0xa1,
|
|
||||||
// 0xff, 0x0e, 0xd2, 0xdf, 0xf6, 0xef, 0xd9*/
|
|
||||||
//};
|
|
||||||
|
|
||||||
static uint8_t exec_jmp_to_ram[] = {
|
|
||||||
0xfc, 0x00, 0xf9, 0x0f, // call !!ff900
|
|
||||||
0xd7, // ret
|
|
||||||
};
|
|
||||||
|
|
||||||
static uint8_t DATA_test_dbg[102] = {
|
|
||||||
0x71, 0x7b, 0xfa, 0xf5, 0xf0, 0x02, 0xf5, 0x78, 0x00, 0x71, 0x6a, 0xa4, 0xcf,
|
|
||||||
0x76, 0x00, 0x01, 0xce, 0x22, 0x00, 0xf5, 0x62, 0x00, 0xf5, 0x77, 0x00, 0xf5,
|
|
||||||
0x79, 0x00, 0xf5, 0x75, 0x00, 0xf5, 0x7c, 0x00, 0xce, 0x02, 0x00, 0xce, 0x02,
|
|
||||||
0xff, 0x30, 0x00, 0xfa, 0x16, 0x52, 0x00, 0x53, 0xff, 0x51, 0x00, 0x81, 0x93,
|
|
||||||
0xdf, 0xfc, 0x92, 0x61, 0xf9, 0xdf, 0xf3, 0xce, 0x02, 0x00, 0x52, 0x18, 0x53,
|
|
||||||
0xff, 0x93, 0xdf, 0xfd, 0x92, 0xdf, 0xf8, 0x51, 0x48, 0xfc, 0xa1, 0xff, 0x0e,
|
|
||||||
0x51, 0x69, 0xfc, 0xa1, 0xff, 0x0e, 0x50, 0xaa, 0x52, 0x00, 0x92, 0x61, 0xe9,
|
|
||||||
0x61, 0x78, 0xfc, 0xa1, 0xff, 0x0e, 0xd2, 0xdf, 0xf4, 0xef, 0xbf
|
|
||||||
};
|
|
||||||
|
|
||||||
/*static uint8_t DATA_test_dbg[85] = {
|
|
||||||
0x71, 0x7b, 0xfa, 0xf5, 0xf0, 0x02, 0xf5, 0x78, 0x00, 0x71, 0x6a, 0xa4, 0xcf,
|
|
||||||
0x76, 0x00, 0x01, 0xce, 0x22, 0x00, 0xf5, 0x62, 0x00, 0xf5, 0x77, 0x00, 0xf5,
|
|
||||||
0x79, 0x00, 0xf5, 0x75, 0x00, 0xf5, 0x7c, 0x00, 0xce, 0x02, 0x00, 0xce, 0x02,
|
|
||||||
0xff, 0x30, 0x00, 0xfa, 0x16, 0x52, 0x00, 0x53, 0xff, 0x51, 0x00, 0x81, 0x93,
|
|
||||||
0xdf, 0xfc, 0x92, 0x61, 0xf9, 0xdf, 0xf3, 0xce, 0x02, 0x00, 0x52, 0x18, 0x53,
|
|
||||||
0xff, 0x93, 0xdf, 0xfd, 0x92, 0xdf, 0xf8, 0x51, 0x48, 0xfc, 0xa1, 0xff, 0x0e,
|
|
||||||
0x51, 0x69, 0xfc, 0xa1, 0xff, 0x0e, 0xd7
|
|
||||||
};*/
|
|
||||||
|
|
||||||
static void test_sbw(void) {
|
|
||||||
gpio_init(PINOUT_SBW_TCK);
|
|
||||||
gpio_set_function(PINOUT_SBW_TCK, GPIO_FUNC_SIO);
|
|
||||||
gpio_set_dir(PINOUT_SBW_TCK, true);
|
|
||||||
gpio_put(PINOUT_SBW_TCK, true);
|
|
||||||
|
|
||||||
sbw_preinit();
|
|
||||||
printf("%s\n", "preinited");
|
|
||||||
|
|
||||||
bool s = sbw_init();
|
|
||||||
printf("%s\n", s ? "inited" : "failure");
|
|
||||||
|
|
||||||
/*uint8_t tdi = 0x0f, tdo = 0;
|
|
||||||
sbw_sequence(8, true, &tdi, &tdo);
|
|
||||||
printf("seq done, tdo=%02x\n", tdo);
|
|
||||||
|
|
||||||
uint8_t tms = 0xf0;
|
|
||||||
sbw_tms_sequence(8, true, &tms);
|
|
||||||
printf("tmsseq done\n");
|
|
||||||
|
|
||||||
printf("%s tclk:\n", "set");
|
|
||||||
sbw_set_tclk();
|
|
||||||
printf("%s tclk:\n", "clr");
|
|
||||||
sbw_clr_tclk();
|
|
||||||
printf("%s tclk:\n", "set");
|
|
||||||
sbw_set_tclk();
|
|
||||||
printf("%s tclk:\n", "clr");
|
|
||||||
sbw_clr_tclk();
|
|
||||||
|
|
||||||
printf("doing a tclk burst now!\n");
|
|
||||||
sbw_tclk_burst(16);
|
|
||||||
printf("done.\n");*/
|
|
||||||
|
|
||||||
/*sbw_tap_reset();
|
|
||||||
sbw_check_fuse();*/
|
|
||||||
|
|
||||||
/*uint8_t id = sbw_tap_shift_ir(msp430_ir_bypass);
|
|
||||||
printf("JTAG ID=%02x\n", id);
|
|
||||||
|
|
||||||
sbw_tap_shift_ir(msp430_ir_ctrl_sig_16bit);
|
|
||||||
uint16_t dr = sbw_tap_read_dr();
|
|
||||||
printf("dr.0 = %04x\n", dr);
|
|
||||||
sbw_clr_tclk(); // FIXME: looks very bad
|
|
||||||
sbw_set_tclk(); // FIXME: looks very bad
|
|
||||||
dr = sbw_tap_read_dr();
|
|
||||||
printf("dr.1 = %04x\n", dr);
|
|
||||||
sbw_clr_tclk(); // FIXME: looks very bad
|
|
||||||
sbw_set_tclk(); // FIXME: looks very bad
|
|
||||||
dr = sbw_tap_read_dr();
|
|
||||||
printf("dr.2 = %04x\n", dr);
|
|
||||||
sbw_clr_tclk(); // FIXME: looks very bad
|
|
||||||
sbw_set_tclk(); // FIXME: looks very bad
|
|
||||||
|
|
||||||
sbw_tap_shift_ir(msp430_ir_data_16bit);
|
|
||||||
dr = sbw_tap_shift_dr(0x3fff); // "jmp ."
|
|
||||||
printf("dr.10 = %04x\n", dr);
|
|
||||||
sbw_clr_tclk(); // looks ok here?
|
|
||||||
sbw_tap_shift_ir(msp430_ir_ctrl_sig_16bit); // FIXME: a
|
|
||||||
dr = sbw_tap_shift_dr(0x2409); // JTAG halt // FIXME: a
|
|
||||||
printf("dr.11 = %04x\n", dr);
|
|
||||||
sbw_set_tclk(); // looks ok here?
|
|
||||||
|
|
||||||
printf("test done\n");*/
|
|
||||||
|
|
||||||
uint32_t initv = msp430_device_get(200e3);
|
|
||||||
printf("init -> %08lx\n", initv);
|
|
||||||
|
|
||||||
/*msp430_memory_read_block(0x0f00, 16>>1, dumpmem_ram);
|
|
||||||
printf("info dump:\n");
|
|
||||||
for (size_t i = 0; i < ( 16>>1); i += 4) {
|
|
||||||
printf("%04zx: %04x %04x %04x %04x\n",
|
|
||||||
0x0f00+(i<<1), dumpmem_ram[i+0], dumpmem_ram[i+1],
|
|
||||||
dumpmem_ram[i+2], dumpmem_ram[i+3]
|
|
||||||
);
|
|
||||||
}
|
|
||||||
|
|
||||||
msp430_memory_read_block(0x0200, 256>>1, dumpmem_ram);
|
|
||||||
|
|
||||||
printf("RAM dump:\n");
|
|
||||||
for (size_t i = 0; i < (256>>1); i += 4) {
|
|
||||||
printf("%04zx: %04x %04x %04x %04x\n",
|
|
||||||
0x0200+(i<<1), dumpmem_ram[i+0], dumpmem_ram[i+1],
|
|
||||||
dumpmem_ram[i+2], dumpmem_ram[i+3]
|
|
||||||
);
|
|
||||||
}
|
|
||||||
|
|
||||||
msp430_memory_read_block(0xe000, 8192>>1, dumpmem_flash);
|
|
||||||
|
|
||||||
printf("flash dump:\n");
|
|
||||||
for (size_t i = 0; i < (8192>>1); i += 4) {
|
|
||||||
printf("%04zx: %04x %04x %04x %04x\n",
|
|
||||||
0xe000+(i<<1), dumpmem_flash[i+0], dumpmem_flash[i+1],
|
|
||||||
dumpmem_flash[i+2], dumpmem_flash[i+3]
|
|
||||||
);
|
|
||||||
}*/
|
|
||||||
|
|
||||||
/*printf("flashing text...\n");
|
|
||||||
for (size_t i = 0; i < 0x24; ++i) {
|
|
||||||
printf("%zu : %04x\n", DATA_text[i]);
|
|
||||||
msp430_flash_write(0xf800 + (i*2), 1, &DATA_text[i]);
|
|
||||||
}
|
|
||||||
printf("flashing vectors...\n");
|
|
||||||
for (size_t i = 0; i < 0x10; ++i) {
|
|
||||||
msp430_flash_write(0xffe0 + (i*2), 1, &DATA_vectors[i]);
|
|
||||||
}*/
|
|
||||||
|
|
||||||
/*printf("dumping for check...\n");
|
|
||||||
msp430_memory_read_block(0xf800, 0x0800>>1, dumpmem_flash);
|
|
||||||
|
|
||||||
printf("flash dump:\n");
|
|
||||||
for (size_t i = 0; i < (2048>>1); i += 4) {
|
|
||||||
printf("%04zx: %04x %04x %04x %04x\n",
|
|
||||||
0xf800+(i<<1), dumpmem_flash[i+0], dumpmem_flash[i+1],
|
|
||||||
dumpmem_flash[i+2], dumpmem_flash[i+3]
|
|
||||||
);
|
|
||||||
}*/
|
|
||||||
|
|
||||||
/*msp430_memory_write8(0x0024, 0x00); // P2IE =0x00 (no irq)
|
|
||||||
msp430_memory_write8(0x002e, 0x00); // P2SEL=0x00 (gpio)
|
|
||||||
msp430_memory_write8(0x0042, 0x00); // P2SEL2=0 (gpio)
|
|
||||||
msp430_memory_write8(0x002a, 0xff); // P2DIR=0xff (all out)
|
|
||||||
msp430_memory_write8(0x0029, 0x01); // P2OUT=0x01 (P2.0 hi)*/
|
|
||||||
|
|
||||||
msp430_device_release(0xfffe/*0xf800*/);
|
|
||||||
}
|
|
||||||
|
|
||||||
static uint8_t buf[32];
|
|
||||||
|
|
||||||
static void tool78_testtest() {
|
|
||||||
struct tool78_hw* thw = &tool78_hw_test_uart2;
|
|
||||||
|
|
||||||
printf("initing...\n");
|
|
||||||
bool r = thw->init();
|
|
||||||
printf("init: %s\n", r ? "ok" : "nope");
|
|
||||||
|
|
||||||
size_t rrr = thw->send(7, (const uint8_t*)"hello\r\n", 0);
|
|
||||||
printf("sent %zu\n", rrr);
|
|
||||||
|
|
||||||
while (true) {
|
|
||||||
size_t n = thw->recv(31, buf, 0);
|
|
||||||
buf[n] = 0;
|
|
||||||
if (n) {
|
|
||||||
printf("got %zu: '%s'\n", n, (const char*)buf);
|
|
||||||
thw->send(n, buf, 0);
|
|
||||||
}
|
|
||||||
}
|
|
||||||
}
|
|
||||||
|
|
||||||
static void tool78_prototest() {
|
|
||||||
struct tool78_hw* hw = &tool78_hw_rl78_uart1;
|
|
||||||
|
|
||||||
tool78_silicon_sig_t sig;
|
|
||||||
memset(&sig, 0, sizeof sig);
|
|
||||||
enum tool78_stat st = tool78_init_sfp(&tool78_hw_rl78_uart1, &sig);
|
|
||||||
printf("result: 0x%02x. sig:\n", st);
|
|
||||||
for (size_t i = 0; i < sizeof(struct tool78_silicon_sig_rl78); ++i)
|
|
||||||
printf("0x%02x ", ((const uint8_t*)&sig)[i]);
|
|
||||||
printf("%c", '\n');
|
|
||||||
|
|
||||||
// RL78/G11: 0x10 0x00 0x06 0x52 0x35 0x46 0x31 0x30 0x35 0x34 0x41 0x20 0x20 0xff 0x3f 0x00 0xff 0x17 0x0f 0x03 0x00 0x03
|
|
||||||
// flg=fe bot=03 fsws=0000 fswe=000f
|
|
||||||
|
|
||||||
/*
|
|
||||||
sig result=0x06
|
|
||||||
result: 0x06. sig:
|
|
||||||
0x10 0x00 0x06 0x52 0x35 0x46 0x31 0x30 0x35 0x34 0x41 0x20 0x20 0xff 0x3f 0x00 0xff 0x17 0x0f 0x03 0x00 0x03
|
|
||||||
secget: 0x06
|
|
||||||
sec: flg=fe bot=03 fsws=0000 fswe=000f
|
|
||||||
blank check: 0x06
|
|
||||||
*/
|
|
||||||
|
|
||||||
// NOTE: RL78 ONLY
|
|
||||||
struct tool78_security sec;
|
|
||||||
memset(&sec, 0, sizeof sec);
|
|
||||||
st = tool78_do_security_get(&tool78_hw_rl78_uart1, &sec);
|
|
||||||
printf("secget: 0x%02x\n", st);
|
|
||||||
printf("sec: flg=%02x bot=%02x fsws=%04x fswe=%04x\n", sec.flg, sec.bot, sec.fsws, sec.fswe);
|
|
||||||
|
|
||||||
//st = tool78_do_security_release(&tool78_hw_rl78_uart1);
|
|
||||||
//printf("sec rel: 0x%02x\n", st);
|
|
||||||
st = tool78_do_block_blank_check(hw, 0, 0x3ff, false);
|
|
||||||
printf("blank check: 0x%02x\n", st);
|
|
||||||
/*st = tool78_do_programming(hw, 0, 0x000ff, DATA_test_rom);
|
|
||||||
printf("programming: 0x%02x\n", st);*/
|
|
||||||
|
|
||||||
/*st = tool78_do_verify(hw, 0, 0x0ff, DATA_test_rom);
|
|
||||||
printf("verify: 0x%02x\n", st);*/
|
|
||||||
}
|
|
||||||
|
|
||||||
static void tool78_ocdtest() {
|
|
||||||
uint8_t passwd[10] = {0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00};
|
|
||||||
uint16_t ver;
|
|
||||||
enum tool78_stat st;
|
|
||||||
int rr;
|
|
||||||
static uint8_t checkbuf[256];
|
|
||||||
bool first = true;
|
|
||||||
|
|
||||||
restart:
|
|
||||||
/*glitch_disarm();
|
|
||||||
busy_wait_ms(40);*/
|
|
||||||
|
|
||||||
ver=0;
|
|
||||||
st = tool78_init_ocd(&tool78_hw_rl78_uart1, &ver, passwd);
|
|
||||||
//printf("result: 0x%02x ver=%04x\n", st, ver);
|
|
||||||
|
|
||||||
// can't write too much at 0xf07e0 as 0xf0800 and up contains OCD state,
|
|
||||||
// overwrite this and suddenly the OCD system resets itself
|
|
||||||
st = tool78_ocd_write(&tool78_hw_rl78_uart1, 0x07e0,
|
|
||||||
sizeof(exec_jmp_to_ram), exec_jmp_to_ram);
|
|
||||||
//printf("write trampoline res 0x%02x\n", st);
|
|
||||||
if (st != 0) {
|
|
||||||
printf("trampoline write failed: %d\n", st);
|
|
||||||
goto deinit_bad;
|
|
||||||
}
|
|
||||||
st = tool78_ocd_write(&tool78_hw_rl78_uart1, 0xf900,
|
|
||||||
sizeof(DATA_test_dbg), DATA_test_dbg);
|
|
||||||
//printf("write code res 0x%02x\n", st);
|
|
||||||
if (st != 0) {
|
|
||||||
printf("code write failed: %d\n", st);
|
|
||||||
goto deinit_bad;
|
|
||||||
}
|
|
||||||
|
|
||||||
st = tool78_ocd_exec(&tool78_hw_rl78_uart1);
|
|
||||||
//printf("exec res 0x%02x\n", st);
|
|
||||||
if (st != 0) {
|
|
||||||
printf("exec failed: %d\n", st);
|
|
||||||
goto deinit_bad;
|
|
||||||
}
|
|
||||||
|
|
||||||
// test custom tool_tx call
|
|
||||||
/*rr = tool78_hw_rl78_uart1.recv(1, checkbuf, 1000);
|
|
||||||
printf("rr=%d\n", rr);
|
|
||||||
if (rr == 1) printf("0x%02x %c\n", stuff[0], stuff[0]);*/
|
|
||||||
|
|
||||||
// wait for completion
|
|
||||||
rr = tool78_hw_rl78_uart1.recv(2, checkbuf, 120*1000);
|
|
||||||
if (rr != 2) {
|
|
||||||
printf("exec code: no response :/ (%d)\n", rr);
|
|
||||||
goto deinit_bad;
|
|
||||||
}
|
|
||||||
|
|
||||||
if (checkbuf[0] != 'H' && checkbuf[1] != 'i') {
|
|
||||||
printf("bad response: %02x %02x\n", checkbuf[0], checkbuf[1]);
|
|
||||||
goto deinit_bad;
|
|
||||||
}
|
|
||||||
|
|
||||||
rr = tool78_hw_rl78_uart1.recv(256, checkbuf, 120*1000);
|
|
||||||
if (rr != 256) {
|
|
||||||
printf("exec code: no data sendback (%d)\n", rr);
|
|
||||||
goto deinit_bad;
|
|
||||||
}
|
|
||||||
|
|
||||||
for (size_t i = 0; i < 256; ++i) {
|
|
||||||
if (checkbuf[i] != (0xff^0xaa)) {
|
|
||||||
printf("bad value at index %zu: %02x\n", i, checkbuf[i]^0xaa);
|
|
||||||
goto deinit_bad;
|
|
||||||
}
|
|
||||||
}
|
|
||||||
if (first) printf("all set, let's go\n");
|
|
||||||
first = false;
|
|
||||||
|
|
||||||
while (true) {
|
|
||||||
glitch_arm();
|
|
||||||
rr = tool78_hw_rl78_uart1.recv(2, checkbuf, 120*1000);
|
|
||||||
glitch_disarm();
|
|
||||||
if (rr == 2 && (checkbuf[0] != 'H' || checkbuf[1] != 'i')) rr = 0;
|
|
||||||
if (rr == 2) {
|
|
||||||
rr = tool78_hw_rl78_uart1.recv(256, checkbuf, 120*1000);
|
|
||||||
}
|
|
||||||
|
|
||||||
if (rr <= 0) {
|
|
||||||
// timeout or something
|
|
||||||
printf("X");
|
|
||||||
tool78_hw_rl78_uart1.deinit();
|
|
||||||
goto restart;
|
|
||||||
} else {
|
|
||||||
int firstbad = -1, lastbad = -1;
|
|
||||||
for (int i = 0; i < rr; ++i) {
|
|
||||||
if (checkbuf[i] != (0xaa^0xff)) {
|
|
||||||
if (firstbad == -1) firstbad = i;
|
|
||||||
lastbad = i;
|
|
||||||
}
|
|
||||||
}
|
|
||||||
if (firstbad >= 0) {
|
|
||||||
volatile uint32_t
|
|
||||||
*off = (volatile uint32_t*)&glitch_param_cur.offset_cur,
|
|
||||||
*len = (volatile uint32_t*)&glitch_param_cur.length_cur;
|
|
||||||
printf("glitch first=%d last=%d off=%lu len=%lu rr=%d v=%02x\n",
|
|
||||||
firstbad, lastbad, *off, *len, rr, checkbuf[firstbad]^0xaa);
|
|
||||||
} else printf(".");
|
|
||||||
}
|
|
||||||
}
|
|
||||||
|
|
||||||
deinit_bad:
|
|
||||||
tool78_hw_rl78_uart1.deinit();
|
|
||||||
return;
|
|
||||||
|
|
||||||
/*glitch_arm();
|
|
||||||
while (true) {
|
|
||||||
int rr;
|
|
||||||
rr = tool78_hw_rl78_uart1.recv(2, stuff, 120*1000);
|
|
||||||
if (rr > 0) {
|
|
||||||
if (stuff[0] != 'H' && stuff[1] != 'i') goto bad;
|
|
||||||
|
|
||||||
rr = tool78_hw_rl78_uart1.recv(256, stuff, 120*1000);
|
|
||||||
int firstbad = -1, lastbad = -1;
|
|
||||||
for (int iii = 0; iii < rr; ++iii) {
|
|
||||||
if (stuff[iii] != (0xaa^0xff)) {
|
|
||||||
if (firstbad == -1) firstbad = iii;
|
|
||||||
lastbad = iii;
|
|
||||||
}
|
|
||||||
}
|
|
||||||
if (rr > 0) {
|
|
||||||
glitch_disarm();
|
|
||||||
if (firstbad == -1) printf(".");
|
|
||||||
else {
|
|
||||||
volatile uint32_t
|
|
||||||
*off = (volatile uint32_t*)&glitch_param_cur.offset_cur,
|
|
||||||
*len = (volatile uint32_t*)&glitch_param_cur.length_cur;
|
|
||||||
printf("glitch first=%d last=%d off=%lu len=%lu rr=%d v=%02x\n",
|
|
||||||
firstbad, lastbad, *off, *len, rr, stuff[firstbad]);
|
|
||||||
}
|
|
||||||
glitch_arm();
|
|
||||||
} else {
|
|
||||||
glitch_disarm();
|
|
||||||
printf("%s", "[huh?]");
|
|
||||||
goto timeout;
|
|
||||||
}
|
|
||||||
} else {
|
|
||||||
bad:
|
|
||||||
glitch_disarm();
|
|
||||||
timeout:
|
|
||||||
printf(":");
|
|
||||||
tool78_hw_rl78_uart1.deinit();
|
|
||||||
goto restart;
|
|
||||||
}
|
|
||||||
}*/
|
|
||||||
}
|
|
||||||
|
|
||||||
int main() {
|
int main() {
|
||||||
static const struct glitch_params gparam = (struct glitch_params){
|
cli_init();
|
||||||
.offset_min_us = 0,
|
|
||||||
.offset_max_us = 35433,
|
while (true) {
|
||||||
.length_min_us = 1,
|
cli_main();
|
||||||
.length_max_us = 20,
|
}
|
||||||
.trigger_in_pin = 14,
|
|
||||||
.glitch_out_pin = 15,
|
|
||||||
.trigger_in_polarity = glitch_positive,
|
|
||||||
.glitch_out_polarity = glitch_positive,
|
|
||||||
.impl = glitch_impl_core1,
|
|
||||||
.offset_cur = 0, .length_cur = 0
|
|
||||||
};
|
|
||||||
glitch_ready(&gparam);
|
|
||||||
|
|
||||||
stdio_init_all();
|
|
||||||
/*while (!stdio_usb_connected()) ;
|
|
||||||
printf("hi\n");*/
|
|
||||||
//tool78_testtest();
|
|
||||||
//tool78_prototest();
|
|
||||||
tool78_ocdtest();
|
|
||||||
//piotest();
|
|
||||||
//delaytest();
|
|
||||||
return 0;
|
return 0;
|
||||||
}
|
}
|
||||||
|
|
||||||
|
|
||||||
/*
|
|
||||||
* glitch first=10 last=10 off=22783 len=1
|
|
||||||
* glitch first=12 last=12 off=9424 len=1 rr=256 v=cd
|
|
||||||
* glitch first=19 last=19 off=2669 len=1
|
|
||||||
* glitch first=22 last=22 off=6951 len=1
|
|
||||||
* glitch first=28 last=28 off=22042 len=1
|
|
||||||
* glitch first=46 last=46 off=27750 len=1
|
|
||||||
* glitch first=85 last=85 off=11875 len=1
|
|
||||||
* glitch first=87 last=87 off=12156 len=1
|
|
||||||
* glitch first=89 last=89 off=12425 len=1
|
|
||||||
* glitch first=89 last=89 off=12455 len=1
|
|
||||||
* glitch first=102 last=102 off=14235 len=1
|
|
||||||
* glitch first=116 last=116 off=18322 len=1
|
|
||||||
* glitch first=127 last=127 off=17741 len=1
|
|
||||||
* glitch first=137 last=137 off=19063 len=1
|
|
||||||
* glitch first=141 last=141 off=15229 len=1
|
|
||||||
* glitch first=142 last=142 off=19730 len=1
|
|
||||||
* glitch first=151 last=151 off=13497 len=1
|
|
||||||
* glitch first=152 last=152 off=21188 len=1
|
|
||||||
* glitch first=164 last=164 off=22897 len=1
|
|
||||||
* glitch first=169 last=169 off=12642 len=1
|
|
||||||
* glitch first=174 last=174 off=9874 len=1
|
|
||||||
* glitch first=176 last=176 off=24439 len=1
|
|
||||||
* glitch first=179 last=179 off=24973 len=1
|
|
||||||
* glitch first=179 last=179 off=24874 len=1 rr=256 v=86
|
|
||||||
* glitch first=185 last=185 off=25816 len=1
|
|
||||||
* glitch first=187 last=187 off=26077 len=1 rr=256 v=78
|
|
||||||
* glitch first=192 last=192 off=26777 len=1
|
|
||||||
* glitch first=193 last=193 off=26804 len=1
|
|
||||||
* glitch first=197 last=197 off=7173 len=1
|
|
||||||
* glitch first=211 last=211 off=29314 len=1
|
|
||||||
* glitch first=213 last=213 off=9849 len=1 rr=256 v=dc
|
|
||||||
* glitch first=217 last=217 off=27374 len=1 rr=256 v=00
|
|
||||||
* glitch first=226 last=226 off=5818 len=1
|
|
||||||
* glitch first=227 last=227 off=31555 len=1
|
|
||||||
* glitch first=231 last=231 off=1403 len=1
|
|
||||||
* glitch first=233 last=233 off=813 len=1
|
|
||||||
* glitch first=233 last=233 off=32463 len=1
|
|
||||||
* glitch first=234 last=234 off=13276 len=1
|
|
||||||
* glitch first=238 last=238 off=33053 len=1 rr=256 v=ba
|
|
||||||
* glitch first=239 last=239 off=15442 len=1 rr=256 v=1e
|
|
||||||
* glitch first=250 last=250 off=21711 len=1
|
|
||||||
* glitch first=254 last=254 off=35394 len=1 rr=256 v=40
|
|
||||||
*
|
|
||||||
*
|
|
||||||
*/
|
|
||||||
|
|
|
||||||
|
|
@ -0,0 +1,811 @@
|
||||||
|
Turn MCU's power on and press any key...
|
||||||
|
Send 1-byte data for setting mode
|
||||||
|
send(1): 3A
|
||||||
|
recv(1): 3A
|
||||||
|
Send "Set Baud Rate" command (baud=115200bps, voltage=3.3V)
|
||||||
|
send(7): 01 03 9A 00 21 42 03
|
||||||
|
poro@errai:rl78flash$ ./rl78flash -vvvv -i -m 1 -d /dev/ttyUSB0 -ewc ../rl78-example/main.mot
|
||||||
|
Open port: /dev/ttyUSB0
|
||||||
|
Using communication mode 1
|
||||||
|
Turn MCU's power on and press any key...
|
||||||
|
poro@errai:rl78flash$ ./rl78flash -vvvv -i -m 1 -d /dev/ttyUSB0 -ewc ../rl78-example/main.mot
|
||||||
|
Open port: /dev/ttyUSB0
|
||||||
|
Using communication mode 1
|
||||||
|
Turn MCU's power on and press any key...
|
||||||
|
Send 1-byte data for setting mode
|
||||||
|
send(1): 3A
|
||||||
|
recv(1): 3A
|
||||||
|
Send "Set Baud Rate" command (baud=115200bps, voltage=3.3V)
|
||||||
|
send(7): 01 03 9A 00 21 42 03
|
||||||
|
recv(7): 01 03 9A 00 21 42 03
|
||||||
|
recv(2): 02 03
|
||||||
|
recv(5): 06 10 00 E7 03
|
||||||
|
OK
|
||||||
|
Frequency: 16 MHz
|
||||||
|
Mode: full-speed mode
|
||||||
|
Send "Reset" command
|
||||||
|
send(5): 01 01 00 FF 03
|
||||||
|
recv(5): 01 01 00 FF 03
|
||||||
|
recv(2): 02 01
|
||||||
|
recv(3): 06 F9 03
|
||||||
|
OK
|
||||||
|
Send "Get Silicon Signature" command
|
||||||
|
send(5): 01 01 C0 3F 03
|
||||||
|
recv(5): 01 01 C0 3F 03
|
||||||
|
recv(2): 02 01
|
||||||
|
recv(3): 06 F9 03
|
||||||
|
recv(2): 02 16
|
||||||
|
recv(24): 10 00 06 52 35 46 31 30 35 34 41 20 20 FF 3F 00 FF 17 0F 03 00 03 53 03
|
||||||
|
OK
|
||||||
|
Device code: 100006
|
||||||
|
Device name: R5F1054A
|
||||||
|
Code flash size: 16kB
|
||||||
|
Data flash size: 2kB
|
||||||
|
Firmware version: 3.03
|
||||||
|
Device: R5F1054A
|
||||||
|
Code size: 16 kB
|
||||||
|
Data size: 2 kB
|
||||||
|
Erase code flash
|
||||||
|
Send "Block Blank Check" command (range=000000..0003FF)
|
||||||
|
send(12): 01 08 32 00 00 00 FF 03 00 00 C4 03
|
||||||
|
recv(12): 01 08 32 00 00 00 FF 03 00 00 C4 03
|
||||||
|
recv(2): 02 01
|
||||||
|
recv(3): 06 F9 03
|
||||||
|
OK
|
||||||
|
Block is empty
|
||||||
|
Send "Block Blank Check" command (range=000400..0007FF)
|
||||||
|
send(12): 01 08 32 00 04 00 FF 07 00 00 BC 03
|
||||||
|
recv(12): 01 08 32 00 04 00 FF 07 00 00 BC 03
|
||||||
|
recv(2): 02 01
|
||||||
|
recv(3): 06 F9 03
|
||||||
|
OK
|
||||||
|
Block is empty
|
||||||
|
Send "Block Blank Check" command (range=000800..000BFF)
|
||||||
|
send(12): 01 08 32 00 08 00 FF 0B 00 00 B4 03
|
||||||
|
recv(12): 01 08 32 00 08 00 FF 0B 00 00 B4 03
|
||||||
|
recv(2): 02 01
|
||||||
|
recv(3): 06 F9 03
|
||||||
|
OK
|
||||||
|
Block is empty
|
||||||
|
Send "Block Blank Check" command (range=000C00..000FFF)
|
||||||
|
send(12): 01 08 32 00 0C 00 FF 0F 00 00 AC 03
|
||||||
|
recv(12): 01 08 32 00 0C 00 FF 0F 00 00 AC 03
|
||||||
|
recv(2): 02 01
|
||||||
|
recv(3): 06 F9 03
|
||||||
|
OK
|
||||||
|
Block is empty
|
||||||
|
Send "Block Blank Check" command (range=001000..0013FF)
|
||||||
|
send(12): 01 08 32 00 10 00 FF 13 00 00 A4 03
|
||||||
|
recv(12): 01 08 32 00 10 00 FF 13 00 00 A4 03
|
||||||
|
recv(2): 02 01
|
||||||
|
recv(3): 06 F9 03
|
||||||
|
OK
|
||||||
|
Block is empty
|
||||||
|
Send "Block Blank Check" command (range=001400..0017FF)
|
||||||
|
send(12): 01 08 32 00 14 00 FF 17 00 00 9C 03
|
||||||
|
recv(12): 01 08 32 00 14 00 FF 17 00 00 9C 03
|
||||||
|
recv(2): 02 01
|
||||||
|
recv(3): 06 F9 03
|
||||||
|
OK
|
||||||
|
Block is empty
|
||||||
|
Send "Block Blank Check" command (range=001800..001BFF)
|
||||||
|
send(12): 01 08 32 00 18 00 FF 1B 00 00 94 03
|
||||||
|
recv(12): 01 08 32 00 18 00 FF 1B 00 00 94 03
|
||||||
|
recv(2): 02 01
|
||||||
|
recv(3): 06 F9 03
|
||||||
|
OK
|
||||||
|
Block is empty
|
||||||
|
Send "Block Blank Check" command (range=001C00..001FFF)
|
||||||
|
send(12): 01 08 32 00 1C 00 FF 1F 00 00 8C 03
|
||||||
|
recv(12): 01 08 32 00 1C 00 FF 1F 00 00 8C 03
|
||||||
|
recv(2): 02 01
|
||||||
|
recv(3): 06 F9 03
|
||||||
|
OK
|
||||||
|
Block is empty
|
||||||
|
Send "Block Blank Check" command (range=002000..0023FF)
|
||||||
|
send(12): 01 08 32 00 20 00 FF 23 00 00 84 03
|
||||||
|
recv(12): 01 08 32 00 20 00 FF 23 00 00 84 03
|
||||||
|
recv(2): 02 01
|
||||||
|
recv(3): 06 F9 03
|
||||||
|
OK
|
||||||
|
Block is empty
|
||||||
|
Send "Block Blank Check" command (range=002400..0027FF)
|
||||||
|
send(12): 01 08 32 00 24 00 FF 27 00 00 7C 03
|
||||||
|
recv(12): 01 08 32 00 24 00 FF 27 00 00 7C 03
|
||||||
|
recv(2): 02 01
|
||||||
|
recv(3): 06 F9 03
|
||||||
|
OK
|
||||||
|
Block is empty
|
||||||
|
Send "Block Blank Check" command (range=002800..002BFF)
|
||||||
|
send(12): 01 08 32 00 28 00 FF 2B 00 00 74 03
|
||||||
|
recv(12): 01 08 32 00 28 00 FF 2B 00 00 74 03
|
||||||
|
recv(2): 02 01
|
||||||
|
recv(3): 06 F9 03
|
||||||
|
OK
|
||||||
|
Block is empty
|
||||||
|
Send "Block Blank Check" command (range=002C00..002FFF)
|
||||||
|
send(12): 01 08 32 00 2C 00 FF 2F 00 00 6C 03
|
||||||
|
recv(12): 01 08 32 00 2C 00 FF 2F 00 00 6C 03
|
||||||
|
recv(2): 02 01
|
||||||
|
recv(3): 06 F9 03
|
||||||
|
OK
|
||||||
|
Block is empty
|
||||||
|
Send "Block Blank Check" command (range=003000..0033FF)
|
||||||
|
send(12): 01 08 32 00 30 00 FF 33 00 00 64 03
|
||||||
|
recv(12): 01 08 32 00 30 00 FF 33 00 00 64 03
|
||||||
|
recv(2): 02 01
|
||||||
|
recv(3): 06 F9 03
|
||||||
|
OK
|
||||||
|
Block is empty
|
||||||
|
Send "Block Blank Check" command (range=003400..0037FF)
|
||||||
|
send(12): 01 08 32 00 34 00 FF 37 00 00 5C 03
|
||||||
|
recv(12): 01 08 32 00 34 00 FF 37 00 00 5C 03
|
||||||
|
recv(2): 02 01
|
||||||
|
recv(3): 06 F9 03
|
||||||
|
OK
|
||||||
|
Block is empty
|
||||||
|
Send "Block Blank Check" command (range=003800..003BFF)
|
||||||
|
send(12): 01 08 32 00 38 00 FF 3B 00 00 54 03
|
||||||
|
recv(12): 01 08 32 00 38 00 FF 3B 00 00 54 03
|
||||||
|
recv(2): 02 01
|
||||||
|
recv(3): 06 F9 03
|
||||||
|
OK
|
||||||
|
Block is empty
|
||||||
|
Send "Block Blank Check" command (range=003C00..003FFF)
|
||||||
|
send(12): 01 08 32 00 3C 00 FF 3F 00 00 4C 03
|
||||||
|
recv(12): 01 08 32 00 3C 00 FF 3F 00 00 4C 03
|
||||||
|
recv(2): 02 01
|
||||||
|
recv(3): 06 F9 03
|
||||||
|
OK
|
||||||
|
Block is empty
|
||||||
|
Erase data flash
|
||||||
|
Send "Block Blank Check" command (range=0F1000..0F13FF)
|
||||||
|
send(12): 01 08 32 00 10 0F FF 13 0F 00 86 03
|
||||||
|
recv(12): 01 08 32 00 10 0F FF 13 0F 00 86 03
|
||||||
|
recv(2): 02 01
|
||||||
|
recv(3): 06 F9 03
|
||||||
|
OK
|
||||||
|
Block is empty
|
||||||
|
Send "Block Blank Check" command (range=0F1400..0F17FF)
|
||||||
|
send(12): 01 08 32 00 14 0F FF 17 0F 00 7E 03
|
||||||
|
recv(12): 01 08 32 00 14 0F FF 17 0F 00 7E 03
|
||||||
|
recv(2): 02 01
|
||||||
|
recv(3): 06 F9 03
|
||||||
|
OK
|
||||||
|
Block is empty
|
||||||
|
Read file "../rl78-example/main.mot"
|
||||||
|
srec: S00B00006D61696E2E6D6F74D1
|
||||||
|
|
||||||
|
Record with no data (S0)
|
||||||
|
srec: S1050000DA0020
|
||||||
|
|
||||||
|
srec_code (000000) : DA 00
|
||||||
|
srec: S113000443014F015B01670173017F018B01970178
|
||||||
|
|
||||||
|
srec_code (000004) : 43 01 4F 01 5B 01 67 01 73 01 7F 01 8B 01 97 01
|
||||||
|
srec: S1130014A301AF01BB01C701D301FFFFDF01FFFF50
|
||||||
|
|
||||||
|
srec_code (000014) : A3 01 AF 01 BB 01 C7 01 D3 01 FF FF DF 01 FF FF
|
||||||
|
srec: S1130024EB01F70103020F021B02270233023F0212
|
||||||
|
|
||||||
|
srec_code (000024) : EB 01 F7 01 03 02 0F 02 1B 02 27 02 33 02 3F 02
|
||||||
|
srec: S11300344B02FFFFFFFFFFFF570263026F027B02C5
|
||||||
|
|
||||||
|
srec_code (000034) : 4B 02 FF FF FF FF FF FF 57 02 63 02 6F 02 7B 02
|
||||||
|
srec: S1130044870293029F02AB02B702FFFFFFFFFFFF89
|
||||||
|
|
||||||
|
srec_code (000044) : 87 02 93 02 9F 02 AB 02 B7 02 FF FF FF FF FF FF
|
||||||
|
srec: S1130054FFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFA8
|
||||||
|
|
||||||
|
srec_code (000054) : FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF
|
||||||
|
srec: S1130064FFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFF98
|
||||||
|
|
||||||
|
srec_code (000064) : FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF
|
||||||
|
srec: S10F0074FFFFFFFFFFFFFFFFFFFFC302C1
|
||||||
|
|
||||||
|
srec_code (000074) : FF FF FF FF FF FF FF FF FF FF C3 02
|
||||||
|
srec: S10700C0EFFFE085E5
|
||||||
|
|
||||||
|
srec_code (0000C0) : EF FF E0 85
|
||||||
|
srec: S10D00C4000000000000000000002E
|
||||||
|
|
||||||
|
srec_code (0000C4) : 00 00 00 00 00 00 00 00 00 00
|
||||||
|
srec: S11300D8DA00CBF8E0FE410061CF347A073680F9C4
|
||||||
|
|
||||||
|
srec_code (0000D8) : DA 00 CB F8 E0 FE 41 00 61 CF 34 7A 07 36 80 F9
|
||||||
|
srec: S11300E861DF3680F93080F927311E440000DD0EC7
|
||||||
|
|
||||||
|
srec_code (0000E8) : 61 DF 36 80 F9 30 80 F9 27 31 1E 44 00 00 DD 0E
|
||||||
|
srec: S11300F8B161CF11A9BBA5A5A7A761DFEFED61CFBA
|
||||||
|
|
||||||
|
srec_code (0000F8) : B1 61 CF 11 A9 BB A5 A5 A7 A7 61 DF EF ED 61 CF
|
||||||
|
srec: S11301083600F930000061DF30A2F927311E4400BF
|
||||||
|
|
||||||
|
srec_code (000108) : 36 00 F9 30 00 00 61 DF 30 A2 F9 27 31 1E 44 00
|
||||||
|
srec: S113011800DD0AB161CFBBA7A761DFEFF161CFFCB6
|
||||||
|
|
||||||
|
srec_code (000118) : 00 DD 0A B1 61 CF BB A7 A7 61 DF EF F1 61 CF FC
|
||||||
|
srec: S113012838010000300000C1C1C1FC740500EFFEB5
|
||||||
|
|
||||||
|
srec_code (000128) : 38 01 00 00 30 00 00 C1 C1 C1 FC 74 05 00 EF FE
|
||||||
|
srec: S1130138717BFAFC3B0700717AFAD761CFC1C3C55A
|
||||||
|
|
||||||
|
srec_code (000138) : 71 7B FA FC 3B 07 00 71 7A FA D7 61 CF C1 C3 C5
|
||||||
|
srec: S1130148C7C6C4C2C061FC61CFC1C3C5C7C6C4C2E7
|
||||||
|
|
||||||
|
srec_code (000148) : C7 C6 C4 C2 C0 61 FC 61 CF C1 C3 C5 C7 C6 C4 C2
|
||||||
|
srec: S1130158C061FC61CFC1C3C5C7C6C4C2C061FC616C
|
||||||
|
|
||||||
|
srec_code (000158) : C0 61 FC 61 CF C1 C3 C5 C7 C6 C4 C2 C0 61 FC 61
|
||||||
|
srec: S1130168CFC1C3C5C7C6C4C2C061FC61CFC1C3C5C2
|
||||||
|
|
||||||
|
srec_code (000168) : CF C1 C3 C5 C7 C6 C4 C2 C0 61 FC 61 CF C1 C3 C5
|
||||||
|
srec: S1130178C7C6C4C2C061FC61CFC1C3C5C7C6C4C2B7
|
||||||
|
|
||||||
|
srec_code (000178) : C7 C6 C4 C2 C0 61 FC 61 CF C1 C3 C5 C7 C6 C4 C2
|
||||||
|
srec: S1130188C061FC61CFC1C3C5C7C6C4C2C061FC613C
|
||||||
|
|
||||||
|
srec_code (000188) : C0 61 FC 61 CF C1 C3 C5 C7 C6 C4 C2 C0 61 FC 61
|
||||||
|
srec: S1130198CFC1C3C5C7C6C4C2C061FC61CFC1C3C592
|
||||||
|
|
||||||
|
srec_code (000198) : CF C1 C3 C5 C7 C6 C4 C2 C0 61 FC 61 CF C1 C3 C5
|
||||||
|
srec: S11301A8C7C6C4C2C061FC61CFC1C3C5C7C6C4C287
|
||||||
|
|
||||||
|
srec_code (0001A8) : C7 C6 C4 C2 C0 61 FC 61 CF C1 C3 C5 C7 C6 C4 C2
|
||||||
|
srec: S11301B8C061FC61CFC1C3C5C7C6C4C2C061FC610C
|
||||||
|
|
||||||
|
srec_code (0001B8) : C0 61 FC 61 CF C1 C3 C5 C7 C6 C4 C2 C0 61 FC 61
|
||||||
|
srec: S11301C8CFC1C3C5C7C6C4C2C061FC61CFC1C3C562
|
||||||
|
|
||||||
|
srec_code (0001C8) : CF C1 C3 C5 C7 C6 C4 C2 C0 61 FC 61 CF C1 C3 C5
|
||||||
|
srec: S11301D8C7C6C4C2C061FC61CFC1C3C5C7C6C4C257
|
||||||
|
|
||||||
|
srec_code (0001D8) : C7 C6 C4 C2 C0 61 FC 61 CF C1 C3 C5 C7 C6 C4 C2
|
||||||
|
srec: S11301E8C061FC61CFC1C3C5C7C6C4C2C061FC61DC
|
||||||
|
|
||||||
|
srec_code (0001E8) : C0 61 FC 61 CF C1 C3 C5 C7 C6 C4 C2 C0 61 FC 61
|
||||||
|
srec: S11301F8CFC1C3C5C7C6C4C2C061FC61CFC1C3C532
|
||||||
|
|
||||||
|
srec_code (0001F8) : CF C1 C3 C5 C7 C6 C4 C2 C0 61 FC 61 CF C1 C3 C5
|
||||||
|
srec: S1130208C7C6C4C2C061FC61CFC1C3C5C7C6C4C226
|
||||||
|
|
||||||
|
srec_code (000208) : C7 C6 C4 C2 C0 61 FC 61 CF C1 C3 C5 C7 C6 C4 C2
|
||||||
|
srec: S1130218C061FC61CFC1C3C5C7C6C4C2C061FC61AB
|
||||||
|
|
||||||
|
srec_code (000218) : C0 61 FC 61 CF C1 C3 C5 C7 C6 C4 C2 C0 61 FC 61
|
||||||
|
srec: S1130228CFC1C3C5C7C6C4C2C061FC61CFC1C3C501
|
||||||
|
|
||||||
|
srec_code (000228) : CF C1 C3 C5 C7 C6 C4 C2 C0 61 FC 61 CF C1 C3 C5
|
||||||
|
srec: S1130238C7C6C4C2C061FC61CFC1C3C5C7C6C4C2F6
|
||||||
|
|
||||||
|
srec_code (000238) : C7 C6 C4 C2 C0 61 FC 61 CF C1 C3 C5 C7 C6 C4 C2
|
||||||
|
srec: S1130248C061FC61CFC1C3C5C7C6C4C2C061FC617B
|
||||||
|
|
||||||
|
srec_code (000248) : C0 61 FC 61 CF C1 C3 C5 C7 C6 C4 C2 C0 61 FC 61
|
||||||
|
srec: S1130258CFC1C3C5C7C6C4C2C061FC61CFC1C3C5D1
|
||||||
|
|
||||||
|
srec_code (000258) : CF C1 C3 C5 C7 C6 C4 C2 C0 61 FC 61 CF C1 C3 C5
|
||||||
|
srec: S1130268C7C6C4C2C061FC61CFC1C3C5C7C6C4C2C6
|
||||||
|
|
||||||
|
srec_code (000268) : C7 C6 C4 C2 C0 61 FC 61 CF C1 C3 C5 C7 C6 C4 C2
|
||||||
|
srec: S1130278C061FC61CFC1C3C5C7C6C4C2C061FC614B
|
||||||
|
|
||||||
|
srec_code (000278) : C0 61 FC 61 CF C1 C3 C5 C7 C6 C4 C2 C0 61 FC 61
|
||||||
|
srec: S1130288CFC1C3C5C7C6C4C2C061FC61CFC1C3C5A1
|
||||||
|
|
||||||
|
srec_code (000288) : CF C1 C3 C5 C7 C6 C4 C2 C0 61 FC 61 CF C1 C3 C5
|
||||||
|
srec: S1130298C7C6C4C2C061FC61CFC1C3C5C7C6C4C296
|
||||||
|
|
||||||
|
srec_code (000298) : C7 C6 C4 C2 C0 61 FC 61 CF C1 C3 C5 C7 C6 C4 C2
|
||||||
|
srec: S11302A8C061FC61CFC1C3C5C7C6C4C2C061FC611B
|
||||||
|
|
||||||
|
srec_code (0002A8) : C0 61 FC 61 CF C1 C3 C5 C7 C6 C4 C2 C0 61 FC 61
|
||||||
|
srec: S11302B8CFC1C3C5C7C6C4C2C061FC61CFC1C3C571
|
||||||
|
|
||||||
|
srec_code (0002B8) : CF C1 C3 C5 C7 C6 C4 C2 C0 61 FC 61 CF C1 C3 C5
|
||||||
|
srec: S11302C8C7C6C4C2C061FCC9F000F9ADF01230AAB7
|
||||||
|
|
||||||
|
srec_code (0002C8) : C7 C6 C4 C2 C0 61 FC C9 F0 00 F9 AD F0 12 30 AA
|
||||||
|
srec: S11302D8C378000030A000780200306C81780400F4
|
||||||
|
|
||||||
|
srec_code (0002D8) : C3 78 00 00 30 A0 00 78 02 00 30 6C 81 78 04 00
|
||||||
|
srec: S11302E830E48178060030E60078080030C681786A
|
||||||
|
|
||||||
|
srec_code (0002E8) : 30 E4 81 78 06 00 30 E6 00 78 08 00 30 C6 81 78
|
||||||
|
srec: S11302F80A0030CE81780C0030A001780E0030EE70
|
||||||
|
|
||||||
|
srec_code (0002F8) : 0A 00 30 CE 81 78 0C 00 30 A0 01 78 0E 00 30 EE
|
||||||
|
srec: S11303088178100030E68178120030442478140093
|
||||||
|
|
||||||
|
srec_code (000308) : 81 78 10 00 30 E6 81 78 12 00 30 44 24 78 14 00
|
||||||
|
srec: S1130318304400781600300042781800300018780D
|
||||||
|
|
||||||
|
srec_code (000318) : 30 44 00 78 16 00 30 00 42 78 18 00 30 00 18 78
|
||||||
|
srec: S11303281A0030447E78500030EE01781C0030E02A
|
||||||
|
|
||||||
|
srec_code (000328) : 1A 00 30 44 7E 78 50 00 30 EE 01 78 1C 00 30 E0
|
||||||
|
srec: S1130338A5781E00300A8178200030A0A578220014
|
||||||
|
|
||||||
|
srec_code (000338) : A5 78 1E 00 30 0A 81 78 20 00 30 A0 A5 78 22 00
|
||||||
|
srec: S1130348304E81782400304E0178260030CA8178F6
|
||||||
|
|
||||||
|
srec_code (000348) : 30 4E 81 78 24 00 30 4E 01 78 26 00 30 CA 81 78
|
||||||
|
srec: S1130358280030EE00782A003000A5782C0030A060
|
||||||
|
|
||||||
|
srec_code (000358) : 28 00 30 EE 00 78 2A 00 30 00 A5 78 2C 00 30 A0
|
||||||
|
srec: S113036880782E00300E0A783000300A8078320007
|
||||||
|
|
||||||
|
srec_code (000368) : 80 78 2E 00 30 0E 0A 78 30 00 30 0A 80 78 32 00
|
||||||
|
srec: S113037830AA1278340030AA1878360030AA817866
|
||||||
|
|
||||||
|
srec_code (000378) : 30 AA 12 78 34 00 30 AA 18 78 36 00 30 AA 81 78
|
||||||
|
srec: S11303883800306E01783A0030AA89783C00306E23
|
||||||
|
|
||||||
|
srec_code (000388) : 38 00 30 6E 01 78 3A 00 30 AA 89 78 3C 00 30 6E
|
||||||
|
srec: S113039809783E0030C68178400030002578420054
|
||||||
|
|
||||||
|
srec_code (000398) : 09 78 3E 00 30 C6 81 78 40 00 30 00 25 78 42 00
|
||||||
|
srec: S11303A830AA80784400300A4278460030AA487857
|
||||||
|
|
||||||
|
srec_code (0003A8) : 30 AA 80 78 44 00 30 0A 42 78 46 00 30 AA 48 78
|
||||||
|
srec: S11303B8480030005A784A00300016784C00300063
|
||||||
|
|
||||||
|
srec_code (0003B8) : 48 00 30 00 5A 78 4A 00 30 00 16 78 4C 00 30 00
|
||||||
|
srec: S11303C8C3784E00D730F50FBF7AF9306000BF7C90
|
||||||
|
|
||||||
|
srec_code (0003C8) : C3 78 4E 00 D7 30 F5 0F BF 7A F9 30 60 00 BF 7C
|
||||||
|
srec: S11303D8F930B600BF7EF930F20FBF80F930630000
|
||||||
|
|
||||||
|
srec_code (0003D8) : F9 30 B6 00 BF 7E F9 30 F2 0F BF 80 F9 30 63 00
|
||||||
|
srec: S11303E8BF82F930D300BF84F930D700BF86F93013
|
||||||
|
|
||||||
|
srec_code (0003E8) : BF 82 F9 30 D3 00 BF 84 F9 30 D7 00 BF 86 F9 30
|
||||||
|
srec: S11303F87000BF88F930F70FBF8AF930F30FBF8C4C
|
||||||
|
|
||||||
|
srec_code (0003F8) : 70 00 BF 88 F9 30 F7 0F BF 8A F9 30 F3 0F BF 8C
|
||||||
|
srec: S1130408F9F6BF66F9F6BF68F9F6BF6AF9F6BF6C84
|
||||||
|
|
||||||
|
srec_code (000408) : F9 F6 BF 66 F9 F6 BF 68 F9 F6 BF 6A F9 F6 BF 6C
|
||||||
|
srec: S1130418F9307700BF96F930C700BF98F9309500D6
|
||||||
|
|
||||||
|
srec_code (000418) : F9 30 77 00 BF 96 F9 30 C7 00 BF 98 F9 30 95 00
|
||||||
|
srec: S1130428BF9AF930E600BF9CF9309700BF9EF930B7
|
||||||
|
|
||||||
|
srec_code (000428) : BF 9A F9 30 E6 00 BF 9C F9 30 97 00 BF 9E F9 30
|
||||||
|
srec: S11304381700BFA0F930FA0FBF52F9306000BF545B
|
||||||
|
|
||||||
|
srec_code (000438) : 17 00 BF A0 F9 30 FA 0F BF 52 F9 30 60 00 BF 54
|
||||||
|
srec: S1130448F930D600BF56F930F40FBF58F9306C00B4
|
||||||
|
|
||||||
|
srec_code (000448) : F9 30 D6 00 BF 56 F9 30 F4 0F BF 58 F9 30 6C 00
|
||||||
|
srec: S1130458BF5AF930BC00BF5CF930BE00BF5EF9304A
|
||||||
|
|
||||||
|
srec_code (000458) : BF 5A F9 30 BC 00 BF 5C F9 30 BE 00 BF 5E F9 30
|
||||||
|
srec: S1130468E000BF60F930FE0FBF62F930FC0FBF64D3
|
||||||
|
|
||||||
|
srec_code (000468) : E0 00 BF 60 F9 30 FE 0F BF 62 F9 30 FC 0F BF 64
|
||||||
|
srec: S1130478F930EE00BF6EF9303E00BF70F9309A00D3
|
||||||
|
|
||||||
|
srec_code (000478) : F9 30 EE 00 BF 6E F9 30 3E 00 BF 70 F9 30 9A 00
|
||||||
|
srec: S1130488BF72F9307600BF74F9309E00BF76F93038
|
||||||
|
|
||||||
|
srec_code (000488) : BF 72 F9 30 76 00 BF 74 F9 30 9E 00 BF 76 F9 30
|
||||||
|
srec: S11304988E00BF78F9FCCF0200C9F00004ADF01259
|
||||||
|
|
||||||
|
srec_code (000498) : 8E 00 BF 78 F9 FC CF 02 00 C9 F0 00 04 AD F0 12
|
||||||
|
srec: S11304A8F1480000A6F0ADF044280461E8ECA50486
|
||||||
|
|
||||||
|
srec_code (0004A8) : F1 48 00 00 A6 F0 AD F0 44 28 04 61 E8 EC A5 04
|
||||||
|
srec: S11304B800FC2A0700FC2F0700D7F50004F5010407
|
||||||
|
|
||||||
|
srec_code (0004B8) : 00 FC 2A 07 00 FC 2F 07 00 D7 F5 00 04 F5 01 04
|
||||||
|
srec: S11304C8F50204F5030451FF9F040451FF9F05043A
|
||||||
|
|
||||||
|
srec_code (0004C8) : F5 02 04 F5 03 04 51 FF 9F 04 04 51 FF 9F 05 04
|
||||||
|
srec: S11304D851FF9F060451FF9F070451FF9F080451D1
|
||||||
|
|
||||||
|
srec_code (0004D8) : 51 FF 9F 06 04 51 FF 9F 07 04 51 FF 9F 08 04 51
|
||||||
|
srec: S11304E8FF9F090451FF9F0A0451FF9F0B0451FF0A
|
||||||
|
|
||||||
|
srec_code (0004E8) : FF 9F 09 04 51 FF 9F 0A 04 51 FF 9F 0B 04 51 FF
|
||||||
|
srec: S11304F89F0C0451FF9F0D0451FF9F0E0451FF9F51
|
||||||
|
|
||||||
|
srec_code (0004F8) : 9F 0C 04 51 FF 9F 0D 04 51 FF 9F 0E 04 51 FF 9F
|
||||||
|
srec: S11305080F0451FF9F100451FF9F130451FF9F14C0
|
||||||
|
|
||||||
|
srec_code (000508) : 0F 04 51 FF 9F 10 04 51 FF 9F 13 04 51 FF 9F 14
|
||||||
|
srec: S11305180451FF9F150451FF9F160451FF9F1704B0
|
||||||
|
|
||||||
|
srec_code (000518) : 04 51 FF 9F 15 04 51 FF 9F 16 04 51 FF 9F 17 04
|
||||||
|
srec: S113052851FF9F180451FF9F190451FF9F1A04514A
|
||||||
|
|
||||||
|
srec_code (000528) : 51 FF 9F 18 04 51 FF 9F 19 04 51 FF 9F 1A 04 51
|
||||||
|
srec: S1130538FF9F1B0451FF9F1C0451FF9F1D0451FF83
|
||||||
|
|
||||||
|
srec_code (000538) : FF 9F 1B 04 51 FF 9F 1C 04 51 FF 9F 1D 04 51 FF
|
||||||
|
srec: S11305489F1E0451FF9F1F0451FF9F200451FF9FCA
|
||||||
|
|
||||||
|
srec_code (000548) : 9F 1E 04 51 FF 9F 1F 04 51 FF 9F 20 04 51 FF 9F
|
||||||
|
srec: S1130558210451FF9F220451FF9F230451FF9F242C
|
||||||
|
|
||||||
|
srec_code (000558) : 21 04 51 FF 9F 22 04 51 FF 9F 23 04 51 FF 9F 24
|
||||||
|
srec: S11305680451FF9F250451FF9F2604D761EFC1C39F
|
||||||
|
|
||||||
|
srec_code (000568) : 04 51 FF 9F 25 04 51 FF 9F 26 04 D7 61 EF C1 C3
|
||||||
|
srec: S113057861CF201030FFFFB80C300500B80EFCCD59
|
||||||
|
|
||||||
|
srec_code (000578) : 61 CF 20 10 30 FF FF B8 0C 30 05 00 B8 0E FC CD
|
||||||
|
srec: S11305880300A80CB808A80EB80AA80804FFFFBD01
|
||||||
|
|
||||||
|
srec_code (000588) : 03 00 A8 0C B8 08 A8 0E B8 0A A8 08 04 FF FF BD
|
||||||
|
srec: S1130598F0A80A61D8A1B1BDF2ADF0B80CADF2B8BB
|
||||||
|
|
||||||
|
srec_code (000598) : F0 A8 0A 61 D8 A1 B1 BD F2 AD F0 B8 0C AD F2 B8
|
||||||
|
srec: S11305A80EADF2440000ADF061F844000061F8ECCF
|
||||||
|
|
||||||
|
srec_code (0005A8) : 0E AD F2 44 00 00 AD F0 61 F8 44 00 00 61 F8 EC
|
||||||
|
srec: S11305B8F00500FCC20400A80CB804A80EB806A8EC
|
||||||
|
|
||||||
|
srec_code (0005B8) : F0 05 00 FC C2 04 00 A8 0C B8 04 A8 0E B8 06 A8
|
||||||
|
srec: S11305C80404FFFFBDF0A80661D8A1B1BDF2ADF0E7
|
||||||
|
|
||||||
|
srec_code (0005C8) : 04 04 FF FF BD F0 A8 06 61 D8 A1 B1 BD F2 AD F0
|
||||||
|
srec: S11305D8B80CADF2B80EADF2440000ADF061F844C9
|
||||||
|
|
||||||
|
srec_code (0005D8) : B8 0C AD F2 B8 0E AD F2 44 00 00 AD F0 61 F8 44
|
||||||
|
srec: S11305E8000061E8ECBB0500E508043020A1B80070
|
||||||
|
|
||||||
|
srec_code (0005E8) : 00 00 61 E8 EC BB 05 00 E5 08 04 30 20 A1 B8 00
|
||||||
|
srec: S11305F8300700B802C9F00804A800B80CA802B86B
|
||||||
|
|
||||||
|
srec_code (0005F8) : 30 07 00 B8 02 C9 F0 08 04 A8 00 B8 0C A8 02 B8
|
||||||
|
srec: S11306080EA80CBDE8A80EBDEAADE804FFFFBDF4D2
|
||||||
|
|
||||||
|
srec_code (000608) : 0E A8 0C BD E8 A8 0E BD EA AD E8 04 FF FF BD F4
|
||||||
|
srec: S1130618ADEA61D8A1B1BDF6ADF4B80CADF6B80E2B
|
||||||
|
|
||||||
|
srec_code (000618) : AD EA 61 D8 A1 B1 BD F6 AD F4 B8 0C AD F6 B8 0E
|
||||||
|
srec: S1130628ADEA440000ADE861F844000061E8EC0973
|
||||||
|
|
||||||
|
srec_code (000628) : AD EA 44 00 00 AD E8 61 F8 44 00 00 61 E8 EC 09
|
||||||
|
srec: S11306380600ADF0168B7CFF9BA800B80CA802B886
|
||||||
|
|
||||||
|
srec_code (000638) : 06 00 AD F0 16 8B 7C FF 9B A8 00 B8 0C A8 02 B8
|
||||||
|
srec: S11306480EEC0906002002CFA0FF14C9F0A1FFADEB
|
||||||
|
|
||||||
|
srec_code (000648) : 0E EC 09 06 00 20 02 CF A0 FF 14 C9 F0 A1 FF AD
|
||||||
|
srec: S1130658F01671F27148A4FF71E3F6B80044A000E3
|
||||||
|
|
||||||
|
srec_code (000658) : F0 16 71 F2 71 48 A4 FF 71 E3 F6 B8 00 44 A0 00
|
||||||
|
srec: S113066861F3EC7D060000A800A1B80044A0006175
|
||||||
|
|
||||||
|
srec_code (000668) : 61 F3 EC 7D 06 00 00 A8 00 A1 B8 00 44 A0 00 61
|
||||||
|
srec: S1130678E3EC6E0600F5F3007168A4FF7108A1FFAE
|
||||||
|
|
||||||
|
srec_code (000678) : E3 EC 6E 06 00 F5 F3 00 71 68 A4 FF 71 08 A1 FF
|
||||||
|
srec: S11306881002D77170F000C9F041FFADF01671F394
|
||||||
|
|
||||||
|
srec_code (000688) : 10 02 D7 71 70 F0 00 C9 F0 41 FF AD F0 16 71 F3
|
||||||
|
srec: S11306987100D4FF7108D0FFCF40FF7651F09F005E
|
||||||
|
|
||||||
|
srec_code (000698) : 71 00 D4 FF 71 08 D0 FF CF 40 FF 76 51 F0 9F 00
|
||||||
|
srec: S11306A80351FF9F010351F99F0203519F9F0303C5
|
||||||
|
|
||||||
|
srec_code (0006A8) : 03 51 FF 9F 01 03 51 F9 9F 02 03 51 9F 9F 03 03
|
||||||
|
srec: S11306B8517F9F04038F61005CE79F610071186498
|
||||||
|
|
||||||
|
srec_code (0006B8) : 51 7F 9F 04 03 8F 61 00 5C E7 9F 61 00 71 18 64
|
||||||
|
srec: S11306C80071086C008F6E005CC39F6E008F21FF61
|
||||||
|
|
||||||
|
srec_code (0006C8) : 00 71 08 6C 00 8F 6E 00 5C C3 9F 6E 00 8F 21 FF
|
||||||
|
srec: S11306D85C069F21FF710823FF8F24FF5CF19F2490
|
||||||
|
|
||||||
|
srec_code (0006D8) : 5C 06 9F 21 FF 71 08 23 FF 8F 24 FF 5C F1 9F 24
|
||||||
|
srec: S11306E8FF8F25FF5CE09F25FF8F26FF5CFC9F267C
|
||||||
|
|
||||||
|
srec_code (0006E8) : FF 8F 25 FF 5C E0 9F 25 FF 8F 26 FF 5C FC 9F 26
|
||||||
|
srec: S11306F8FFC9F227FFADF2168BF19B71082CFFC9D5
|
||||||
|
|
||||||
|
srec_code (0006F8) : FF C9 F2 27 FF AD F2 16 8B F1 9B 71 08 2C FF C9
|
||||||
|
srec: S1130708F22EFFADF2168BF19B51029F7600711801
|
||||||
|
|
||||||
|
srec_code (000708) : F2 2E FF AD F2 16 8B F1 9B 51 02 9F 76 00 71 18
|
||||||
|
srec: S113071822FFADF012F1480000CF42FF07CF43FF9C
|
||||||
|
|
||||||
|
srec_code (000718) : 22 FF AD F0 12 F1 48 00 00 CF 42 FF 07 CF 43 FF
|
||||||
|
srec: S11307280AD7717041FFD7C9F041FFADF01671D2F5
|
||||||
|
|
||||||
|
srec_code (000728) : 0A D7 71 70 41 FF D7 C9 F0 41 FF AD F0 16 71 D2
|
||||||
|
srec: S113073871E2D7F57700FC8B0600FC4D0600F5F056
|
||||||
|
|
||||||
|
srec_code (000738) : 71 E2 D7 F5 77 00 FC 8B 06 00 FC 4D 06 00 F5 F0
|
||||||
|
srec: S10D074802F5780051809FF500D7F8
|
||||||
|
|
||||||
|
srec_code (000748) : 02 F5 78 00 51 80 9F F5 00 D7
|
||||||
|
srec: S11307520000000000000000000000000000000093
|
||||||
|
|
||||||
|
srec_code (000752) : 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
|
||||||
|
srec: S11307620000000000000000000000000000000083
|
||||||
|
|
||||||
|
srec_code (000762) : 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
|
||||||
|
srec: S10B077200000000000000007B
|
||||||
|
|
||||||
|
srec_code (000772) : 00 00 00 00 00 00 00 00
|
||||||
|
srec: S90300DA22
|
||||||
|
|
||||||
|
Record with no data (S9)
|
||||||
|
Write code flash
|
||||||
|
Program block 000000
|
||||||
|
Send "Block Blank Check" command (range=000000..0003FF)
|
||||||
|
send(12): 01 08 32 00 00 00 FF 03 00 00 C4 03
|
||||||
|
recv(12): 01 08 32 00 00 00 FF 03 00 00 C4 03
|
||||||
|
recv(2): 02 01
|
||||||
|
recv(3): 06 F9 03
|
||||||
|
OK
|
||||||
|
Block is empty
|
||||||
|
Send "Programming" command (range=000000..0003FF)
|
||||||
|
send(11): 01 07 40 00 00 00 FF 03 00 B7 03
|
||||||
|
recv(11): 01 07 40 00 00 00 FF 03 00 B7 03
|
||||||
|
recv(2): 02 01
|
||||||
|
recv(3): 06 F9 03
|
||||||
|
Send data to address 000000
|
||||||
|
send(260): 02 00 DA 00 FF FF 43 01 4F 01 5B 01 67 01 73 01 7F 01 8B 01 97 01 A3 01 AF 01 BB 01 C7 01 D3 01 FF FF DF 01 FF FF EB 01 F7 01 03 02 0F 02 1B 02 27 02 33 02 3F 02 4B 02 FF FF FF FF FF FF 57 02 63 02 6F 02 7B 02 87 02 93 02 9F 02 AB 02 B7 02 FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF C3 02 FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF EF FF E0 85 00 00 00 00 00 00 00 00 00 00 FF FF FF FF FF FF FF FF FF FF DA 00 CB F8 E0 FE 41 00 61 CF 34 7A 07 36 80 F9 61 DF 36 80 F9 30 80 F9 27 31 1E 44 00 00 DD 0E B1 61 CF 11 A9 BB A5 A5 97 17
|
||||||
|
recv(260): 02 00 DA 00 FF FF 43 01 4F 01 5B 01 67 01 73 01 7F 01 8B 01 97 01 A3 01 AF 01 BB 01 C7 01 D3 01 FF FF DF 01 FF FF EB 01 F7 01 03 02 0F 02 1B 02 27 02 33 02 3F 02 4B 02 FF FF FF FF FF FF 57 02 63 02 6F 02 7B 02 87 02 93 02 9F 02 AB 02 B7 02 FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF C3 02 FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF EF FF E0 85 00 00 00 00 00 00 00 00 00 00 FF FF FF FF FF FF FF FF FF FF DA 00 CB F8 E0 FE 41 00 61 CF 34 7A 07 36 80 F9 61 DF 36 80 F9 30 80 F9 27 31 1E 44 00 00 DD 0E B1 61 CF 11 A9 BB A5 A5 97 17
|
||||||
|
recv(2): 02 02
|
||||||
|
recv(4): 06 06 F2 03
|
||||||
|
Send data to address 000100
|
||||||
|
send(260): 02 00 A7 A7 61 DF EF ED 61 CF 36 00 F9 30 00 00 61 DF 30 A2 F9 27 31 1E 44 00 00 DD 0A B1 61 CF BB A7 A7 61 DF EF F1 61 CF FC 38 01 00 00 30 00 00 C1 C1 C1 FC 74 05 00 EF FE 71 7B FA FC 3B 07 00 71 7A FA D7 61 CF C1 C3 C5 C7 C6 C4 C2 C0 61 FC 61 CF C1 C3 C5 C7 C6 C4 C2 C0 61 FC 61 CF C1 C3 C5 C7 C6 C4 C2 C0 61 FC 61 CF C1 C3 C5 C7 C6 C4 C2 C0 61 FC 61 CF C1 C3 C5 C7 C6 C4 C2 C0 61 FC 61 CF C1 C3 C5 C7 C6 C4 C2 C0 61 FC 61 CF C1 C3 C5 C7 C6 C4 C2 C0 61 FC 61 CF C1 C3 C5 C7 C6 C4 C2 C0 61 FC 61 CF C1 C3 C5 C7 C6 C4 C2 C0 61 FC 61 CF C1 C3 C5 C7 C6 C4 C2 C0 61 FC 61 CF C1 C3 C5 C7 C6 C4 C2 C0 61 FC 61 CF C1 C3 C5 C7 C6 C4 C2 C0 61 FC 61 CF C1 C3 C5 C7 C6 C4 C2 C0 61 FC 61 CF C1 C3 C5 C7 C6 C4 C2 C0 61 FC 61 CF C1 C3 C5 C7 C6 C4 C2 C0 61 FC 61 CF C1 C3 C5 C7 C6 C4 C2 C4 17
|
||||||
|
recv(260): 02 00 A7 A7 61 DF EF ED 61 CF 36 00 F9 30 00 00 61 DF 30 A2 F9 27 31 1E 44 00 00 DD 0A B1 61 CF BB A7 A7 61 DF EF F1 61 CF FC 38 01 00 00 30 00 00 C1 C1 C1 FC 74 05 00 EF FE 71 7B FA FC 3B 07 00 71 7A FA D7 61 CF C1 C3 C5 C7 C6 C4 C2 C0 61 FC 61 CF C1 C3 C5 C7 C6 C4 C2 C0 61 FC 61 CF C1 C3 C5 C7 C6 C4 C2 C0 61 FC 61 CF C1 C3 C5 C7 C6 C4 C2 C0 61 FC 61 CF C1 C3 C5 C7 C6 C4 C2 C0 61 FC 61 CF C1 C3 C5 C7 C6 C4 C2 C0 61 FC 61 CF C1 C3 C5 C7 C6 C4 C2 C0 61 FC 61 CF C1 C3 C5 C7 C6 C4 C2 C0 61 FC 61 CF C1 C3 C5 C7 C6 C4 C2 C0 61 FC 61 CF C1 C3 C5 C7 C6 C4 C2 C0 61 FC 61 CF C1 C3 C5 C7 C6 C4 C2 C0 61 FC 61 CF C1 C3 C5 C7 C6 C4 C2 C0 61 FC 61 CF C1 C3 C5 C7 C6 C4 C2 C0 61 FC 61 CF C1 C3 C5 C7 C6 C4 C2 C0 61 FC 61 CF C1 C3 C5 C7 C6 C4 C2 C0 61 FC 61 CF C1 C3 C5 C7 C6 C4 C2 C4 17
|
||||||
|
recv(2): 02 02
|
||||||
|
recv(4): 06 06 F2 03
|
||||||
|
Send data to address 000200
|
||||||
|
send(260): 02 00 C0 61 FC 61 CF C1 C3 C5 C7 C6 C4 C2 C0 61 FC 61 CF C1 C3 C5 C7 C6 C4 C2 C0 61 FC 61 CF C1 C3 C5 C7 C6 C4 C2 C0 61 FC 61 CF C1 C3 C5 C7 C6 C4 C2 C0 61 FC 61 CF C1 C3 C5 C7 C6 C4 C2 C0 61 FC 61 CF C1 C3 C5 C7 C6 C4 C2 C0 61 FC 61 CF C1 C3 C5 C7 C6 C4 C2 C0 61 FC 61 CF C1 C3 C5 C7 C6 C4 C2 C0 61 FC 61 CF C1 C3 C5 C7 C6 C4 C2 C0 61 FC 61 CF C1 C3 C5 C7 C6 C4 C2 C0 61 FC 61 CF C1 C3 C5 C7 C6 C4 C2 C0 61 FC 61 CF C1 C3 C5 C7 C6 C4 C2 C0 61 FC 61 CF C1 C3 C5 C7 C6 C4 C2 C0 61 FC 61 CF C1 C3 C5 C7 C6 C4 C2 C0 61 FC 61 CF C1 C3 C5 C7 C6 C4 C2 C0 61 FC 61 CF C1 C3 C5 C7 C6 C4 C2 C0 61 FC 61 CF C1 C3 C5 C7 C6 C4 C2 C0 61 FC C9 F0 00 F9 AD F0 12 30 AA C3 78 00 00 30 A0 00 78 02 00 30 6C 81 78 04 00 30 E4 81 78 06 00 30 E6 00 78 08 00 30 C6 81 78 0A 00 30 CE 81 78 0C 00 AC 17
|
||||||
|
recv(260): 02 00 C0 61 FC 61 CF C1 C3 C5 C7 C6 C4 C2 C0 61 FC 61 CF C1 C3 C5 C7 C6 C4 C2 C0 61 FC 61 CF C1 C3 C5 C7 C6 C4 C2 C0 61 FC 61 CF C1 C3 C5 C7 C6 C4 C2 C0 61 FC 61 CF C1 C3 C5 C7 C6 C4 C2 C0 61 FC 61 CF C1 C3 C5 C7 C6 C4 C2 C0 61 FC 61 CF C1 C3 C5 C7 C6 C4 C2 C0 61 FC 61 CF C1 C3 C5 C7 C6 C4 C2 C0 61 FC 61 CF C1 C3 C5 C7 C6 C4 C2 C0 61 FC 61 CF C1 C3 C5 C7 C6 C4 C2 C0 61 FC 61 CF C1 C3 C5 C7 C6 C4 C2 C0 61 FC 61 CF C1 C3 C5 C7 C6 C4 C2 C0 61 FC 61 CF C1 C3 C5 C7 C6 C4 C2 C0 61 FC 61 CF C1 C3 C5 C7 C6 C4 C2 C0 61 FC 61 CF C1 C3 C5 C7 C6 C4 C2 C0 61 FC 61 CF C1 C3 C5 C7 C6 C4 C2 C0 61 FC 61 CF C1 C3 C5 C7 C6 C4 C2 C0 61 FC C9 F0 00 F9 AD F0 12 30 AA C3 78 00 00 30 A0 00 78 02 00 30 6C 81 78 04 00 30 E4 81 78 06 00 30 E6 00 78 08 00 30 C6 81 78 0A 00 30 CE 81 78 0C 00 AC 17
|
||||||
|
recv(2): 02 02
|
||||||
|
recv(4): 06 06 F2 03
|
||||||
|
Send data to address 000300
|
||||||
|
send(260): 02 00 30 A0 01 78 0E 00 30 EE 81 78 10 00 30 E6 81 78 12 00 30 44 24 78 14 00 30 44 00 78 16 00 30 00 42 78 18 00 30 00 18 78 1A 00 30 44 7E 78 50 00 30 EE 01 78 1C 00 30 E0 A5 78 1E 00 30 0A 81 78 20 00 30 A0 A5 78 22 00 30 4E 81 78 24 00 30 4E 01 78 26 00 30 CA 81 78 28 00 30 EE 00 78 2A 00 30 00 A5 78 2C 00 30 A0 80 78 2E 00 30 0E 0A 78 30 00 30 0A 80 78 32 00 30 AA 12 78 34 00 30 AA 18 78 36 00 30 AA 81 78 38 00 30 6E 01 78 3A 00 30 AA 89 78 3C 00 30 6E 09 78 3E 00 30 C6 81 78 40 00 30 00 25 78 42 00 30 AA 80 78 44 00 30 0A 42 78 46 00 30 AA 48 78 48 00 30 00 5A 78 4A 00 30 00 16 78 4C 00 30 00 C3 78 4E 00 D7 30 F5 0F BF 7A F9 30 60 00 BF 7C F9 30 B6 00 BF 7E F9 30 F2 0F BF 80 F9 30 63 00 BF 82 F9 30 D3 00 BF 84 F9 30 D7 00 BF 86 F9 30 70 00 BF 88 F9 30 F7 0F 7B 03
|
||||||
|
recv(260): 02 00 30 A0 01 78 0E 00 30 EE 81 78 10 00 30 E6 81 78 12 00 30 44 24 78 14 00 30 44 00 78 16 00 30 00 42 78 18 00 30 00 18 78 1A 00 30 44 7E 78 50 00 30 EE 01 78 1C 00 30 E0 A5 78 1E 00 30 0A 81 78 20 00 30 A0 A5 78 22 00 30 4E 81 78 24 00 30 4E 01 78 26 00 30 CA 81 78 28 00 30 EE 00 78 2A 00 30 00 A5 78 2C 00 30 A0 80 78 2E 00 30 0E 0A 78 30 00 30 0A 80 78 32 00 30 AA 12 78 34 00 30 AA 18 78 36 00 30 AA 81 78 38 00 30 6E 01 78 3A 00 30 AA 89 78 3C 00 30 6E 09 78 3E 00 30 C6 81 78 40 00 30 00 25 78 42 00 30 AA 80 78 44 00 30 0A 42 78 46 00 30 AA 48 78 48 00 30 00 5A 78 4A 00 30 00 16 78 4C 00 30 00 C3 78 4E 00 D7 30 F5 0F BF 7A F9 30 60 00 BF 7C F9 30 B6 00 BF 7E F9 30 F2 0F BF 80 F9 30 63 00 BF 82 F9 30 D3 00 BF 84 F9 30 D7 00 BF 86 F9 30 70 00 BF 88 F9 30 F7 0F 7B 03
|
||||||
|
recv(2): 02 02
|
||||||
|
recv(4): 06 06 F2 03
|
||||||
|
recv(2): 02 01
|
||||||
|
recv(3): 06 F9 03
|
||||||
|
OK
|
||||||
|
Program block 000400
|
||||||
|
Send "Block Blank Check" command (range=000400..0007FF)
|
||||||
|
send(12): 01 08 32 00 04 00 FF 07 00 00 BC 03
|
||||||
|
recv(12): 01 08 32 00 04 00 FF 07 00 00 BC 03
|
||||||
|
recv(2): 02 01
|
||||||
|
recv(3): 06 F9 03
|
||||||
|
OK
|
||||||
|
Block is empty
|
||||||
|
Send "Programming" command (range=000400..0007FF)
|
||||||
|
send(11): 01 07 40 00 04 00 FF 07 00 AF 03
|
||||||
|
recv(11): 01 07 40 00 04 00 FF 07 00 AF 03
|
||||||
|
recv(2): 02 01
|
||||||
|
recv(3): 06 F9 03
|
||||||
|
Send data to address 000400
|
||||||
|
send(260): 02 00 BF 8A F9 30 F3 0F BF 8C F9 F6 BF 66 F9 F6 BF 68 F9 F6 BF 6A F9 F6 BF 6C F9 30 77 00 BF 96 F9 30 C7 00 BF 98 F9 30 95 00 BF 9A F9 30 E6 00 BF 9C F9 30 97 00 BF 9E F9 30 17 00 BF A0 F9 30 FA 0F BF 52 F9 30 60 00 BF 54 F9 30 D6 00 BF 56 F9 30 F4 0F BF 58 F9 30 6C 00 BF 5A F9 30 BC 00 BF 5C F9 30 BE 00 BF 5E F9 30 E0 00 BF 60 F9 30 FE 0F BF 62 F9 30 FC 0F BF 64 F9 30 EE 00 BF 6E F9 30 3E 00 BF 70 F9 30 9A 00 BF 72 F9 30 76 00 BF 74 F9 30 9E 00 BF 76 F9 30 8E 00 BF 78 F9 FC CF 02 00 C9 F0 00 04 AD F0 12 F1 48 00 00 A6 F0 AD F0 44 28 04 61 E8 EC A5 04 00 FC 2A 07 00 FC 2F 07 00 D7 F5 00 04 F5 01 04 F5 02 04 F5 03 04 51 FF 9F 04 04 51 FF 9F 05 04 51 FF 9F 06 04 51 FF 9F 07 04 51 FF 9F 08 04 51 FF 9F 09 04 51 FF 9F 0A 04 51 FF 9F 0B 04 51 FF 9F 0C 04 51 FF 9F 0D 04 45 17
|
||||||
|
recv(260): 02 00 BF 8A F9 30 F3 0F BF 8C F9 F6 BF 66 F9 F6 BF 68 F9 F6 BF 6A F9 F6 BF 6C F9 30 77 00 BF 96 F9 30 C7 00 BF 98 F9 30 95 00 BF 9A F9 30 E6 00 BF 9C F9 30 97 00 BF 9E F9 30 17 00 BF A0 F9 30 FA 0F BF 52 F9 30 60 00 BF 54 F9 30 D6 00 BF 56 F9 30 F4 0F BF 58 F9 30 6C 00 BF 5A F9 30 BC 00 BF 5C F9 30 BE 00 BF 5E F9 30 E0 00 BF 60 F9 30 FE 0F BF 62 F9 30 FC 0F BF 64 F9 30 EE 00 BF 6E F9 30 3E 00 BF 70 F9 30 9A 00 BF 72 F9 30 76 00 BF 74 F9 30 9E 00 BF 76 F9 30 8E 00 BF 78 F9 FC CF 02 00 C9 F0 00 04 AD F0 12 F1 48 00 00 A6 F0 AD F0 44 28 04 61 E8 EC A5 04 00 FC 2A 07 00 FC 2F 07 00 D7 F5 00 04 F5 01 04 F5 02 04 F5 03 04 51 FF 9F 04 04 51 FF 9F 05 04 51 FF 9F 06 04 51 FF 9F 07 04 51 FF 9F 08 04 51 FF 9F 09 04 51 FF 9F 0A 04 51 FF 9F 0B 04 51 FF 9F 0C 04 51 FF 9F 0A 04 45 17
|
||||||
|
recv(2): 02 02
|
||||||
|
recv(4): 06 06 F2 03
|
||||||
|
Send data to address 000500
|
||||||
|
send(260): 02 00 51 FF 9F 0E 04 51 FF 9F 0F 04 51 FF 9F 10 04 51 FF 9F 13 04 51 FF 9F 14 04 51 FF 9F 15 04 51 FF 9F 16 04 51 FF 9F 17 04 51 FF 9F 18 04 51 FF 9F 19 04 51 FF 9F 1A 04 51 FF 9F 1B 04 51 FF 9F 1C 04 51 FF 9F 1D 04 51 FF 9F 1E 04 51 FF 9F 1F 04 51 FF 9F 20 04 51 FF 9F 21 04 51 FF 9F 22 04 51 FF 9F 23 04 51 FF 9F 24 04 51 FF 9F 25 04 51 FF 9F 26 04 D7 61 EF C1 C3 61 CF 20 10 30 FF FF B8 0C 30 05 00 B8 0E FC CD 03 00 A8 0C B8 08 A8 0E B8 0A A8 08 04 FF FF BD F0 A8 0A 61 D8 A1 B1 BD F2 AD F0 B8 0C AD F2 B8 0E AD F2 44 00 00 AD F0 61 F8 44 00 00 61 F8 EC F0 05 00 FC C2 04 00 A8 0C B8 04 A8 0E B8 06 A8 04 04 FF FF BD F0 A8 06 61 D8 A1 B1 BD F2 AD F0 B8 0C AD F2 B8 0E AD F2 44 00 00 AD F0 61 F8 44 00 00 61 E8 EC BB 05 00 E5 08 04 30 20 A1 B8 00 30 07 00 B8 02 C9 F0 08 9F 17
|
||||||
|
recv(260): 02 00 51 FF 9F 0E 04 51 FF 9F 0F 04 51 FF 9F 10 04 51 FF 9F 13 04 51 FF 9F 14 04 51 FF 9F 15 04 51 FF 9F 16 04 51 FF 9F 17 04 51 FF 9F 18 04 51 FF 9F 19 04 51 FF 9F 1A 04 51 FF 9F 1B 04 51 FF 9F 1C 04 51 FF 9F 1D 04 51 FF 9F 1E 04 51 FF 9F 1F 04 51 FF 9F 20 04 51 FF 9F 21 04 51 FF 9F 22 04 51 FF 9F 23 04 51 FF 9F 24 04 51 FF 9F 25 04 51 FF 9F 26 04 D7 61 EF C1 C3 61 CF 20 10 30 FF FF B8 0C 30 05 00 B8 0E FC CD 03 00 A8 0C B8 08 A8 0E B8 0A A8 08 04 FF FF BD F0 A8 0A 61 D8 A1 B1 BD F2 AD F0 B8 0C AD F2 B8 0E AD F2 44 00 00 AD F0 61 F8 44 00 00 61 F8 EC F0 05 00 FC C2 04 00 A8 0C B8 04 A8 0E B8 06 A8 04 04 FF FF BD F0 A8 06 61 D8 A1 B1 BD F2 AD F0 B8 0C AD F2 B8 0E AD F2 44 00 00 AD F0 61 F8 44 00 00 61 E8 EC BB 05 00 E5 08 04 30 20 A1 B8 00 30 07 00 B8 02 C9 F0 08 9F 17
|
||||||
|
recv(2): 02 02
|
||||||
|
recv(4): 06 06 F2 03
|
||||||
|
Send data to address 000600
|
||||||
|
send(260): 02 00 04 A8 00 B8 0C A8 02 B8 0E A8 0C BD E8 A8 0E BD EA AD E8 04 FF FF BD F4 AD EA 61 D8 A1 B1 BD F6 AD F4 B8 0C AD F6 B8 0E AD EA 44 00 00 AD E8 61 F8 44 00 00 61 E8 EC 09 06 00 AD F0 16 8B 7C FF 9B A8 00 B8 0C A8 02 B8 0E EC 09 06 00 20 02 CF A0 FF 14 C9 F0 A1 FF AD F0 16 71 F2 71 48 A4 FF 71 E3 F6 B8 00 44 A0 00 61 F3 EC 7D 06 00 00 A8 00 A1 B8 00 44 A0 00 61 E3 EC 6E 06 00 F5 F3 00 71 68 A4 FF 71 08 A1 FF 10 02 D7 71 70 F0 00 C9 F0 41 FF AD F0 16 71 F3 71 00 D4 FF 71 08 D0 FF CF 40 FF 76 51 F0 9F 00 03 51 FF 9F 01 03 51 F9 9F 02 03 51 9F 9F 03 03 51 7F 9F 04 03 8F 61 00 5C E7 9F 61 00 71 18 64 00 71 08 6C 00 8F 6E 00 5C C3 9F 6E 00 8F 21 FF 5C 06 9F 21 FF 71 08 23 FF 8F 24 FF 5C F1 9F 24 FF 8F 25 FF 5C E0 9F 25 FF 8F 26 FF 5C FC 9F 26 FF C9 F2 27 FF AD F2 16 CA 17
|
||||||
|
recv(260): 02 00 04 A8 00 B8 0C A8 02 B8 0E A8 0C BD E8 A8 0E BD EA AD E8 04 FF FF BD F4 AD EA 61 D8 A1 B1 BD F6 AD F4 B8 0C AD F6 B8 0E AD EA 44 00 00 AD E8 61 F8 44 00 00 61 E8 EC 09 06 00 AD F0 16 8B 7C FF 9B A8 00 B8 0C A8 02 B8 0E EC 09 06 00 20 02 CF A0 FF 14 C9 F0 A1 FF AD F0 16 71 F2 71 48 A4 FF 71 E3 F6 B8 00 44 A0 00 61 F3 EC 7D 06 00 00 A8 00 A1 B8 00 44 A0 00 61 E3 EC 6E 06 00 F5 F3 00 71 68 A4 FF 71 08 A1 FF 10 02 D7 71 70 F0 00 C9 F0 41 FF AD F0 16 71 F3 71 00 D4 FF 71 08 D0 FF CF 40 FF 76 51 F0 9F 00 03 51 FF 9F 01 03 51 F9 9F 02 03 51 9F 9F 03 03 51 7F 9F 04 03 8F 61 00 5C E7 9F 61 00 71 18 64 00 71 08 6C 00 8F 6E 00 5C C3 9F 6E 00 8F 21 FF 5C 06 9F 21 FF 71 08 23 FF 8F 24 FF 5C F1 9F 24 FF 8F 25 FF 5C E0 9F 25 FF 8F 26 FF 5C FC 9F 26 FF C9 F2 27 FF AD F2 16 CA 17
|
||||||
|
recv(2): 02 02
|
||||||
|
recv(4): 06 06 F2 03
|
||||||
|
Send data to address 000700
|
||||||
|
send(260): 02 00 8B F1 9B 71 08 2C FF C9 F2 2E FF AD F2 16 8B F1 9B 51 02 9F 76 00 71 18 22 FF AD F0 12 F1 48 00 00 CF 42 FF 07 CF 43 FF 0A D7 71 70 41 FF D7 C9 F0 41 FF AD F0 16 71 D2 71 E2 D7 F5 77 00 FC 8B 06 00 FC 4D 06 00 F5 F0 02 F5 78 00 51 80 9F F5 00 D7 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF 2B 03
|
||||||
|
recv(260): 02 00 8B F1 9B 71 08 2C FF C9 F2 2E FF AD F2 16 8B F1 9B 51 02 9F 76 00 71 18 22 FF AD F0 12 F1 48 00 00 CF 42 FF 07 CF 43 FF 0A D7 71 70 41 FF D7 C9 F0 41 FF AD F0 16 71 D2 71 E2 D7 F5 77 00 FC 8B 06 00 FC 4D 06 00 F5 F0 02 F5 78 00 51 80 9F F5 00 D7 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF 2B 03
|
||||||
|
recv(2): 02 02
|
||||||
|
recv(4): 06 06 F2 03
|
||||||
|
recv(2): 02 01
|
||||||
|
recv(3): 06 F9 03
|
||||||
|
OK
|
||||||
|
No data at block 000800
|
||||||
|
No data at block 000C00
|
||||||
|
No data at block 001000
|
||||||
|
No data at block 001400
|
||||||
|
No data at block 001800
|
||||||
|
No data at block 001C00
|
||||||
|
No data at block 002000
|
||||||
|
No data at block 002400
|
||||||
|
No data at block 002800
|
||||||
|
No data at block 002C00
|
||||||
|
No data at block 003000
|
||||||
|
No data at block 003400
|
||||||
|
No data at block 003800
|
||||||
|
No data at block 003C00
|
||||||
|
Write data flash
|
||||||
|
No data at block 0F1000
|
||||||
|
No data at block 0F1400
|
||||||
|
Verify Code flash
|
||||||
|
Verify block 000000
|
||||||
|
Send "Verify" command (range=000000..0003FF)
|
||||||
|
send(11): 01 07 13 00 00 00 FF 03 00 E4 03
|
||||||
|
recv(11): 01 07 13 00 00 00 FF 03 00 E4 03
|
||||||
|
recv(2): 02 01
|
||||||
|
recv(3): 06 F9 03
|
||||||
|
Send data to address 000000
|
||||||
|
send(260): 02 00 DA 00 FF FF 43 01 4F 01 5B 01 67 01 73 01 7F 01 8B 01 97 01 A3 01 AF 01 BB 01 C7 01 D3 01 FF FF DF 01 FF FF EB 01 F7 01 03 02 0F 02 1B 02 27 02 33 02 3F 02 4B 02 FF FF FF FF FF FF 57 02 63 02 6F 02 7B 02 87 02 93 02 9F 02 AB 02 B7 02 FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF C3 02 FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF EF FF E0 85 00 00 00 00 00 00 00 00 00 00 FF FF FF FF FF FF FF FF FF FF DA 00 CB F8 E0 FE 41 00 61 CF 34 7A 07 36 80 F9 61 DF 36 80 F9 30 80 F9 27 31 1E 44 00 00 DD 0E B1 61 CF 11 A9 BB A5 A5 97 17
|
||||||
|
recv(260): 02 00 DA 00 FF FF 43 01 4F 01 5B 01 67 01 73 01 7F 01 8B 01 97 01 A3 01 AF 01 BB 01 C7 01 D3 01 FF FF DF 01 FF FF EB 01 F7 01 03 02 0F 02 1B 02 27 02 33 02 3F 02 4B 02 FF FF FF FF FF FF 57 02 63 02 6F 02 7B 02 87 02 93 02 9F 02 AB 02 B7 02 FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF C3 02 FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF EF FF E0 85 00 00 00 00 00 00 00 00 00 00 FF FF FF FF FF FF FF FF FF FF DA 00 CB F8 E0 FE 41 00 61 CF 34 7A 07 36 80 F9 61 DF 36 80 F9 30 80 F9 27 31 1E 44 00 00 DD 0E B1 61 CF 11 A9 BB A5 A5 97 17
|
||||||
|
recv(2): 02 02
|
||||||
|
recv(4): 06 06 F2 03
|
||||||
|
Send data to address 000100
|
||||||
|
send(260): 02 00 A7 A7 61 DF EF ED 61 CF 36 00 F9 30 00 00 61 DF 30 A2 F9 27 31 1E 44 00 00 DD 0A B1 61 CF BB A7 A7 61 DF EF F1 61 CF FC 38 01 00 00 30 00 00 C1 C1 C1 FC 74 05 00 EF FE 71 7B FA FC 3B 07 00 71 7A FA D7 61 CF C1 C3 C5 C7 C6 C4 C2 C0 61 FC 61 CF C1 C3 C5 C7 C6 C4 C2 C0 61 FC 61 CF C1 C3 C5 C7 C6 C4 C2 C0 61 FC 61 CF C1 C3 C5 C7 C6 C4 C2 C0 61 FC 61 CF C1 C3 C5 C7 C6 C4 C2 C0 61 FC 61 CF C1 C3 C5 C7 C6 C4 C2 C0 61 FC 61 CF C1 C3 C5 C7 C6 C4 C2 C0 61 FC 61 CF C1 C3 C5 C7 C6 C4 C2 C0 61 FC 61 CF C1 C3 C5 C7 C6 C4 C2 C0 61 FC 61 CF C1 C3 C5 C7 C6 C4 C2 C0 61 FC 61 CF C1 C3 C5 C7 C6 C4 C2 C0 61 FC 61 CF C1 C3 C5 C7 C6 C4 C2 C0 61 FC 61 CF C1 C3 C5 C7 C6 C4 C2 C0 61 FC 61 CF C1 C3 C5 C7 C6 C4 C2 C0 61 FC 61 CF C1 C3 C5 C7 C6 C4 C2 C0 61 FC 61 CF C1 C3 C5 C7 C6 C4 C2 C4 17
|
||||||
|
recv(260): 02 00 A7 A7 61 DF EF ED 61 CF 36 00 F9 30 00 00 61 DF 30 A2 F9 27 31 1E 44 00 00 DD 0A B1 61 CF BB A7 A7 61 DF EF F1 61 CF FC 38 01 00 00 30 00 00 C1 C1 C1 FC 74 05 00 EF FE 71 7B FA FC 3B 07 00 71 7A FA D7 61 CF C1 C3 C5 C7 C6 C4 C2 C0 61 FC 61 CF C1 C3 C5 C7 C6 C4 C2 C0 61 FC 61 CF C1 C3 C5 C7 C6 C4 C2 C0 61 FC 61 CF C1 C3 C5 C7 C6 C4 C2 C0 61 FC 61 CF C1 C3 C5 C7 C6 C4 C2 C0 61 FC 61 CF C1 C3 C5 C7 C6 C4 C2 C0 61 FC 61 CF C1 C3 C5 C7 C6 C4 C2 C0 61 FC 61 CF C1 C3 C5 C7 C6 C4 C2 C0 61 FC 61 CF C1 C3 C5 C7 C6 C4 C2 C0 61 FC 61 CF C1 C3 C5 C7 C6 C4 C2 C0 61 FC 61 CF C1 C3 C5 C7 C6 C4 C2 C0 61 FC 61 CF C1 C3 C5 C7 C6 C4 C2 C0 61 FC 61 CF C1 C3 C5 C7 C6 C4 C2 C0 61 FC 61 CF C1 C3 C5 C7 C6 C4 C2 C0 61 FC 61 CF C1 C3 C5 C7 C6 C4 C2 C0 61 FC 61 CF C1 C3 C5 C7 C6 C4 C2 C4 17
|
||||||
|
recv(2): 02 02
|
||||||
|
recv(4): 06 06 F2 03
|
||||||
|
Send data to address 000200
|
||||||
|
send(260): 02 00 C0 61 FC 61 CF C1 C3 C5 C7 C6 C4 C2 C0 61 FC 61 CF C1 C3 C5 C7 C6 C4 C2 C0 61 FC 61 CF C1 C3 C5 C7 C6 C4 C2 C0 61 FC 61 CF C1 C3 C5 C7 C6 C4 C2 C0 61 FC 61 CF C1 C3 C5 C7 C6 C4 C2 C0 61 FC 61 CF C1 C3 C5 C7 C6 C4 C2 C0 61 FC 61 CF C1 C3 C5 C7 C6 C4 C2 C0 61 FC 61 CF C1 C3 C5 C7 C6 C4 C2 C0 61 FC 61 CF C1 C3 C5 C7 C6 C4 C2 C0 61 FC 61 CF C1 C3 C5 C7 C6 C4 C2 C0 61 FC 61 CF C1 C3 C5 C7 C6 C4 C2 C0 61 FC 61 CF C1 C3 C5 C7 C6 C4 C2 C0 61 FC 61 CF C1 C3 C5 C7 C6 C4 C2 C0 61 FC 61 CF C1 C3 C5 C7 C6 C4 C2 C0 61 FC 61 CF C1 C3 C5 C7 C6 C4 C2 C0 61 FC 61 CF C1 C3 C5 C7 C6 C4 C2 C0 61 FC 61 CF C1 C3 C5 C7 C6 C4 C2 C0 61 FC C9 F0 00 F9 AD F0 12 30 AA C3 78 00 00 30 A0 00 78 02 00 30 6C 81 78 04 00 30 E4 81 78 06 00 30 E6 00 78 08 00 30 C6 81 78 0A 00 30 CE 81 78 0C 00 AC 17
|
||||||
|
recv(260): 02 00 C0 61 FC 61 CF C1 C3 C5 C7 C6 C4 C2 C0 61 FC 61 CF C1 C3 C5 C7 C6 C4 C2 C0 61 FC 61 CF C1 C3 C5 C7 C6 C4 C2 C0 61 FC 61 CF C1 C3 C5 C7 C6 C4 C2 C0 61 FC 61 CF C1 C3 C5 C7 C6 C4 C2 C0 61 FC 61 CF C1 C3 C5 C7 C6 C4 C2 C0 61 FC 61 CF C1 C3 C5 C7 C6 C4 C2 C0 61 FC 61 CF C1 C3 C5 C7 C6 C4 C2 C0 61 FC 61 CF C1 C3 C5 C7 C6 C4 C2 C0 61 FC 61 CF C1 C3 C5 C7 C6 C4 C2 C0 61 FC 61 CF C1 C3 C5 C7 C6 C4 C2 C0 61 FC 61 CF C1 C3 C5 C7 C6 C4 C2 C0 61 FC 61 CF C1 C3 C5 C7 C6 C4 C2 C0 61 FC 61 CF C1 C3 C5 C7 C6 C4 C2 C0 61 FC 61 CF C1 C3 C5 C7 C6 C4 C2 C0 61 FC 61 CF C1 C3 C5 C7 C6 C4 C2 C0 61 FC 61 CF C1 C3 C5 C7 C6 C4 C2 C0 61 FC C9 F0 00 F9 AD F0 12 30 AA C3 78 00 00 30 A0 00 78 02 00 30 6C 81 78 04 00 30 E4 81 78 06 00 30 E6 00 78 08 00 30 C6 81 78 0A 00 30 CE 81 78 0C 00 AC 17
|
||||||
|
recv(2): 02 02
|
||||||
|
recv(4): 06 06 F2 03
|
||||||
|
Send data to address 000300
|
||||||
|
send(260): 02 00 30 A0 01 78 0E 00 30 EE 81 78 10 00 30 E6 81 78 12 00 30 44 24 78 14 00 30 44 00 78 16 00 30 00 42 78 18 00 30 00 18 78 1A 00 30 44 7E 78 50 00 30 EE 01 78 1C 00 30 E0 A5 78 1E 00 30 0A 81 78 20 00 30 A0 A5 78 22 00 30 4E 81 78 24 00 30 4E 01 78 26 00 30 CA 81 78 28 00 30 EE 00 78 2A 00 30 00 A5 78 2C 00 30 A0 80 78 2E 00 30 0E 0A 78 30 00 30 0A 80 78 32 00 30 AA 12 78 34 00 30 AA 18 78 36 00 30 AA 81 78 38 00 30 6E 01 78 3A 00 30 AA 89 78 3C 00 30 6E 09 78 3E 00 30 C6 81 78 40 00 30 00 25 78 42 00 30 AA 80 78 44 00 30 0A 42 78 46 00 30 AA 48 78 48 00 30 00 5A 78 4A 00 30 00 16 78 4C 00 30 00 C3 78 4E 00 D7 30 F5 0F BF 7A F9 30 60 00 BF 7C F9 30 B6 00 BF 7E F9 30 F2 0F BF 80 F9 30 63 00 BF 82 F9 30 D3 00 BF 84 F9 30 D7 00 BF 86 F9 30 70 00 BF 88 F9 30 F7 0F 7B 03
|
||||||
|
recv(260): 02 00 30 A0 01 78 0E 00 30 EE 81 78 10 00 30 E6 81 78 12 00 30 44 24 78 14 00 30 44 00 78 16 00 30 00 42 78 18 00 30 00 18 78 1A 00 30 44 7E 78 50 00 30 EE 01 78 1C 00 30 E0 A5 78 1E 00 30 0A 81 78 20 00 30 A0 A5 78 22 00 30 4E 81 78 24 00 30 4E 01 78 26 00 30 CA 81 78 28 00 30 EE 00 78 2A 00 30 00 A5 78 2C 00 30 A0 80 78 2E 00 30 0E 0A 78 30 00 30 0A 80 78 32 00 30 AA 12 78 34 00 30 AA 18 78 36 00 30 AA 81 78 38 00 30 6E 01 78 3A 00 30 AA 89 78 3C 00 30 6E 09 78 3E 00 30 C6 81 78 40 00 30 00 25 78 42 00 30 AA 80 78 44 00 30 0A 42 78 46 00 30 AA 48 78 48 00 30 00 5A 78 4A 00 30 00 16 78 4C 00 30 00 C3 78 4E 00 D7 30 F5 0F BF 7A F9 30 60 00 BF 7C F9 30 B6 00 BF 7E F9 30 F2 0F BF 80 F9 30 63 00 BF 82 F9 30 D3 00 BF 84 F9 30 D7 00 BF 86 F9 30 70 00 BF 88 F9 30 F7 0F 7B 03
|
||||||
|
recv(2): 02 02
|
||||||
|
recv(4): 06 06 F2 03
|
||||||
|
OK
|
||||||
|
Verify block 000400
|
||||||
|
Send "Verify" command (range=000400..0007FF)
|
||||||
|
send(11): 01 07 13 00 04 00 FF 07 00 DC 03
|
||||||
|
recv(11): 01 07 13 00 04 00 FF 07 00 DC 03
|
||||||
|
recv(2): 02 01
|
||||||
|
recv(3): 06 F9 03
|
||||||
|
Send data to address 000400
|
||||||
|
send(260): 02 00 BF 8A F9 30 F3 0F BF 8C F9 F6 BF 66 F9 F6 BF 68 F9 F6 BF 6A F9 F6 BF 6C F9 30 77 00 BF 96 F9 30 C7 00 BF 98 F9 30 95 00 BF 9A F9 30 E6 00 BF 9C F9 30 97 00 BF 9E F9 30 17 00 BF A0 F9 30 FA 0F BF 52 F9 30 60 00 BF 54 F9 30 D6 00 BF 56 F9 30 F4 0F BF 58 F9 30 6C 00 BF 5A F9 30 BC 00 BF 5C F9 30 BE 00 BF 5E F9 30 E0 00 BF 60 F9 30 FE 0F BF 62 F9 30 FC 0F BF 64 F9 30 EE 00 BF 6E F9 30 3E 00 BF 70 F9 30 9A 00 BF 72 F9 30 76 00 BF 74 F9 30 9E 00 BF 76 F9 30 8E 00 BF 78 F9 FC CF 02 00 C9 F0 00 04 AD F0 12 F1 48 00 00 A6 F0 AD F0 44 28 04 61 E8 EC A5 04 00 FC 2A 07 00 FC 2F 07 00 D7 F5 00 04 F5 01 04 F5 02 04 F5 03 04 51 FF 9F 04 04 51 FF 9F 05 04 51 FF 9F 06 04 51 FF 9F 07 04 51 FF 9F 08 04 51 FF 9F 09 04 51 FF 9F 0A 04 51 FF 9F 0B 04 51 FF 9F 0C 04 51 FF 9F 0D 04 45 17
|
||||||
|
recv(260): 02 00 BF 8A F9 30 F3 0F BF 8C F9 F6 BF 66 F9 F6 BF 68 F9 F6 BF 6A F9 F6 BF 6C F9 30 77 00 BF 96 F9 30 C7 00 BF 98 F9 30 95 00 BF 9A F9 30 E6 00 BF 9C F9 30 97 00 BF 9E F9 30 17 00 BF A0 F9 30 FA 0F BF 52 F9 30 60 00 BF 54 F9 30 D6 00 BF 56 F9 30 F4 0F BF 58 F9 30 6C 00 BF 5A F9 30 BC 00 BF 5C F9 30 BE 00 BF 5E F9 30 E0 00 BF 60 F9 30 FE 0F BF 62 F9 30 FC 0F BF 64 F9 30 EE 00 BF 6E F9 30 3E 00 BF 70 F9 30 9A 00 BF 72 F9 30 76 00 BF 74 F9 30 9E 00 BF 76 F9 30 8E 00 BF 78 F9 FC CF 02 00 C9 F0 00 04 AD F0 12 F1 48 00 00 A6 F0 AD F0 44 28 04 61 E8 EC A5 04 00 FC 2A 07 00 FC 2F 07 00 D7 F5 00 04 F5 01 04 F5 02 04 F5 03 04 51 FF 9F 04 04 51 FF 9F 05 04 51 FF 9F 06 04 51 FF 9F 07 04 51 FF 9F 08 04 51 FF 9F 09 04 51 FF 9F 0A 04 51 FF 9F 0B 04 51 FF 9F 0C 04 51 FF 9F 0A 04 45 17
|
||||||
|
recv(2): 02 02
|
||||||
|
recv(4): 06 06 F2 03
|
||||||
|
Send data to address 000500
|
||||||
|
send(260): 02 00 51 FF 9F 0E 04 51 FF 9F 0F 04 51 FF 9F 10 04 51 FF 9F 13 04 51 FF 9F 14 04 51 FF 9F 15 04 51 FF 9F 16 04 51 FF 9F 17 04 51 FF 9F 18 04 51 FF 9F 19 04 51 FF 9F 1A 04 51 FF 9F 1B 04 51 FF 9F 1C 04 51 FF 9F 1D 04 51 FF 9F 1E 04 51 FF 9F 1F 04 51 FF 9F 20 04 51 FF 9F 21 04 51 FF 9F 22 04 51 FF 9F 23 04 51 FF 9F 24 04 51 FF 9F 25 04 51 FF 9F 26 04 D7 61 EF C1 C3 61 CF 20 10 30 FF FF B8 0C 30 05 00 B8 0E FC CD 03 00 A8 0C B8 08 A8 0E B8 0A A8 08 04 FF FF BD F0 A8 0A 61 D8 A1 B1 BD F2 AD F0 B8 0C AD F2 B8 0E AD F2 44 00 00 AD F0 61 F8 44 00 00 61 F8 EC F0 05 00 FC C2 04 00 A8 0C B8 04 A8 0E B8 06 A8 04 04 FF FF BD F0 A8 06 61 D8 A1 B1 BD F2 AD F0 B8 0C AD F2 B8 0E AD F2 44 00 00 AD F0 61 F8 44 00 00 61 E8 EC BB 05 00 E5 08 04 30 20 A1 B8 00 30 07 00 B8 02 C9 F0 08 9F 17
|
||||||
|
recv(260): 02 00 51 FF 9F 0E 04 51 FF 9F 0F 04 51 FF 9F 10 04 51 FF 9F 13 04 51 FF 9F 14 04 51 FF 9F 15 04 51 FF 9F 16 04 51 FF 9F 17 04 51 FF 9F 18 04 51 FF 9F 19 04 51 FF 9F 1A 04 51 FF 9F 1B 04 51 FF 9F 1C 04 51 FF 9F 1D 04 51 FF 9F 1E 04 51 FF 9F 1F 04 51 FF 9F 20 04 51 FF 9F 21 04 51 FF 9F 22 04 51 FF 9F 23 04 51 FF 9F 24 04 51 FF 9F 25 04 51 FF 9F 26 04 D7 61 EF C1 C3 61 CF 20 10 30 FF FF B8 0C 30 05 00 B8 0E FC CD 03 00 A8 0C B8 08 A8 0E B8 0A A8 08 04 FF FF BD F0 A8 0A 61 D8 A1 B1 BD F2 AD F0 B8 0C AD F2 B8 0E AD F2 44 00 00 AD F0 61 F8 44 00 00 61 F8 EC F0 05 00 FC C2 04 00 A8 0C B8 04 A8 0E B8 06 A8 04 04 FF FF BD F0 A8 06 61 D8 A1 B1 BD F2 AD F0 B8 0C AD F2 B8 0E AD F2 44 00 00 AD F0 61 F8 44 00 00 61 E8 EC BB 05 00 E5 08 04 30 20 A1 B8 00 30 07 00 B8 02 C9 F0 08 9F 17
|
||||||
|
recv(2): 02 02
|
||||||
|
recv(4): 06 06 F2 03
|
||||||
|
Send data to address 000600
|
||||||
|
send(260): 02 00 04 A8 00 B8 0C A8 02 B8 0E A8 0C BD E8 A8 0E BD EA AD E8 04 FF FF BD F4 AD EA 61 D8 A1 B1 BD F6 AD F4 B8 0C AD F6 B8 0E AD EA 44 00 00 AD E8 61 F8 44 00 00 61 E8 EC 09 06 00 AD F0 16 8B 7C FF 9B A8 00 B8 0C A8 02 B8 0E EC 09 06 00 20 02 CF A0 FF 14 C9 F0 A1 FF AD F0 16 71 F2 71 48 A4 FF 71 E3 F6 B8 00 44 A0 00 61 F3 EC 7D 06 00 00 A8 00 A1 B8 00 44 A0 00 61 E3 EC 6E 06 00 F5 F3 00 71 68 A4 FF 71 08 A1 FF 10 02 D7 71 70 F0 00 C9 F0 41 FF AD F0 16 71 F3 71 00 D4 FF 71 08 D0 FF CF 40 FF 76 51 F0 9F 00 03 51 FF 9F 01 03 51 F9 9F 02 03 51 9F 9F 03 03 51 7F 9F 04 03 8F 61 00 5C E7 9F 61 00 71 18 64 00 71 08 6C 00 8F 6E 00 5C C3 9F 6E 00 8F 21 FF 5C 06 9F 21 FF 71 08 23 FF 8F 24 FF 5C F1 9F 24 FF 8F 25 FF 5C E0 9F 25 FF 8F 26 FF 5C FC 9F 26 FF C9 F2 27 FF AD F2 16 CA 17
|
||||||
|
recv(260): 02 00 04 A8 00 B8 0C A8 02 B8 0E A8 0C BD E8 A8 0E BD EA AD E8 04 FF FF BD F4 AD EA 61 D8 A1 B1 BD F6 AD F4 B8 0C AD F6 B8 0E AD EA 44 00 00 AD E8 61 F8 44 00 00 61 E8 EC 09 06 00 AD F0 16 8B 7C FF 9B A8 00 B8 0C A8 02 B8 0E EC 09 06 00 20 02 CF A0 FF 14 C9 F0 A1 FF AD F0 16 71 F2 71 48 A4 FF 71 E3 F6 B8 00 44 A0 00 61 F3 EC 7D 06 00 00 A8 00 A1 B8 00 44 A0 00 61 E3 EC 6E 06 00 F5 F3 00 71 68 A4 FF 71 08 A1 FF 10 02 D7 71 70 F0 00 C9 F0 41 FF AD F0 16 71 F3 71 00 D4 FF 71 08 D0 FF CF 40 FF 76 51 F0 9F 00 03 51 FF 9F 01 03 51 F9 9F 02 03 51 9F 9F 03 03 51 7F 9F 04 03 8F 61 00 5C E7 9F 61 00 71 18 64 00 71 08 6C 00 8F 6E 00 5C C3 9F 6E 00 8F 21 FF 5C 06 9F 21 FF 71 08 23 FF 8F 24 FF 5C F1 9F 24 FF 8F 25 FF 5C E0 9F 25 FF 8F 26 FF 5C FC 9F 26 FF C9 F2 27 FF AD F2 16 CA 17
|
||||||
|
recv(2): 02 02
|
||||||
|
recv(4): 06 06 F2 03
|
||||||
|
Send data to address 000700
|
||||||
|
send(260): 02 00 8B F1 9B 71 08 2C FF C9 F2 2E FF AD F2 16 8B F1 9B 51 02 9F 76 00 71 18 22 FF AD F0 12 F1 48 00 00 CF 42 FF 07 CF 43 FF 0A D7 71 70 41 FF D7 C9 F0 41 FF AD F0 16 71 D2 71 E2 D7 F5 77 00 FC 8B 06 00 FC 4D 06 00 F5 F0 02 F5 78 00 51 80 9F F5 00 D7 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF 2B 03
|
||||||
|
recv(260): 02 00 8B F1 9B 71 08 2C FF C9 F2 2E FF AD F2 16 8B F1 9B 51 02 9F 76 00 71 18 22 FF AD F0 12 F1 48 00 00 CF 42 FF 07 CF 43 FF 0A D7 71 70 41 FF D7 C9 F0 41 FF AD F0 16 71 D2 71 E2 D7 F5 77 00 FC 8B 06 00 FC 4D 06 00 F5 F0 02 F5 78 00 51 80 9F F5 00 D7 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF 2B 03
|
||||||
|
recv(2): 02 02
|
||||||
|
recv(4): 06 06 F2 03
|
||||||
|
OK
|
||||||
|
Verify block 000800
|
||||||
|
Send "Block Blank Check" command (range=000800..000BFF)
|
||||||
|
send(12): 01 08 32 00 08 00 FF 0B 00 00 B4 03
|
||||||
|
recv(12): 01 08 32 00 08 00 FF 0B 00 00 B4 03
|
||||||
|
recv(2): 02 01
|
||||||
|
recv(3): 06 F9 03
|
||||||
|
OK
|
||||||
|
Block is empty
|
||||||
|
Verify block 000C00
|
||||||
|
Send "Block Blank Check" command (range=000C00..000FFF)
|
||||||
|
send(12): 01 08 32 00 0C 00 FF 0F 00 00 AC 03
|
||||||
|
recv(12): 01 08 32 00 0C 00 FF 0F 00 00 AC 03
|
||||||
|
recv(2): 02 01
|
||||||
|
recv(3): 06 F9 03
|
||||||
|
OK
|
||||||
|
Block is empty
|
||||||
|
Verify block 001000
|
||||||
|
Send "Block Blank Check" command (range=001000..0013FF)
|
||||||
|
send(12): 01 08 32 00 10 00 FF 13 00 00 A4 03
|
||||||
|
recv(12): 01 08 32 00 10 00 FF 13 00 00 A4 03
|
||||||
|
recv(2): 02 01
|
||||||
|
recv(3): 06 F9 03
|
||||||
|
OK
|
||||||
|
Block is empty
|
||||||
|
Verify block 001400
|
||||||
|
Send "Block Blank Check" command (range=001400..0017FF)
|
||||||
|
send(12): 01 08 32 00 14 00 FF 17 00 00 9C 03
|
||||||
|
recv(12): 01 08 32 00 14 00 FF 17 00 00 9C 03
|
||||||
|
recv(2): 02 01
|
||||||
|
recv(3): 06 F9 03
|
||||||
|
OK
|
||||||
|
Block is empty
|
||||||
|
Verify block 001800
|
||||||
|
Send "Block Blank Check" command (range=001800..001BFF)
|
||||||
|
send(12): 01 08 32 00 18 00 FF 1B 00 00 94 03
|
||||||
|
recv(12): 01 08 32 00 18 00 FF 1B 00 00 94 03
|
||||||
|
recv(2): 02 01
|
||||||
|
recv(3): 06 F9 03
|
||||||
|
OK
|
||||||
|
Block is empty
|
||||||
|
Verify block 001C00
|
||||||
|
Send "Block Blank Check" command (range=001C00..001FFF)
|
||||||
|
send(12): 01 08 32 00 1C 00 FF 1F 00 00 8C 03
|
||||||
|
recv(12): 01 08 32 00 1C 00 FF 1F 00 00 8C 03
|
||||||
|
recv(2): 02 01
|
||||||
|
recv(3): 06 F9 03
|
||||||
|
OK
|
||||||
|
Block is empty
|
||||||
|
Verify block 002000
|
||||||
|
Send "Block Blank Check" command (range=002000..0023FF)
|
||||||
|
send(12): 01 08 32 00 20 00 FF 23 00 00 84 03
|
||||||
|
recv(12): 01 08 32 00 20 00 FF 23 00 00 84 03
|
||||||
|
recv(2): 02 01
|
||||||
|
recv(3): 06 F9 03
|
||||||
|
OK
|
||||||
|
Block is empty
|
||||||
|
Verify block 002400
|
||||||
|
Send "Block Blank Check" command (range=002400..0027FF)
|
||||||
|
send(12): 01 08 32 00 24 00 FF 27 00 00 7C 03
|
||||||
|
recv(12): 01 08 32 00 24 00 FF 27 00 00 7C 03
|
||||||
|
recv(2): 02 01
|
||||||
|
recv(3): 06 F9 03
|
||||||
|
OK
|
||||||
|
Block is empty
|
||||||
|
Verify block 002800
|
||||||
|
Send "Block Blank Check" command (range=002800..002BFF)
|
||||||
|
send(12): 01 08 32 00 28 00 FF 2B 00 00 74 03
|
||||||
|
recv(12): 01 08 32 00 28 00 FF 2B 00 00 74 03
|
||||||
|
recv(2): 02 01
|
||||||
|
recv(3): 06 F9 03
|
||||||
|
OK
|
||||||
|
Block is empty
|
||||||
|
Verify block 002C00
|
||||||
|
Send "Block Blank Check" command (range=002C00..002FFF)
|
||||||
|
send(12): 01 08 32 00 2C 00 FF 2F 00 00 6C 03
|
||||||
|
recv(12): 01 08 32 00 2C 00 FF 2F 00 00 6C 03
|
||||||
|
recv(2): 02 01
|
||||||
|
recv(3): 06 F9 03
|
||||||
|
OK
|
||||||
|
Block is empty
|
||||||
|
Verify block 003000
|
||||||
|
Send "Block Blank Check" command (range=003000..0033FF)
|
||||||
|
send(12): 01 08 32 00 30 00 FF 33 00 00 64 03
|
||||||
|
recv(12): 01 08 32 00 30 00 FF 33 00 00 64 03
|
||||||
|
recv(2): 02 01
|
||||||
|
recv(3): 06 F9 03
|
||||||
|
OK
|
||||||
|
Block is empty
|
||||||
|
Verify block 003400
|
||||||
|
Send "Block Blank Check" command (range=003400..0037FF)
|
||||||
|
send(12): 01 08 32 00 34 00 FF 37 00 00 5C 03
|
||||||
|
recv(12): 01 08 32 00 34 00 FF 37 00 00 5C 03
|
||||||
|
recv(2): 02 01
|
||||||
|
recv(3): 06 F9 03
|
||||||
|
OK
|
||||||
|
Block is empty
|
||||||
|
Verify block 003800
|
||||||
|
Send "Block Blank Check" command (range=003800..003BFF)
|
||||||
|
send(12): 01 08 32 00 38 00 FF 3B 00 00 54 03
|
||||||
|
recv(12): 01 08 32 00 38 00 FF 3B 00 00 54 03
|
||||||
|
recv(2): 02 01
|
||||||
|
recv(3): 06 F9 03
|
||||||
|
OK
|
||||||
|
Block is empty
|
||||||
|
Verify block 003C00
|
||||||
|
Send "Block Blank Check" command (range=003C00..003FFF)
|
||||||
|
send(12): 01 08 32 00 3C 00 FF 3F 00 00 4C 03
|
||||||
|
recv(12): 01 08 32 00 3C 00 FF 3F 00 00 4C 03
|
||||||
|
recv(2): 02 01
|
||||||
|
recv(3): 06 F9 03
|
||||||
|
OK
|
||||||
|
Block is empty
|
||||||
|
Verify Data flash
|
||||||
|
Verify block 0F1000
|
||||||
|
Send "Block Blank Check" command (range=0F1000..0F13FF)
|
||||||
|
send(12): 01 08 32 00 10 0F FF 13 0F 00 86 03
|
||||||
|
recv(12): 01 08 32 00 10 0F FF 13 0F 00 86 03
|
||||||
|
recv(2): 02 01
|
||||||
|
recv(3): 06 F9 03
|
||||||
|
OK
|
||||||
|
Block is empty
|
||||||
|
Verify block 0F1400
|
||||||
|
Send "Block Blank Check" command (range=0F1400..0F17FF)
|
||||||
|
send(12): 01 08 32 00 14 0F FF 17 0F 00 7E 03
|
||||||
|
recv(12): 01 08 32 00 14 0F FF 17 0F 00 7E 03
|
||||||
|
recv(2): 02 01
|
||||||
|
recv(3): 06 F9 03
|
||||||
|
OK
|
||||||
|
Block is empty
|
||||||
|
Close port
|
||||||
|
|
@ -0,0 +1,110 @@
|
||||||
|
|
||||||
|
#include <stdio.h>
|
||||||
|
|
||||||
|
#include <hardware/clocks.h>
|
||||||
|
#include <hardware/pio.h>
|
||||||
|
#include <hardware/pio_instructions.h>
|
||||||
|
#include <hardware/timer.h>
|
||||||
|
|
||||||
|
#include "pio_sbw.h"
|
||||||
|
#include "sbw.pio.h"
|
||||||
|
|
||||||
|
static uint16_t pio_read_one(PIO pio, uint sm, uint32_t off) {
|
||||||
|
const int FREQ_SM = 500 * 1000; // 500 kHz
|
||||||
|
const int T_SM_US = 2; // 1/500 kHz = 2 us
|
||||||
|
|
||||||
|
// disable SM
|
||||||
|
pio_sm_set_enabled(pio, sm, false);
|
||||||
|
// disable wrap
|
||||||
|
pio_sm_config defcfg = pio_get_default_sm_config();
|
||||||
|
pio_sm_set_config(pio, sm, &defcfg);
|
||||||
|
// set clkdiv to something slow
|
||||||
|
pio_sm_set_clkdiv(pio, sm, 2*(float)clock_get_hz(clk_sys) / FREQ_SM);
|
||||||
|
// clear PIO FIFOs
|
||||||
|
pio_sm_clear_fifos(pio, sm);
|
||||||
|
// clear debug flags
|
||||||
|
const uint32_t flags = (1<<PIO_FDEBUG_TXOVER_LSB)
|
||||||
|
| (1<<PIO_FDEBUG_RXUNDER_LSB)
|
||||||
|
| (1<<PIO_FDEBUG_TXSTALL_LSB)
|
||||||
|
| (1<<PIO_FDEBUG_RXSTALL_LSB);
|
||||||
|
pio->fdebug = flags;
|
||||||
|
// restart SM
|
||||||
|
pio_sm_restart(pio, sm);
|
||||||
|
// restart SM clkdiv
|
||||||
|
pio_sm_clkdiv_restart(pio, sm);
|
||||||
|
// exec jmp to offset
|
||||||
|
uint16_t jmp = pio_encode_jmp(off);
|
||||||
|
pio_sm_exec(pio, sm, jmp);
|
||||||
|
// enable
|
||||||
|
pio_sm_set_enabled(pio, sm, true);
|
||||||
|
// wait 1 cycle
|
||||||
|
busy_wait_us_32(T_SM_US);
|
||||||
|
// read SM insn
|
||||||
|
uint16_t ret = pio->sm[sm].instr;
|
||||||
|
// disable SM
|
||||||
|
pio_sm_set_enabled(pio, sm, false);
|
||||||
|
|
||||||
|
return ret;
|
||||||
|
}
|
||||||
|
|
||||||
|
struct bin {
|
||||||
|
uint16_t value;
|
||||||
|
uint16_t noccur;
|
||||||
|
};
|
||||||
|
#define BINS 32 /* idk */
|
||||||
|
static uint16_t pio_get_one(PIO pio, uint sm, uint32_t off, int runs) {
|
||||||
|
// there's some variability in the return value of pio_read_one, sometimes
|
||||||
|
// returning the next instruction. I don't know the exact reason, but a
|
||||||
|
// possible cause could be that the timing of the PIO instructions doesn't
|
||||||
|
// line up properly wrt the code running on the Cortex-M0+. This could be
|
||||||
|
// caused by a too-rounded-off clock divider for the PIO SM, the C code
|
||||||
|
// being compiled into assembly that has too much cycle jitter, USB frame
|
||||||
|
// interrupts messing with the timing, and maybe a few other reasons.
|
||||||
|
|
||||||
|
static struct bin bins[BINS];
|
||||||
|
for (int i = 0; i < BINS; ++i) {
|
||||||
|
bins[i].value = 0;
|
||||||
|
bins[i].noccur = 0;
|
||||||
|
}
|
||||||
|
|
||||||
|
for (int j = 0; j < runs; ++j) {
|
||||||
|
uint16_t v = pio_read_one(pio, sm, off);
|
||||||
|
for (int i = 0; i < BINS; ++i) {
|
||||||
|
if ((bins[i].value == v && bins[i].noccur > 0) || bins[i].noccur == 0) {
|
||||||
|
bins[i].value = v;
|
||||||
|
++bins[i].noccur;
|
||||||
|
}
|
||||||
|
}
|
||||||
|
}
|
||||||
|
|
||||||
|
// find max
|
||||||
|
int maxind = -1, maxoccur = -1;
|
||||||
|
for (int i = 0; i < BINS; ++i) {
|
||||||
|
if (bins[i].noccur > maxoccur) {
|
||||||
|
maxind = i;
|
||||||
|
maxoccur = bins[i].noccur;
|
||||||
|
}
|
||||||
|
}
|
||||||
|
|
||||||
|
return bins[maxind].value;
|
||||||
|
}
|
||||||
|
|
||||||
|
extern int sbw_piosm;
|
||||||
|
void piodump_main(void) {
|
||||||
|
/*for (uint32_t i = 0; i < 32; ++i) {
|
||||||
|
printf("program[0x%02lx] = 0x%04x\n", i, sbw_program_instructions[i]);
|
||||||
|
}*/
|
||||||
|
|
||||||
|
sbw_init();
|
||||||
|
|
||||||
|
uint16_t stuff[32];
|
||||||
|
for (uint32_t i = 0; i < 32; ++i) {
|
||||||
|
stuff[i] = pio_get_one(PINOUT_SBW_PIO, (uint)sbw_piosm, i, 8);
|
||||||
|
bool good = stuff[i] == sbw_program_instructions[i];
|
||||||
|
printf("PIO_INSN[0x%02lx] = 0x%04x (%s)\n", i, stuff[i],
|
||||||
|
good ? "correct" : "wrong");
|
||||||
|
}
|
||||||
|
|
||||||
|
sbw_deinit();
|
||||||
|
}
|
||||||
|
|
||||||
|
|
@ -229,11 +229,14 @@ static enum tool78_stat tool78_data_recv(struct tool78_hw* hw, uint8_t* buf,
|
||||||
return tool78_stat_ack;
|
return tool78_stat_ack;
|
||||||
}
|
}
|
||||||
|
|
||||||
static enum tool78_stat tool78_wait_status(struct tool78_hw* hw, int l, int timeout_us) {
|
/*#define tool78_wait_status(hw, l, timeout_us, ...) \
|
||||||
if (hw->target == tool78k0_spi && timeout_us >= 0) {
|
tool78_wait_status__impl(hw, l, timeout_us, __VA_OPT__(1 ? __VA_ARGS__ : ) -1) \
|
||||||
|
*/
|
||||||
|
static enum tool78_stat tool78_wait_status/*__impl*/(struct tool78_hw* hw, int l, int timeout_us/*, int minl*/) {
|
||||||
|
/*if (hw->target == tool78k0_spi && timeout_us >= 0) {
|
||||||
busy_wait_us_32(timeout_us);
|
busy_wait_us_32(timeout_us);
|
||||||
timeout_us *= 2;
|
timeout_us *= 2;
|
||||||
}
|
}*/
|
||||||
|
|
||||||
enum tool78_stat st;
|
enum tool78_stat st;
|
||||||
bool blockinf = timeout_us < 0;
|
bool blockinf = timeout_us < 0;
|
||||||
|
|
@ -319,7 +322,7 @@ enum tool78_stat tool78_do_baud_rate_set(struct tool78_hw* hw) {
|
||||||
//printf("brs send=0x%02x\n", st);
|
//printf("brs send=0x%02x\n", st);
|
||||||
if (st != tool78_stat_ack) return st;
|
if (st != tool78_stat_ack) return st;
|
||||||
|
|
||||||
st = tool78_wait_status(hw, 3, tWT10); // aka tCS6
|
st = tool78_wait_status(hw, -1, tWT10); // aka tCS6 // -1 because can be 1 (OCD mode, denied) or 3
|
||||||
//printf("brs stat=0x%02x\n", st);
|
//printf("brs stat=0x%02x\n", st);
|
||||||
if (st != tool78_stat_ack) return st;
|
if (st != tool78_stat_ack) return st;
|
||||||
// let's ignore the two data bytes for now
|
// let's ignore the two data bytes for now
|
||||||
|
|
@ -331,11 +334,13 @@ enum tool78_stat tool78_do_baud_rate_set(struct tool78_hw* hw) {
|
||||||
hw->flags |= tool78_hw_flag_done_reset;
|
hw->flags |= tool78_hw_flag_done_reset;
|
||||||
|
|
||||||
if (hw->flags & tool78_hw_flag_do_ocd) {
|
if (hw->flags & tool78_hw_flag_do_ocd) {
|
||||||
|
//printf("brs ok, wait for ocd...\n");
|
||||||
// wait for ack 0x00 byte
|
// wait for ack 0x00 byte
|
||||||
uint8_t byte = 0xff;
|
uint8_t byte = 0xff;
|
||||||
int rr = hw->recv(1, &byte, 10000);
|
int rr = hw->recv(1, &byte, 10000);
|
||||||
|
//printf("ocd rr=%d, v=%02x\n", rr, byte);
|
||||||
if (rr != 1) st = tool78_stat_timeout_error;
|
if (rr != 1) st = tool78_stat_timeout_error;
|
||||||
else if (byte != 0) st = tool78_stat_protocol_error;
|
else if (byte != 0x00) st = tool78_stat_protocol_error;
|
||||||
else st = tool78_stat_ack;
|
else st = tool78_stat_ack;
|
||||||
} else {
|
} else {
|
||||||
st = tool78_do_reset(hw);
|
st = tool78_do_reset(hw);
|
||||||
|
|
@ -795,11 +800,13 @@ int tool78_ocd_connect(struct tool78_hw* hw, const uint8_t passwd[10]) {
|
||||||
|
|
||||||
// stuff[9] is the checksum byte echoed back
|
// stuff[9] is the checksum byte echoed back
|
||||||
rr = hw->recv(2, &stuff[9], 100000);
|
rr = hw->recv(2, &stuff[9], 100000);
|
||||||
|
//printf("conn rr=%d\n", rr);
|
||||||
if (rr != 2) return -2;
|
if (rr != 2) return -2;
|
||||||
|
|
||||||
/*printf("cksum=0x%02x conn=%02x pw=%02x\n",
|
/*printf("cksum=0x%02x conn=%02x pw=%02x\n",
|
||||||
cksum, connst, stuff[10]);*/
|
cksum, connst, stuff[10]);*/
|
||||||
|
|
||||||
|
//printf("connst=%u stuff=%u\n", connst, stuff[10]);
|
||||||
return stuff[10];//(uint32_t)connst | ((uint32_t)stuff[10] << 8);
|
return stuff[10];//(uint32_t)connst | ((uint32_t)stuff[10] << 8);
|
||||||
}
|
}
|
||||||
int tool78_ocd_read(struct tool78_hw* hw, uint16_t off, uint8_t len,
|
int tool78_ocd_read(struct tool78_hw* hw, uint16_t off, uint8_t len,
|
||||||
|
|
@ -886,7 +893,7 @@ static enum tool78_stat tool78_init_common(struct tool78_hw* hw) {
|
||||||
|
|
||||||
if ((hw->target & tool78_mcu_mask) != tool78_mcu_rl78) {
|
if ((hw->target & tool78_mcu_mask) != tool78_mcu_rl78) {
|
||||||
st = tool78_do_reset(hw);
|
st = tool78_do_reset(hw);
|
||||||
printf("done reset st=0x%02x\n", st);
|
//printf("done reset st=0x%02x\n", st);
|
||||||
}
|
}
|
||||||
if (st == tool78_stat_timeout_error) {
|
if (st == tool78_stat_timeout_error) {
|
||||||
hw->deinit();
|
hw->deinit();
|
||||||
|
|
@ -919,12 +926,15 @@ enum tool78_stat tool78_init_ocd(struct tool78_hw* hw, uint16_t* ver,
|
||||||
const uint8_t passwd[10]) {
|
const uint8_t passwd[10]) {
|
||||||
hw->flags |= tool78_hw_flag_do_ocd;
|
hw->flags |= tool78_hw_flag_do_ocd;
|
||||||
int st = tool78_init_common(hw);
|
int st = tool78_init_common(hw);
|
||||||
|
//printf("common st=%d\n", st);
|
||||||
if (st != tool78_stat_ack) return st;
|
if (st != tool78_stat_ack) return st;
|
||||||
|
|
||||||
st = tool78_ocd_version(hw, ver);
|
st = tool78_ocd_version(hw, ver);
|
||||||
|
//printf("ocdver st=%d\n", st);
|
||||||
if (st) return st;
|
if (st) return st;
|
||||||
|
|
||||||
st = tool78_ocd_connect(hw, passwd);
|
st = tool78_ocd_connect(hw, passwd);
|
||||||
|
//printf("conn st=%d\n", st);
|
||||||
/*uint8_t i = 0;
|
/*uint8_t i = 0;
|
||||||
do {
|
do {
|
||||||
st = tool78_ocd_connect(hw, passwd, i);
|
st = tool78_ocd_connect(hw, passwd, i);
|
||||||
|
|
|
||||||
|
|
@ -288,6 +288,8 @@ void tool78_entryseq_rl78(enum tool78_entry typ) {
|
||||||
gpio_set_function(PINOUT_TOOL78_RL78_TX, GPIO_FUNC_NULL);
|
gpio_set_function(PINOUT_TOOL78_RL78_TX, GPIO_FUNC_NULL);
|
||||||
gpio_set_function(PINOUT_TOOL78_RL78_RX, GPIO_FUNC_NULL);
|
gpio_set_function(PINOUT_TOOL78_RL78_RX, GPIO_FUNC_NULL);
|
||||||
|
|
||||||
|
/*gpio_disable_pulls(PINOUT_TOOL78_RL78_TOOL0);
|
||||||
|
gpio_disable_pulls(PINOUT_TOOL78_nRESET);*/
|
||||||
gpio_put_masked((1u<<PINOUT_TOOL78_nRESET) | (1u<<PINOUT_TOOL78_RL78_TOOL0), 0u);
|
gpio_put_masked((1u<<PINOUT_TOOL78_nRESET) | (1u<<PINOUT_TOOL78_RL78_TOOL0), 0u);
|
||||||
gpio_set_dir_out_masked((1u<<PINOUT_TOOL78_nRESET) | (1u<<PINOUT_TOOL78_RL78_TOOL0));
|
gpio_set_dir_out_masked((1u<<PINOUT_TOOL78_nRESET) | (1u<<PINOUT_TOOL78_RL78_TOOL0));
|
||||||
gpio_set_function(PINOUT_TOOL78_nRESET , GPIO_FUNC_SIO);
|
gpio_set_function(PINOUT_TOOL78_nRESET , GPIO_FUNC_SIO);
|
||||||
|
|
@ -319,7 +321,7 @@ void tool78_deinit_rl78(void) {
|
||||||
|
|
||||||
busy_wait_us(500); // unknown?
|
busy_wait_us(500); // unknown?
|
||||||
|
|
||||||
gpio_pull_down(PINOUT_TOOL78_nRESET);
|
/*gpio_pull_down(PINOUT_TOOL78_nRESET);
|
||||||
gpio_set_function(PINOUT_TOOL78_nRESET, GPIO_FUNC_NULL);
|
gpio_set_function(PINOUT_TOOL78_nRESET, GPIO_FUNC_NULL);*/
|
||||||
}
|
}
|
||||||
|
|
||||||
|
|
|
||||||
|
|
@ -23,11 +23,12 @@ _OPTION:
|
||||||
/* 0x000C2: */
|
/* 0x000C2: */
|
||||||
.byte 0xe8 /* HSmode, HOCO@32MHz */
|
.byte 0xe8 /* HSmode, HOCO@32MHz */
|
||||||
/* 0x000C3: debug settings */
|
/* 0x000C3: debug settings */
|
||||||
.byte 0x85
|
/*.byte 0x85*/ /* enabled */
|
||||||
|
.byte 0x00 /* disabled! */
|
||||||
|
|
||||||
.section .password, "a", %progbits
|
.section .password, "a", %progbits
|
||||||
|
|
||||||
/* debugger password: ten 0xff bytes */
|
/* debugger password: ten 0xff bytes */
|
||||||
_PASSWORD:
|
_PASSWORD:
|
||||||
.byte 0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff
|
.byte 0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00
|
||||||
|
|
||||||
|
|
|
||||||
|
|
@ -47,6 +47,46 @@ hw_init:
|
||||||
mov P2, #0
|
mov P2, #0
|
||||||
; ret
|
; ret
|
||||||
|
|
||||||
|
/* DUMPS EVERYTHING */
|
||||||
|
|
||||||
|
|
||||||
|
/* LONG WAITCODE THAT DOESNT DO ANYTHING */
|
||||||
|
|
||||||
|
/* mov c, #0xff
|
||||||
|
mov b, #0xff
|
||||||
|
|
||||||
|
1: dec c
|
||||||
|
bnz $1b
|
||||||
|
mov c, #0xff
|
||||||
|
dec b
|
||||||
|
bnz $1b
|
||||||
|
xor P2, #0xff
|
||||||
|
|
||||||
|
br $1b*/
|
||||||
|
|
||||||
|
/* GLITCH TESTING CODE */
|
||||||
|
|
||||||
|
|
||||||
|
/* TODO: how many segments do we need? */
|
||||||
|
mov es, #0
|
||||||
|
call !dump_segment
|
||||||
|
|
||||||
|
1: br $1b
|
||||||
|
|
||||||
|
dump_segment:
|
||||||
|
movw hl, #0
|
||||||
|
1: mov a, es:[hl]
|
||||||
|
push hl
|
||||||
|
call !!tool_tx
|
||||||
|
pop hl
|
||||||
|
incw hl
|
||||||
|
movw ax, hl
|
||||||
|
cmpw ax, #0
|
||||||
|
bnz $1b
|
||||||
|
mov es, #0xf
|
||||||
|
ret
|
||||||
|
|
||||||
|
/*
|
||||||
glitch_mainloop:
|
glitch_mainloop:
|
||||||
mov P2, #0xff
|
mov P2, #0xff
|
||||||
|
|
||||||
|
|
@ -92,3 +132,4 @@ glitch_mainloop:
|
||||||
;ret
|
;ret
|
||||||
|
|
||||||
;data:
|
;data:
|
||||||
|
*/
|
||||||
|
|
|
||||||
Loading…
Reference in New Issue