length param sweeping
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@ -20,7 +20,7 @@ void cli_tool78_glitch_paramsearch(void);
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void cli_tool78_glitch_ocd_dump(void);
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#define DUMP_OFFSET 0/*0xef000*/
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#define DUMP_SIZE 4096
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#define DUMP_SIZE 65536
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// test with decoupling caps: length in 20..500(..1500) -> ok
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// testing on ocd lock: length: 5..35
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@ -46,18 +46,25 @@ static void CORE1_FUNC(pcg32_fast_init)(uint64_t seed) {
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(void)pcg32_fast();
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}
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// ADC value is in low 12 bits of adc_read()
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// FIXME: length_min_us = -1 => adc breaks? | oops was signedness bug
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#define CORE1_PRE_CALC() /* BIG TODO HERE! */ \
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uint32_t off = param_cur.offset_min_us + \
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bool sweep = param_cur.offset_min_us == param_cur.offset_max_us \
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&& param_cur.length_min_us >= 0; \
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uint32_t len, off = param_cur.offset_min_us + \
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(pcg32_fast() % (param_cur.offset_max_us - param_cur.offset_min_us)), \
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len = (param_cur.length_min_us < 0) \
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? (((uint32_t)adc_read() * param_cur.length_max_us) >> 12) \
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iom = 1u << param_cur.glitch_out_pin; \
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do { \
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if (sweep) { \
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if (len_prev == param_cur.length_max_us) len_prev = (len = param_cur.length_min_us); \
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else len = (len_prev = (len_prev + 1));\
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} else { \
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len = (param_cur.length_min_us < 0) \
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? (((uint32_t)adc_read() * param_cur.length_max_us) >> 12) \
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: (param_cur.length_min_us + (pcg32_fast() % \
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(param_cur.length_max_us - param_cur.length_min_us))), \
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iom = 1u << param_cur.glitch_out_pin \
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(param_cur.length_max_us - param_cur.length_min_us))); \
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} \
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} while (0) \
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#define CORE1_DO_GLITCH() \
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do { \
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@ -74,6 +81,8 @@ static void CORE1_FUNC(glitch_core1_thread)(void) {
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// SRAM 5 to avoid bus contention
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pcg32_fast_init(random());
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int32_t len_prev = param_cur.length_min_us - 1;
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__disable_irq();
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if (param_cur.trigger_in_pin < 0) {
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