167 lines
4.6 KiB
Plaintext
167 lines
4.6 KiB
Plaintext
OUTPUT_FORMAT("elf32-rl78","elf32-rl78","elf32-rl78")
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OUTPUT_ARCH(rl78)
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ENTRY(_start)
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MEMORY
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{
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/*data (rwx) : ORIGIN = 0x0200, LENGTH = 0x100
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text (rx) : ORIGIN = 0xf800, LENGTH = 0x800 - 0x20
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vectors (rw) : ORIGIN = 0xffe0, LENGTH = 0x20*/
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rom (rx) : ORIGIN = 0x00000, LENGTH = 0x04000
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/* vectors, boot clusters, etc.: part of ^ */
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ram (rwx) : ORIGIN = 0xff900, LENGTH = (0xffee0 - 0xff900)
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/*
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* 16k code flash: 00000..03FFF
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* 2k data flash: F1000..F17FF
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* 1.5k ram: FF900..FFEDF
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*
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* boot clusters: +00000; +01000
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* vectors: 00000..0007F
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* callt: 00080..000BF
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* option byte: 000C0..000C3
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* debugpasswd: 000C4..000CD
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*
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* flash block = 0x400 bytes => 0x10 blocks
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*
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* vectors:
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* 000: RESET/POR/WDT/TRAP/RPE/...
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* 004: INTWDTI/INTSRO
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* 006: INTLVI
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* 008: INTP0
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* 00A: INTP1
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* ...
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* .14: INTP6
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* 016: INTST0/INTCSI00/INTIIC00
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* 018: INTSR0/INTCSI01/INTIIC01
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* 01e: INTSRE0
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* 020: INTTM00
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* 022: INTST1/INTCSI10/INTIIC10
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* 024: INTSR1/INTCSI11/INTIIC11
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* 026: INTSRE1
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* bluh bluh not really interesting
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* 07E: BRK
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*
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* 02000..03FFF mirrored to F2000..F3FFF (if enabmed in PMC)
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*
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* IO regs:
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* serial data reg 00: TXD0/SIO00/SDR00 = 0xfff10
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* serial data reg 01: RXD0/SIO01/SDR01 = 0xfff12
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* serial data reg 02: TXD1/SIO10/SDR02 = 0xfff44
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* serial data reg 03: RXD1/SIO11/SDR03 = 0xfff42
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*
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* port mode reg? PMx = 0xFFF2x
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*
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* port input mode PIMx = 0xF004x
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* port output mode POMx = 0xF005x
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* port mode control PMCx = 0xF006x
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* port mode select PMS = 0xF007B
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* peripheral io redirection regs?
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* flash operating mode FLMODE = 0xF00AA
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* serial status reg SSR0x = F010(x*2)
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* serial mode reg SMR0x = F011(x*2)
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* serial comm ops setting SCR0x = F011(8+x*2)
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* + channel enable, start stop, clocksel, output, output enable, output level, standby control
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* interrupt stuff at 0xF0441+...
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*
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* F0090: rom enable flag etc : DFLCTL bit 0 (enable dataflash access?)
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* F0800: request data etc (not interesting here)
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* F0803=1
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* F0880=4
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* F0880: also rom enable bit?
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* FLMODE (voltages stuff, bluh), FLMWRP(?) (enable prev reg), PMMC (also voltages)
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*
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* TXD1 enable = PMC20=0 PM20=0 P20=1
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* RXD1 enable = PMC31=0 PM31=1
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*
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* WDT: WDTE (enable reg) + option byte C0: set WDTON bit to 0 (bit 4)
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*
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* serial: UART1: ch2
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* 8n1 lsbfirst
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* PER0: bit 2 hi
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* PRR0: bit 2 lo
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* SPSm: 0b0100<<4 (125kbaud?)
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* SMRmn:
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* SEm SSm STm SOEm SOm SOLm SSCm ISC
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*
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* opt C1: 0b00000010 // 0x1a?
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* opt C2: 0b11101001 // 0x2d?
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* opt C3: 0b10000101 == 0x85
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* C4..CD: 00 ...
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*/
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}
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SECTIONS {
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.btc0 :
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{
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. = 0x00000;
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KEEP(*(.vectors))
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. = 0x00080;
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KEEP(*(.callt))
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. = 0x000c0;
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KEEP(*(.option))
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. = 0x000c4;
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KEEP(*(.password))
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. = 0x000ce;
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*(.text.btc0)
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} > rom =0xff
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/* TODO: btc1? */
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.text :
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{
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. = ALIGN(2);
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*(.text .rodata* .eh_frame_hdr)
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. = ALIGN(256);
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/*KEEP(*(.eh_frame) *(.gcc_except_table*))
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PROVIDE (__preinit_array_start = .);
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KEEP (*(.preinit_array))
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PROVIDE (__preinit_array_end = .);
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PROVIDE (__init_array_start = .);
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KEEP (*(SORT(.init_array.*)))
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KEEP (*(.init_array))
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PROVIDE (__init_array_end = .);
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PROVIDE (__fini_array_start = .);
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KEEP (*(.fini_array))
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KEEP (*(SORT(.fini_array.*)))
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PROVIDE (__fini_array_end = .);
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LONG(0);*/ /* Sentinel. */
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/* gcc uses crtbegin.o to find the start of the constructors, so
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we make sure it is first. Because this is a wildcard, it
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doesn't matter if the user does not actually link against
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crtbegin.o; the linker won't look for a file to match a
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wildcard. The wildcard also means that it doesn't matter which
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directory crtbegin.o is in. */
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/*KEEP (*crtbegin*.o(.ctors))*/
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/* We don't want to include the .ctor section from from the
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crtend.o file until after the sorted ctors. The .ctor section
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from the crtend file contains the end of ctors marker and it
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must be last */
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/*KEEP (*(EXCLUDE_FILE (*crtend*.o ) .ctors))
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KEEP (*(SORT(.ctors.*)))
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KEEP (*(.ctors))
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KEEP (*crtbegin*.o(.dtors))
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KEEP (*(EXCLUDE_FILE (*crtend*.o ) .dtors))
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KEEP (*(SORT(.dtors.*)))
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KEEP (*(.dtors))*/
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} > rom =0xff
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.data :
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{
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__data_vma_start = ABSOLUTE(.);
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__data_lma_start = SIZEOF(.text);
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*(.data)
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}
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__data_size = SIZEOF(.data);
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.bss :
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{
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__bss_start = ABSOLUTE(.);
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*(.bss .sbss)
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} >ram
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__bss_size = SIZEOF(.bss);
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/DISCARD/ :
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{
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*(.plt)
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}
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}
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