177 lines
6.0 KiB
C
177 lines
6.0 KiB
C
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#ifndef MSP430DBG_H_
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#define MSP430DBG_H_
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#include <stdint.h>
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#include <stdbool.h>
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// also seen: 8D 91 95 99
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#define MSP430_JTAG_TAP_ID 0x89
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enum msp430_ir {
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//!all these // EMEX == EEM
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msp430_ir_emex_data_exchange = 0x09,
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msp430_ir_emex_read_trigger = 0x0a, // unused? / unknown
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msp430_ir_emex_read_control = 0x0b,
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msp430_ir_emex_write_control = 0x0c,
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msp430_ir_emex_data_exchange32 = 0x0d, // 430X/Xv2-only
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// overlaps with EMEX!
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msp430_ir_bp_cntl_16bit = 0x09, // unused? / unknown // == data_exchange
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msp430_ir_bp_cntl_capture = 0x0a, // unused? / unknown
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msp430_ir_bp1_16bit = 0x0b, // unused? / unknown
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msp430_ir_bp1_capture = 0x0c, // unused? / unknown
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msp430_ir_bp2_16bit = 0x0d, // unused? / unknown
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msp430_ir_bp2_capture = 0x0e, // unused? / unknown
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msp430_ir_ctrl_sig_high_byte = 0x11,
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msp430_ir_ctrl_sig_low_byte = 0x12,
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msp430_ir_ctrl_sig_16bit = 0x13,
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msp430_ir_ctrl_sig_capture = 0x14,
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msp430_ir_ctrl_sig_release = 0x15,
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msp430_ir_coreip_id = 0x17, // pointer to more data on non-0x89 JTAG IDs?
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msp430_ir_jstate_id = 0x18, // JState is Xv2 stuff so eh // NOTE: 64-bit DRshift!
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msp430_ir_flash_16bit_update = 0x19, // "disable flash test mode"?
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msp430_ir_flash_capture = 0x1a, // unused? / unknown
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msp430_ir_flash_16bit_in = 0x1b, // unused? / unknown
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msp430_ir_flash_update = 0x1c, // unused? / unknown
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// sesel = 0x0080, tmr = 0x0800
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msp430_ir_cntrl = 0x21, // unused? / unknown
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msp430_ir_fuse_prepare_blow = 0x22,
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msp430_ir_fuse_ex_blow = 0x24,
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msp430_ir_config_fuses = 0x29, // get fuse state? uses 8-bit DRshift!
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msp43_ir_test_reg = 0x2a, // Xv2-only
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msp43_ir_test_v3_reg = 0x2f,
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// TODO: what is LPM? something with power? related to LPMx.5
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// "embedded signal processing cell" control
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msp430_ir_dual_8bit = 0x31,
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msp430_ir_dual_capture = 0x32,
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msp430_ir_select_main = 0x33,
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msp430_ir_select_esp = 0x34,
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msp430_ir_tclk_toggle_inst = 0x39, // unused? / unknown
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msp430_ir_tclk_0_inst = 0x3a, // unused? / unknown
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msp430_ir_tclk_1_inst = 0x3b, // unused? / unknown
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msp430_ir_data_16bit = 0x41,
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msp430_ir_data_capture = 0x42,//! // reads from data bus?
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msp430_ir_data_quick = 0x43,
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msp430_ir_data_psa = 0x44,
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msp430_ir_data_16bit_opt = 0x45, // unused? / unknown
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msp430_ir_shift_out_psa = 0x46,
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msp430_ir_dta = 0x47, // unused? / unknown
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msp430_ir_accept_key = 0x59, // unused? / unknown
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msp430_ir_jmb_exchange = 0x61,
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msp430_ir_tdo_event = 0x64, // unused? / unknown
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msp430_ir_tdo_event_ctl = 0x65, // unused? / unknown
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msp430_ir_addr_high_byte = 0x81,
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msp430_ir_addr_low_byte = 0x82,
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msp430_ir_addr_16bit = 0x83,
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msp430_ir_addr_capture = 0x84,
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msp430_ir_data_to_addr = 0x85,
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msp430_ir_capture_cpu_reg = 0x86, // unused? / unknown
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msp430_ir_device_id = 0x87, // "device ip pointer" for non-0x89 JTAG IDs
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msp430_ir_jmb_write_32bit_mode = 0x88,//!
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msp430_ir_bypass = 0xff
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};
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enum msp430_ctrl {
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msp430_ctrl_RnW = 1<< 0,
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msp430_ctrl_cpu_halt = 1<< 1,
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msp430_ctrl_intr_req = 1<< 2,
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msp430_ctrl_halt_jtag = 1<< 3,
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msp430_ctrl_byte = 1<< 4,
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msp430_ctrl_cpu_off = 1<< 5,
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msp430_ctrl_mclk_on = 1<< 6,
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msp430_ctrl_instr_load = 1<< 7,
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msp430_ctrl_tmode = 1<< 8,
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msp430_ctrl_tce0 = 1<< 9,
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msp430_ctrl_tce1 = 1<<10,
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msp430_ctrl_por = 1<<11,
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msp430_release_lbyte0 = 1<<12,
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msp430_tagfuncsat = 1<<13,
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msp430_switch = 1<<14,
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msp430_ctrl_stop_sel = 1<<15,
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};
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bool msp430_check_fuse_blown(void);
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bool msp430_insn_fetch(void);
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void msp430_pc_set(uint16_t pc);
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void msp430_cpu_halt(void);
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void msp430_cpu_release(void);
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bool msp430_cpu_reset(void); // POR
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static inline bool msp430_device_control(void) { return msp430_check_fuse_blown(); }
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void msp430_device_release(uint16_t addr);
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uint16_t msp430_memory_read16(uint16_t addr);
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uint8_t msp430_memory_read8 (uint16_t addr);
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void msp430_memory_write16(uint16_t addr, uint16_t value);
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void msp430_memory_write8 (uint16_t addr, uint8_t value);
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void msp430_memory_read_block(uint16_t srcaddr, uint16_t numwords, uint16_t* dest);
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void msp430_memory_write_block(uint16_t dstaddr, uint16_t numwords, const uint16_t* src);
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bool msp430_memory_verify(uint16_t startaddr, uint16_t length, const uint16_t* copy);
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#define msp430_memory_read(bits, addr) (msp430_memory_read##bits (addr))
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#define msp430_memory_write(bit, a, v) (msp430_memory_write##bit (a, v))
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void msp430_flash_write(uint16_t startaddr, uint16_t num, const uint16_t* src);//
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// TODO: erase routine needs to be redone
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void msp430_flash_erase_seg(uint16_t startaddr, bool is_infosegA);//
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void msp430_flash_erase_mass(bool withinfomem); // false: only main flash
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uint32_t msp430_device_get(float freq);
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// TODO: from non-slau320aj src
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uint16_t msp430_read_jmb(void);
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void msp430_write_jmb(uint16_t v);
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uint16_t msp430_cpureg_read(short regno);
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void msp430_cpureg_write(short regno, uint16_t value);
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// TODO:
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// 430X and Xv2 versions of the above routines
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//
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// EnableLpmx5
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// DisableLpmx5
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// what do these do? it's something about power mode, it's disabled when
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// starting JTAG, and reenabled when releasing JTAG
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// only MSP430Xv2, though, so we're not going to care for now. (I don't
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// have such chips, only an MSP430G2212 and a G2452)
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// uses test_reg and test_reg_3V
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//
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// jstate_read
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// what is this for? (Xv2-only -> let's not care for this either now)
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// uses 64-bit DRshift!
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// -> PollJStateReg, HilCommand, SingleStepJState
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//
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// eem_write_control
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// used in save & restore context stuff / jtag start & release
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// eem_read_control
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// used where write_control is used, but also "wait for eem" and single-step
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// eem_data_exchange
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// used in a lot of places: write_control places, single-step, wait for storage, "eemdataexchange", execute funclet
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//
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// what is EEM? what is its sub-command stuff?
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//
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// wait for EEM
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// JTAG release with context restore
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// JTAG start with context save
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// single-step
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// wait for storage(?)
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// execute funclet
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// get dco frequency // annoying
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#endif
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