94 lines
2.0 KiB
ArmAsm
94 lines
2.0 KiB
ArmAsm
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/*#include "romhdr.S"*/
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#include "hw.S"
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/*
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ch2&3: TxD1,RxD1
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*/
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/* allegedly there's a subroutine at 0xEFFA1 that sends a single byte over the TOOL0 line */
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.global _start
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_start:
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call !hw_init
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call !port_init
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call !port_toggle
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1: br $1b
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hw_init:
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di
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; systeminit
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; PIOR = 0
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; ADPC = 1
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; PMC bit = 0
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; PM1 = 6(?)
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; CMC = 0
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; MSTOP,XTSTOP bits = 1,1
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; MCM0 bit = 0 ; hi-speed OCO clock as main clock
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; CSS bit = 0 ; main system clock = periph clock
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; PER0 SAU1EN bit (3) = 1
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; SPS0 = 0x44 ; or *12? ; CK00,CK01 @ 2MHz
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; ST0 = 0xf ; stop all channels
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; STMK0,STIF0 bits = 1,0 ; disable interrupts
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; SRMK0,SRIF0 bits = 1,0 ; disable interrupts
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; SREK0,SREF0 bits = 1,0 ; disable interrupts
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; SMR00 = 0x22 ; ch0clock = CK00, start trig=sw falling edge, UART mode, xferend irq en
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; SCR00 = 0x8297 ; tx only, clock type 1, error irq en, even parity, lsbfirst, 8bit data, 1bit stop
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; SDR00 = 0xce00 ; opclk/208
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; NFEN0 = 0x0001 ; RxD noise filter enable
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; SIR01 = 0x0007 ; clear error
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; SMR01 = 0x0122 ; ch1clock = CK00; start trig=RxD falling edge, UART mode, xferend irq en
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; SCR01 = 0x4697 ; rx only, clock type 1, error irq en, even parity, lsbfirst, 8bit data, 1bit stop
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; SDR01 = 0xce00 ; opclk/208 ; use opclk/17 (0x0f00) instead for 115.2kbaud?
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; SO00,SOE00 bits = 1,1 ; prepare using ch0
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; PM1 PM11 bit = 1 ; RxD pin as input
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; P1,PM1 P12,PM12 bits = 1,0 ; TxD as output
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; SO00 bit = 1 ; TxD output level
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; SOE00 bit = 1 ; enable UART
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; SS00,SS01 bits = 1,1 ; enable UART
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; TXD0 = data ; xmit
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;ei ; nah
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ret
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port_init:
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; P33 as output using GPIO
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; PM3 bit 3 = 0
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; PU3 bit 3 = 0 (no pullup)
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; PMC3 bit 3 = 0 (digital IO)
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; PIOR0 bit 6 = 0
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; POM3 bit 3 = 0
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; toggle P3 bit 3
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clr1 !PM3.3
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clr1 !PU3.3
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clr1 !PIOR0.6
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clr1 !POM3.3
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ret
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port_toggle:
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set1 !P3.3
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nop
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nop
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clr1 !P3.3
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br $port_toggle
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uart_init:
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;; PMC00=0 PM00=1 ; RxD1 en
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; PIO2.3 = 1
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; PMC20=0 PM20=0 P20=1 ; TxD1 en
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ret
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uart_send_byte:
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; todo
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; TODO: wait for sent?
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ret
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