 Triss
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dd7345e87c
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final refactoring stuff
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2021-07-18 03:19:21 +02:00 |
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Triss
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70136f55a5
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more refactoring
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2021-07-18 03:02:54 +02:00 |
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Triss
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4eea88b4f1
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WIP refactoring
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2021-07-18 01:22:56 +02:00 |
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Triss
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7056224c4f
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yes! hahaha... YES!!
(it compiles & works now)
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2021-07-17 22:34:19 +02:00 |
Jaroslav Kysela
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a42da17ad0
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add README.md
Signed-off-by: Jaroslav Kysela <perex@perex.cz>
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2021-05-13 20:33:48 +02:00 |
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Jaroslav Kysela
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989b533184
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Add the logic analyzer implementation based on the SUMP protocol
Supported features:
- up to 16 probes (gpio 6-21 by default)
- 200kB RAM for samples
- RLE encoding
- test mode (external pattern)
* probe 0 and 1 - 10Mhz PWM
* probe 1 and 2 - 1Mhz PWM
* probe 3 and 4 - 1kHz PWM
* probe 8 and 9 - 1kHz PWM (swapped levels)
- test pin (gpio 22) - 5Mhz 50%/50% PWM for probe tests (activated only when sampling)
Limits:
- 50Mhz sampling rate when compiled with the TURBO_200MHZ define (otherwise 31.25Mhz)
- basic triggers are implemented (functional up to 10Mhz - TODO: PIO support)
This protocol is supported in sigrok as openbench-logic-sniffer:
pulseview --driver=ols:conn=/dev/ttyACM1
sigrok-cli --driver=ols:conn=/dev/ttyACM1 --config samplerate=50Mhz \
--config pattern=External --samples 256 --channels 0-1
Misc:
- picoprobe reset pin is on gpio 28 (instead 6) now
Link: https://www.sump.org/projects/analyzer/protocol
Link: https://github.com/sigrokproject/libsigrok/tree/master/src/hardware/openbench-logic-sniffer
Signed-off-by: Jaroslav Kysela <perex@perex.cz>
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2021-05-08 21:39:19 +02:00 |
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Jaroslav Kysela
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d18b0129a1
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Add TURBO_200MHZ define to support 200Mhz system clock
125Mhz system clock - 31.25Mhz sample rate (logic analyzer)
200Mhz system clock - 50Mhz sample rate (logic analyzer)
Signed-off-by: Jaroslav Kysela <perex@perex.cz>
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2021-05-06 20:55:42 +02:00 |
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Jaroslav Kysela
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07e8a92a3b
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Change USB Product ID to F004 for the debug compilation (program in RAM)
Signed-off-by: Jaroslav Kysela <perex@perex.cz>
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2021-05-06 20:27:11 +02:00 |
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Jaroslav Kysela
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f3e7eb1a94
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Add second USB serial device for SUMP protocol (logic analyzer)
Signed-off-by: Jaroslav Kysela <perex@perex.cz>
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2021-04-30 20:44:42 +02:00 |
newbrain
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0ff8b5530b
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Hardware target reset support
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2021-02-23 15:45:12 +00:00 |
Liam Fraser
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218bd5f50a
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Add MIT license to all source files
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2021-02-03 09:29:20 +00:00 |
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Liam Fraser
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67f5af124a
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Disable all debug output so any uart can be used
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2021-02-03 09:25:45 +00:00 |
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Liam Fraser
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49a80059b8
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Fix file permissions
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2021-02-03 09:24:46 +00:00 |
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Liam Fraser
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4bcaaa915d
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Add missing #endif
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2021-02-03 09:23:04 +00:00 |
Andrew Scheller
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c29510f567
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Move selection of UART interface and baudrate to picoprobe_config.h (#7)
Co-authored-by: Liam Fraser <liam@raspberrypi.com>
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2021-02-03 09:22:09 +00:00 |
newbrain
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0fe6a09d8b
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Unique serial numbers for picoprobe (#8)
Co-authored-by: newbrain <newbrain@tiscali.it>
Co-authored-by: Liam Fraser <liam@raspberrypi.com>
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2021-02-03 09:19:04 +00:00 |
a-pushkin
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8ab7ebcabe
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Leverage built in LED (#6)
* turn on LED on startup and blink for frequent activity
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2021-02-03 09:14:55 +00:00 |
graham sanderson
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f67a57d2ba
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Initial Release
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2021-01-20 17:47:12 +00:00 |