code cleanup and benchmark and stuff
This commit is contained in:
parent
42e59d38c5
commit
572883b269
63
src/main.c
63
src/main.c
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@ -4,8 +4,6 @@
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#include <stdio.h>
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#include <string.h>
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#include <hardware/structs/bus_ctrl.h>
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#include <hardware/structs/rosc.h>
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#include <hardware/clocks.h>
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#include <hardware/vreg.h>
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#include <pico/stdlib.h>
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@ -16,9 +14,29 @@
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#include "util.h"
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#define DO_TIME_BENCH 0
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#define DATA_TOTAL 1024*1024
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#if DO_TIME_BENCH
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static uint8_t time_bench[128*1024];
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#else
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static uint8_t data[32];
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#endif
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int main() {
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vreg_set_voltage(VREG_VOLTAGE_1_15);
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set_sys_clock_khz(250*1000, true);
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// high freq, high voltage
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//vreg_set_voltage(VREG_VOLTAGE_1_25);
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//set_sys_clock_khz(250*1000, true);
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// low freq, low voltage
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//set_sys_clock_khz(48*1000, true);
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//vreg_set_voltage(VREG_VOLTAGE_0_90);
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// low freq, high voltage
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//set_sys_clock_khz(48*1000, true);
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//vreg_set_voltage(VREG_VOLTAGE_1_15);
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// highish freq, low voltage
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//vreg_set_voltage(VREG_VOLTAGE_1_00);
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for (size_t i = 0; i < 0x100; ++i) asm volatile("nop");
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busy_wait_ms(16);
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@ -27,28 +45,39 @@ int main() {
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busy_wait_ms(16);
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iprintf("hello world!\n");
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if ((clocks_hw->clk[clk_sys].ctrl & CLOCKS_CLK_SYS_CTRL_AUXSRC_BITS) ==
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(CLOCKS_CLK_SYS_CTRL_AUXSRC_VALUE_ROSC_CLKSRC << CLOCKS_CLK_SYS_CTRL_AUXSRC_LSB)) {
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panic("System is running from ring oscillator. This makes it impossible to be used as randomness source.\n");
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int d = rorand_init(NULL);
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if (d < 0) {
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iprintf("rorand_init() returned %d\n", d);
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panic("can't init rorand");
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}
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rorand_init();
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uint8_t data[32];
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#if DO_TIME_BENCH
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memset(time_bench, 0, sizeof(time_bench));
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iprintf("[---] throughput benchmark start\n");
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absolute_time_t ta = get_absolute_time();
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rorand_get(time_bench, count_of(time_bench)*CHAR_BIT);
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absolute_time_t tb = get_absolute_time();
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int64_t dt_us = absolute_time_diff_us(ta, tb);
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uint32_t clk_hz = clock_get_hz(clk_sys);
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int clk_mhz = clk_hz/(1000*1000);
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int64_t bps = count_of(time_bench)*CHAR_BIT * (1000ull*1000ull) / dt_us;
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int64_t cpb = clk_hz / bps;
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iprintf("[===] throughput benchmark done, took %lld us at %d MHz -> average %lli bits/second i.e. %lli cycles/bit\n",
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dt_us, clk_mhz, bps, cpb);
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#else
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memset(data, 0, sizeof(data));
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const uintptr_t total = 1024*1024;
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const uintptr_t total = DATA_TOTAL;
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for (uintptr_t off = 0; off < total; off += count_of(data)) {
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rorand_get(data, count_of(data)*CHAR_BIT);
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hexdump(NULL, off, data, sizeof(data));
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}
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#endif
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iprintf("done\n");
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/*uint32_t a = 0;
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while(1) {
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iprintf("a%lu ", a);
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++a;
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if (a>16)break;
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}
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iprintf("\n");*/
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while(1);
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return 0;
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}
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211
src/rorand.c
211
src/rorand.c
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@ -7,13 +7,38 @@
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#include <hardware/structs/psm.h>
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#include <hardware/structs/rosc.h>
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#include <hardware/structs/systick.h>
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#include <hardware/clocks.h>
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#include <pico/stdlib.h>
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#include <pico/critical_section.h>
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#include "rorand.h"
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#define IMPL 2
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#define TEST_DO_CONTINUOUS 1
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#define TEST_DO_STARTUP 1
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#define TEST_HIST_SIZE 256
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// TODO: get good bounds for averages
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#define TEST_HIST_X_MIN 10
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#define TEST_HIST_X_MAX 5000
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#define TEST_HIST_S_MIN 0
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#define TEST_HIST_S_MAX 300
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#define TEST_NEUMANN_MAX 0x20
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#define TEST_STARTUP_NUM 512
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#define ROSC_COUNT_VAL 0x40
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// TODO: tweak the above parameter.
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// * 250MHz
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// * 0x20 seems to result in a few weak test results in dieharder (1 MiB data)
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// * * 0x80 seems to pass them
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// -> take something in the middle to speed up things while still being good?
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// problematic test are diehard_operm5, sts_monobit
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// * 48 MHz: 0xff too high, 0x20 too low -> no variance
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// -> 0x40..0xC0 is fine
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#define LOG(...) printf(__VA_ARGS__)
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/*#define LOG(...) do{}while(0)*/
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static inline uint32_t enter_critical_section(void) {
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@ -30,14 +55,42 @@ static inline void exit_critical_section(uint32_t dis) {
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}
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static inline void rosc_wait_stab(void) {
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while (!(rosc_hw->status & ROSC_STATUS_STABLE_BITS)) ;
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static enum rorand_error env_check(void) {
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if (clock_get_hz(clk_sys) < 48*1000*1000) {
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return rr_sysclk_too_slow;
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}
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if ((clocks_hw->clk[clk_sys].ctrl & CLOCKS_CLK_SYS_CTRL_AUXSRC_BITS) ==
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(CLOCKS_CLK_SYS_CTRL_AUXSRC_VALUE_ROSC_CLKSRC << CLOCKS_CLK_SYS_CTRL_AUXSRC_LSB)) {
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return rr_rosc_used;
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}
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if ((SysTick->CTRL & SysTick_CTRL_TICKINT_Msk)
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|| ((SysTick->CTRL & SysTick_CTRL_ENABLE_Msk) && SysTick->LOAD != 0xffffffu)) {
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return rr_systick_used;
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}
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return rr_ok;
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}
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static uint32_t tests[256];
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static bool do_tests = true;
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static bool test_has_alarm = false;
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static rorand_err_cb errcb = NULL;
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static void test_alarm(const char* msg) {
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LOG("[!!!] TEST ALARM: %s!\n", msg);
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test_has_alarm = true;
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if (errcb) errcb(msg);
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// TODO: ?
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}
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static uint32_t tests[TEST_HIST_SIZE];
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static uint32_t testind;
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static critical_section_t cs;
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static void test_monitor(uint32_t v) {
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if (!do_tests) return;
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tests[testind] = v;
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++testind;
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@ -55,32 +108,41 @@ static void test_monitor(uint32_t v) {
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}
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var >>= 8;
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float stddev = sqrtf((uint32_t)var);
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printf("[tst] avg=%llu, var=%llu stddev=%f\n", avg, var, stddev);
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//LOG("[tst] avg=%llu, var=%llu stddev=%f\n", avg, var, stddev);
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// idk really. this really needs to be better
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if (avg < TEST_HIST_X_MIN) {
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test_alarm("Runtime test average too low");
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} else if (avg > TEST_HIST_X_MAX) {
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test_alarm("Runtime test average too high");
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} else if (var < TEST_HIST_S_MIN*TEST_HIST_S_MIN) {
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test_alarm("Runtime test variance too low");
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} else if (var > TEST_HIST_S_MAX*TEST_HIST_S_MAX) {
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test_alarm("Runtime test variance too high");
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}
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testind = 0;
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switch (env_check()) {
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case rr_sysclk_too_slow:
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test_alarm("System clock is below 48 MHz");
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break;
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case rr_rosc_used:
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test_alarm("System is running from ring oscillator");
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break;
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case rr_systick_used:
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test_alarm("SysTick timer used for another purpose");
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break;
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default: break;
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}
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}
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}
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static uint __time_critical_func(get_raw_bit_a)(void) {
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busy_wait_us_32(1);
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// 1. power-gate rosc and wait a bit for the value to become indeterminate
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psm_hw->frce_off = PSM_FRCE_OFF_ROSC_BITS;
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busy_wait_us_32(1);
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// 2. bring it back
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psm_hw->frce_on = PSM_FRCE_ON_ROSC_BITS;
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while (!(psm_hw->done & PSM_DONE_ROSC_BITS)) ;
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rorand_init();
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uint bit = rosc_hw->randombit & 1;
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// TODO: test monitor?
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return bit;
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}
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static uint __time_critical_func(get_raw_bit_b)(void) {
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static uint __time_critical_func(get_raw_bit)(void) {
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volatile uint32_t* tick = &SysTick->VAL;
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volatile uint32_t* count = &rosc_hw->count;
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uint32_t a, b;
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uint32_t a, b, stat, rbit;
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critical_section_enter_blocking(&cs);
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uint32_t v = enter_critical_section();
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@ -89,76 +151,105 @@ static uint __time_critical_func(get_raw_bit_b)(void) {
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__COMPILER_BARRIER();
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a = *tick;
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__COMPILER_BARRIER();
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for (size_t i = 0; i < 0x1/*000*/; ++i) {
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*count = 0x80;
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// TODO: tweak the above parameter.
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// * 0x20 seems to result in a few weak test results in dieharder (1 MiB data)
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// * 0x80 seems to pass them
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// -> take something in the middle to speed up things while still being good?
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// problematic test are diehard_operm5, sts_monobit
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__COMPILER_BARRIER();
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while (*count) __COMPILER_BARRIER();
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}
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*count = ROSC_COUNT_VAL;
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__COMPILER_BARRIER();
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while (*count) __COMPILER_BARRIER();
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b = *tick;
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stat = SysTick->CTRL;
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rbit = rosc_hw->randombit;
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__COMPILER_BARRIER();
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}
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exit_critical_section(v);
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critical_section_exit(&cs);
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uint32_t diff = a - b;
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//iprintf("[---] diff=%lu a=%lu b=%lu\n", diff, a, b);
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/*if (stat & SysTick_CTRL_COUNTFLAG_Msk) { // doesn't seem to work, so back to reseting the counter
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// overflow happened
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//LOG("[!!!] ovf diff=%lu a=%lu b=%lu\n", diff, a, b);
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diff += 1<<24;
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//LOG("[---] diff=%lu a=%lu b=%lu\n", diff, a, b);
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}*/
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//LOG("[---] diff=%lu a=%lu b=%lu\n", diff, a, b);
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uint bit = diff & 1;
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uint32_t test = diff >> 1;
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//test_monitor(test);
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test_monitor(test);
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return bit ^ rosc_hw->randombit;
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return bit ^ rbit;
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}
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inline static uint get_raw_bit(void) {
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/*#if IMPL == 1
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return get_raw_bit_a();
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#else*/
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return get_raw_bit_b();
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/*#endif*/
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}
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static uint neumann_filter(void) {
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uint a, b;
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uint32_t counter = 0;
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const uint32_t limit = 0x40;
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do {
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a = get_raw_bit();
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b = get_raw_bit();
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++counter;
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} while (a == b && counter < limit);
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} while (a == b && counter < TEST_NEUMANN_MAX);
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if (counter == limit) iprintf("[---] aaaaaaa!\n");
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//iprintf("[---] emit bit %u%s\n", b, (counter == 0x100) ? "aaaaaa" : "");
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if (counter == TEST_NEUMANN_MAX)
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test_alarm("max. Von Neumann filter iterations reached");
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//iprintf("[---] emit bit %u\n", b);
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return b;
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}
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void rorand_init(void) {
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enum rorand_error rorand_init(rorand_err_cb err_cb) {
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enum rorand_error e = env_check();
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if (e != rr_ok) return e;
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critical_section_init(&cs);
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testind = 0;
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memset(tests, 0, sizeof(tests));
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SysTick->LOAD = 0xffffffffu;
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SysTick->LOAD = 0xffffff;
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SysTick->CTRL = SysTick_CTRL_CLKSOURCE_Msk | SysTick_CTRL_ENABLE_Msk;
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/*psm_hw->frce_on = PSM_FRCE_ON_ROSC_BITS;
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while (!(psm_hw->done & PSM_DONE_ROSC_BITS)) ;
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iprintf("[---] rosc power on\n");*/
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if (!(psm_hw->done & PSM_DONE_ROSC_BITS)) {
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psm_hw->frce_on = PSM_FRCE_ON_ROSC_BITS;
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while (!(psm_hw->done & PSM_DONE_ROSC_BITS)) ;
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LOG("[---] rosc power on\n");
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}
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//rosc_hw->dormant = 1;
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rosc_hw->ctrl = 0xfabfa7; // enable, high freqrange
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rosc_hw->freqa = 0x96967777;
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rosc_hw->freqb = 0x96967777;
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//rosc_hw->dormant = 0;
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rosc_wait_stab();
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iprintf("[---] rosc now stab\n");
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rosc_hw->freqa = 0x96967777; // high drive strength
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rosc_hw->freqb = 0x96967777; // high drive strength
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// wait for stabilization
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while (!(rosc_hw->status & ROSC_STATUS_STABLE_BITS)) ;
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LOG("[---] rosc now stab\n");
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test_has_alarm = false;
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do_tests = TEST_DO_STARTUP;
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if (do_tests) {
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errcb = NULL;
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for (size_t i = 0; i < TEST_STARTUP_NUM; ++i) neumann_filter();
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if (test_has_alarm) {
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SysTick->CTRL = 0;
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critical_section_deinit(&cs);
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return rr_fail_init_test;
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}
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test_has_alarm = false;
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LOG("[---] startup tests ok\n");
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}
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errcb = err_cb;
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do_tests = TEST_DO_CONTINUOUS;
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return rr_ok;
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}
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bool rorand_had_error(bool clear_if_raised) {
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bool r;
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uint32_t v = enter_critical_section();
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{
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r = test_has_alarm;
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if (clear_if_raised && r)
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test_has_alarm = false;
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}
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exit_critical_section(v);
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return r;
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}
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void rorand_get(void* dst_, size_t nbits) {
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@ -167,7 +258,6 @@ void rorand_get(void* dst_, size_t nbits) {
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for (size_t j = 0; j < nbits; j += 8) {
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size_t bs = nbits - j;
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if (bs > 8) bs = 8;
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//iprintf("[===] byte %u (%u bits)\n", j>>3, bs);
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uint8_t v = 0;
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for (size_t i = 0; i < bs; ++i) {
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@ -176,7 +266,6 @@ void rorand_get(void* dst_, size_t nbits) {
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v |= r;
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}
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//iprintf("[===] emit byte %02hhx\n", v);
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*dst = v;
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++dst;
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}
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15
src/rorand.h
15
src/rorand.h
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@ -3,8 +3,21 @@
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#define RORAND_H_
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#include <stddef.h>
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#include <stdbool.h>
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enum rorand_error {
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rr_ok = 0,
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rr_rosc_used = -1,
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rr_systick_used = -2,
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rr_sysclk_too_slow = -3,
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rr_fail_init_test = -4,
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};
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typedef void (*rorand_err_cb)(const char* errmsg);
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enum rorand_error rorand_init(rorand_err_cb err_cb);
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bool rorand_had_error(bool clear_if_raised);
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void rorand_init(void);
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void rorand_get(void* dst, size_t nbits);
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#endif
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