2012-12-29 21:22:10 +00:00
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/*
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* This file is part of the libsigrok project.
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*
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* Copyright (C) 2012 Martin Ling <martin-git@earth.li>
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2013-04-08 10:01:00 +00:00
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* Copyright (C) 2013 Bert Vermeulen <bert@biot.com>
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2012-12-29 21:22:10 +00:00
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*
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* This program is free software: you can redistribute it and/or modify
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* it under the terms of the GNU General Public License as published by
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* the Free Software Foundation, either version 3 of the License, or
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* (at your option) any later version.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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* You should have received a copy of the GNU General Public License
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* along with this program. If not, see <http://www.gnu.org/licenses/>.
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*/
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2013-10-31 17:31:39 +00:00
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#ifndef LIBSIGROK_HARDWARE_RIGOL_DS_PROTOCOL_H
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#define LIBSIGROK_HARDWARE_RIGOL_DS_PROTOCOL_H
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2012-12-29 21:22:10 +00:00
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#include <stdint.h>
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2013-11-01 11:05:49 +00:00
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#include <stdbool.h>
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2012-12-29 21:22:10 +00:00
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#include "libsigrok.h"
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#include "libsigrok-internal.h"
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2013-12-23 03:38:35 +00:00
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#define LOG_PREFIX "rigol-ds"
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2012-12-29 21:22:10 +00:00
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2013-11-29 00:14:54 +00:00
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/* Size of acquisition buffers */
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#define ACQ_BUFFER_SIZE 32768
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2014-03-24 21:39:42 +00:00
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#define MAX_ANALOG_CHANNELS 4
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#define MAX_DIGITAL_CHANNELS 16
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2013-12-29 00:34:58 +00:00
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2014-01-22 04:08:00 +00:00
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enum protocol_version {
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PROTOCOL_V1, /* VS5000 */
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PROTOCOL_V2, /* DS1000 */
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PROTOCOL_V3, /* DS2000, DSO1000 */
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2013-11-29 00:14:54 +00:00
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};
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2014-01-22 04:08:00 +00:00
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enum data_format {
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/* Used by DS1000 versions up to 2.02, and VS5000 series */
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FORMAT_RAW,
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/* Used by DS1000 versions from 2.04 onwards and all later series */
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FORMAT_IEEE488_2,
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2013-11-29 00:14:54 +00:00
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};
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enum data_source {
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DATA_SOURCE_LIVE,
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DATA_SOURCE_MEMORY,
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DATA_SOURCE_SEGMENTED,
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};
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2012-12-30 03:17:56 +00:00
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2014-01-22 04:08:00 +00:00
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struct rigol_ds_vendor {
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const char *name;
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const char *full_name;
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};
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struct rigol_ds_series {
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const struct rigol_ds_vendor *vendor;
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const char *name;
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enum protocol_version protocol;
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enum data_format format;
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2013-11-01 11:05:49 +00:00
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uint64_t max_timebase[2];
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uint64_t min_vdiv[2];
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2014-01-22 04:08:00 +00:00
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int num_horizontal_divs;
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int live_samples;
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int buffer_samples;
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};
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struct rigol_ds_model {
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const struct rigol_ds_series *series;
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const char *name;
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uint64_t min_timebase[2];
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2013-12-29 00:34:58 +00:00
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unsigned int analog_channels;
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2013-11-01 11:05:49 +00:00
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bool has_digital;
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2013-11-29 00:14:54 +00:00
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};
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enum wait_events {
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WAIT_NONE, /* Don't wait */
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WAIT_TRIGGER, /* Wait for trigger (only live capture) */
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WAIT_BLOCK, /* Wait for block data (only when reading sample mem) */
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WAIT_STOP, /* Wait for scope stopping (only single shots) */
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2013-11-01 11:05:49 +00:00
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};
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2012-12-29 21:22:10 +00:00
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/** Private, per-device-instance driver context. */
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struct dev_context {
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2013-11-01 11:05:49 +00:00
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/* Device model */
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const struct rigol_ds_model *model;
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2014-01-22 04:08:00 +00:00
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enum data_format format;
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2013-11-01 11:05:49 +00:00
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/* Device properties */
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const uint64_t (*timebases)[2];
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uint64_t num_timebases;
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const uint64_t (*vdivs)[2];
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uint64_t num_vdivs;
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2013-04-14 01:21:55 +00:00
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2014-03-14 20:09:37 +00:00
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/* Channel groups */
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2014-03-24 21:39:42 +00:00
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struct sr_channel_group analog_groups[MAX_ANALOG_CHANNELS];
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2014-03-14 20:09:37 +00:00
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struct sr_channel_group digital_group;
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2013-04-21 12:44:34 +00:00
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2013-04-11 14:06:55 +00:00
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/* Acquisition settings */
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2014-03-24 20:34:20 +00:00
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GSList *enabled_analog_channels;
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GSList *enabled_digital_channels;
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2012-12-30 03:17:56 +00:00
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uint64_t limit_frames;
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2012-12-29 21:22:10 +00:00
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void *cb_data;
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2013-11-29 00:14:54 +00:00
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enum data_source data_source;
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uint64_t analog_frame_size;
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2014-01-17 02:56:01 +00:00
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uint64_t digital_frame_size;
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2012-12-29 21:22:10 +00:00
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2013-04-11 14:06:55 +00:00
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/* Device settings */
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2014-03-24 21:39:42 +00:00
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gboolean analog_channels[MAX_ANALOG_CHANNELS];
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gboolean digital_channels[MAX_DIGITAL_CHANNELS];
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2014-01-16 23:25:59 +00:00
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gboolean la_enabled;
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2013-04-11 14:06:55 +00:00
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float timebase;
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2014-03-24 21:39:42 +00:00
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float vdiv[MAX_ANALOG_CHANNELS];
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int vert_reference[MAX_ANALOG_CHANNELS];
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float vert_offset[MAX_ANALOG_CHANNELS];
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2013-04-11 14:06:55 +00:00
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char *trigger_source;
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float horiz_triggerpos;
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char *trigger_slope;
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2014-03-24 21:39:42 +00:00
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char *coupling[MAX_ANALOG_CHANNELS];
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2013-04-11 14:06:55 +00:00
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/* Operational state */
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2013-12-27 14:59:25 +00:00
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/* Number of frames received in total. */
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2013-04-11 14:06:55 +00:00
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uint64_t num_frames;
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2013-12-29 00:34:58 +00:00
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/* GSList entry for the current channel. */
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GSList *channel_entry;
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2014-01-17 15:07:15 +00:00
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/* Number of bytes received for current channel. */
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uint64_t num_channel_bytes;
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2014-01-22 08:13:27 +00:00
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/* Number of bytes of block header read */
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uint64_t num_header_bytes;
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2013-11-01 11:05:49 +00:00
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/* Number of bytes in current data block, if 0 block header expected */
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uint64_t num_block_bytes;
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/* Number of data block bytes already read */
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uint64_t num_block_read;
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2013-11-29 00:14:54 +00:00
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/* What to wait for in *_receive */
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enum wait_events wait_event;
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/* Trigger/block copying/stop waiting status */
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int wait_status;
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/* Acq buffers used for reading from the scope and sending data to app */
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unsigned char *buffer;
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float *data;
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2012-12-29 21:22:10 +00:00
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};
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2014-01-22 00:22:41 +00:00
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SR_PRIV int rigol_ds_config_set(const struct sr_dev_inst *sdi, const char *format, ...);
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2013-11-29 00:14:54 +00:00
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SR_PRIV int rigol_ds_capture_start(const struct sr_dev_inst *sdi);
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2013-12-27 16:03:13 +00:00
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SR_PRIV int rigol_ds_channel_start(const struct sr_dev_inst *sdi);
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2013-10-31 17:31:39 +00:00
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SR_PRIV int rigol_ds_receive(int fd, int revents, void *cb_data);
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SR_PRIV int rigol_ds_get_dev_cfg(const struct sr_dev_inst *sdi);
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2012-12-30 03:17:56 +00:00
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2012-12-29 21:22:10 +00:00
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#endif
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