3387a5d8ee
output: simplify trigger marker position calculation (readability)
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This amends commit 67b345b981
2018-07-15 20:47:08 +02:00
67b345b981
output: fixup trigger marker position in ascii/bits/hex output modules
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Adjust the calculation of the '^' marker's position in T: lines of the
-O ascii/bits/hex output modules such that it matches the sample data
lines' layout. Add comments which discuss the motivation of the marker
position's calculation, which differs among each of those modules.
Strictly speaking -O bits was already correct. But I chose to adjust and
comment the logic such that multiple output modules follow a common
pattern. If performance is an issue, the bits.c change might be worth
reverting.
This commit fixes bug #1238 .
2018-07-15 19:40:00 +02:00
769561cbe9
std: Improve prototypes of some functions.
2018-06-26 16:42:43 +02:00
0f523f2b45
rigol-ds: Add initial Agilent MSO7034A support.
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Digital channels (and various other features) are not yet supported.
2018-06-22 22:53:11 +02:00
9ad1d49c4c
rigol-ds: Improve a log message.
2018-06-22 19:20:44 +02:00
c26107b745
siglent-sds: Drop currently unused switch/case.
2018-06-22 18:54:28 +02:00
eb354840f0
siglent_sds_channel_start(): Use ternary operator to shorten code.
2018-06-22 18:54:28 +02:00
55bece00aa
rigol-ds: Add missing "return SR_ERR".
2018-06-22 10:53:03 +02:00
e5b41b8d7e
siglent-sds: Fixed samplerate and memory depth calculation
2018-06-22 10:51:50 +02:00
7e776c70b0
siglent-sds: Fix, USB connection problem partially solved, bug #1130
2018-06-22 10:51:39 +02:00
5e7ac9f9ec
udev: Add rule for Rigol DS4000 series devices.
2018-06-22 01:55:15 +02:00
6b04525ba2
rigol-ds: Initial patch for Rigol DS4000 support
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This fixes bug #1208 .
2018-06-22 01:55:02 +02:00
643c8824a5
rigol-ds: Rename the CHANINFO macro and comment it
2018-06-22 00:47:09 +02:00
6bcc81ac3a
rigol-ds: Store trigger sources and their number for each model
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Store trigger sources and their number for each model when it is probed
and use that.
This fixes bug #299 .
2018-06-22 00:35:44 +02:00
32054b0963
tests: Expand test_analog_unit_to_string unit test.
2018-06-19 18:22:42 +02:00
72cb20ed07
tests: Fix test_analog_unit_to_string unit test.
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The loop body was never executed.
2018-06-19 18:22:42 +02:00
c5c6fa0f22
serial-dmm: Fix Voltcraft VC-96 sorting.
2018-06-18 16:30:04 +02:00
4a6751fd07
dmm/vc96: Drop some obsolete debug output.
2018-06-18 16:30:04 +02:00
9456d63610
Add support for the Voltcraft VC-96 DMM.
2018-06-18 16:30:04 +02:00
b8fcae5a12
dtm0660: Do not apply the exponent twice on the value
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This fixes bug #1236 .
2018-06-18 15:26:46 +02:00
10481ef05d
Fix: Bug #1188 DSLogic triggering
2018-06-16 19:31:44 +02:00
ab2b21fb68
fluke-45: Add initial driver implementation.
2018-06-15 15:48:49 +02:00
e756c595b6
fluke-45: Initial driver skeleton.
2018-06-15 15:05:04 +02:00
f1e82915a8
gwinstek-gpd: Fix sr_dev_driver struct.
2018-06-15 00:18:22 +02:00
380d3b2ae8
gwinstek-gpd: Avoid some unnecessary assignments.
2018-06-14 22:48:26 +02:00
eaa8c6597b
gwinstek-gpd: Drop some unneeded debug logs.
2018-06-14 22:48:26 +02:00
b872ab7d30
gwinstek-gpd: Initial implementation.
2018-06-14 14:19:08 +02:00
5eb39a91f3
wav: Don't assume CHUNK_SIZE >= total_samples
2018-06-06 22:07:04 +02:00
bf2a6eeaa0
hantek-4032l: Minor cosmetic fix.
2018-06-06 00:01:04 +02:00
c7b5c3588e
hantek-4032l: Rename 'devc->buffer' to 'devc->buf'.
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This is shorter and also avoids confusion with transfer->buffer.
2018-06-05 23:59:24 +02:00
7b9387b8f0
hantek-4032l: Rename number_samples to num_samples.
2018-06-05 23:56:30 +02:00
264a4cb2b8
hantek-4032l: Use MIN() where possible.
2018-06-05 23:55:23 +02:00
cbc656e45f
hantek-4032l: Simplify some config_get/_set parts.
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Also, drop some unneeded checks.
2018-06-05 23:43:23 +02:00
583fc126d0
hantek-4032l: config_set(): Simplify SR_CONF_CAPTURE_RATIO case.
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The sr_config_set() wrapper already checks the value.
2018-06-05 23:16:02 +02:00
2dcd904c18
hantek-4032l: Drop some unneeded malloc checks.
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As per guidelines in HACKING.
2018-06-05 23:02:58 +02:00
61803a29aa
hantek-4032l: Reduce indentation level a bit.
2018-06-05 22:59:29 +02:00
b8a954c586
zketech-ebd-usb: Fix a compiler warning.
2018-06-05 22:01:12 +02:00
f49065c668
hantek-4032l: Add support for external clocks.
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These options are NOT available for FPGA version 0.
- add option to select edge type
Signed-off-by: Andrej Valek <andy@skyrain.eu>
2018-06-05 22:01:12 +02:00
bc294eaca8
Add SR_CONF_EXTERNAL_CLOCK_SOURCE key.
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Signed-off-by: Andrej Valek <andy@skyrain.eu>
2018-06-05 22:01:12 +02:00
2a80186103
hantek-4032l: Separate threshold channels.
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Split global threshold into channels A and B.
Signed-off-by: Andrej Valek <andy@skyrain.eu>
2018-06-05 22:01:12 +02:00
caad0024fb
hantek-4032l: Set new pwm threshold handling.
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Calculate threshold values from <-6.0;6.0> range.
Signed-off-by: Andrej Valek <andy@skyrain.eu>
2018-06-05 17:16:39 +02:00
3dc976fe9f
hantek-4032l: Implement trigger handling.
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Send trigger position to upper layer.
Signed-off-by: Andrej Valek <andy@skyrain.eu>
2018-06-05 17:16:39 +02:00
4b75f84c01
hantek-4032l: Set maximum samples size to 64MB.
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Signed-off-by: Andrej Valek <andy@skyrain.eu>
2018-06-05 17:11:43 +02:00
2958315ded
hantek-4032l: Increase speed of data getting.
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- add support for multiple transfers.
- set nummber of samples to 1 for FPGA FW version 0
- increase size of data transfer buffer to 2kB.
Signed-off-by: Andrej Valek <andy@skyrain.eu>
2018-06-05 17:10:14 +02:00
43d8603571
hantek-4032l: Separate USB receive callbacks.
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Callback for data transfer is separated from status. This change will be
used for better data transfer sending/receiving. Cast signal, that trigger
has been captured was moved into state: H4032L_STATUS_FIRST_TRANSFER.
Signed-off-by: Andrej Valek <andy@skyrain.eu>
2018-06-05 16:57:48 +02:00
7a7afc0086
hantek-4032l: Get FGPA version.
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- get FPGA version in dev_open
- enable some features only for newer FPGA
- decrease printing number of message of FPGA version
Signed-off-by: Andrej Valek <andy@skyrain.eu>
2018-06-05 16:57:48 +02:00
28f2d07fe5
hantek-4032l: Unify style.
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Signed-off-by: Andrej Valek <andy@skyrain.eu>
2018-06-05 16:55:45 +02:00
9e850040db
Fix #1167 by not creating sigrok channels twice
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Also fixes a similar bug in the analog_raw input module that prevented
it from resetting properly - it freed its resources by calling cleanup().
2018-06-03 19:37:49 +02:00
3c9117094c
input/logicport: remove obsolete reset/cleanup assignments
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The in->buf truncation is done by common backend logic. The module's
cleanup() does zero out inc, which obsoletes the flag assignments.
2018-06-03 19:28:46 +02:00
4c40d096d4
input/logicport: don't re-create channels after input module reset
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Split the creation of channels and groups as well as the creation of the
session feed buffer into separate routines. Re-allocate the buffer after
reset but do not re-create the channels and groups.
This implementation assumes that after reset() of the input module, the
very same set of channels (including their order, names and enabled
state, as well as group membership) results from processing the
subsequently fed file content. Reading rather different configurations
from the same input file by means of repeated reset and re-read may not
work as expected.
2018-06-03 19:28:46 +02:00
Gerhard Sittig
Uwe Hermann
marchelh
Valentin Ochs
Matthias Schulz
Adrian Stratulat
Joerg Alpers
JohnCh
Bastian Schmitz
Soeren Apel
Andrej Valek