Minor adjustment for improved readability. Don't hide assignments in
variable declarations. Move initialization of some variables closer to
related evaluation or subsequent processing. Break a complicated looking
roundup expression into several short steps.
Fix how the READ_ID register index was passed to the hardware access.
Addresses are sent in nibbles, so shift by eight is wrong here. No harm
was done, as the register's index is zero.
The Asix Sigma driver is aware of three firmware images, which are
required for acquisition with up to 50MHz, 100MHz, and 200MHz. The
previous implementation always downloaded the corresponding firmware
image whenever the sample rate has changed, which was redundant.
Skip the download when the new samplerate uses the same firmware as the
previously selected samplerate did. This results in faster responses in
the GUI when the samplerate selection changes.
Move assignments out of the variable declaration block for improved
readability while we are here.
The hardware provides captured data at a maximum rate of 16bits per 20ns
(50 MHz). For samplerates of 100 and 200 MHz one individual 16bit entity
contains multiple samples for a reduced number of channels. The bits of
several sample points are interleaved within the 16bit entity.
This commit is based on work done by jry@ who fixed a lot of issues with
the help from Ondrej at Asix.
This fixes bug #840.
Adjust the interpretation of acquired sample data such that regardless
of 50/100/200MHz samplerate the assignment of LA pins to sigrok channels
remains stable.
Introduce helper routines to access the sample data that is provided by
the ASIX hardware, as well as the buffer which accumulates logic data
before it gets sent to the session's datafeed.
This hides endianess issues from call sites, and prepares access to
memory layout which varies with sample frequencies.
This commit is based on work done by jry@.
This works around bug #359. Triggers currently are not operational for
Asix Sigma. Don't claim support in the driver so that UIs won't use the
feature. Yet allow research in this issue, by concentrating the switch
for the feature's support in a central location.
Add/update a comment and unobfuscate an error code path while we are here.
Both the .c and the .h file declared the same identifiers for USB
properties of ASIX hardware with identical values. Remove the .c
incarnation and keep the .h content, as the names are used in api.c
as well as protocol.c sources.
Introduce a separate routine which maps sample counts and sample period
to an elapsed sample time after which acquisition shall get stopped.
Add some more time to make sure the most recent captured data has passed
the hardware pipeline and is available for download.
This commit is based on work done by jry@.
When "tsdiff < EVENTS_PER_CLUSTER" we don't want "tsdiff - EVENTS_PER_CLUSTER"
(a negative number) to be treated as (int).
Submitted-By: jry <jrysig@gmail.com>
[ gsi: massaged for mainline submission ]
The resistance values of some DMMs were incorrectly reported due to a
missing factor of 10 in the calculations.
Tested on Voltcraft VC-920/VC-940 and Tenma 72-9380A/72-7730/72-7732.
Bump the number of supported logic channels from 8 to 128. This is
mostly motivated to test the 64 channels limit which some of the
components/subprojects of the sigrok project might have (input/output
modules, user interfaces).
Only automatically enable the first 8 of the 128 total logic channels,
i.e. default to the previous behaviour. Prepare to only enable part of
the set of analog channels, but stick with their being active by default
as well.
Factor out the choice for the default logic pattern, too. This allows
for easier adjustment of the default configuration, when settings are
concentrated in a single spot.
Extend the demo driver, add another waveform choice for logic channels.
Create a "cable squid" logo representation which occupies a large number
of channels.
This pattern occupies 128x128 pixels. Unlike the 'sigrok' pattern it
gets repeated when more channels are involved, but is not shifted in the
repetition.
Old:
ut71x: Applying exponent -12, new value is 0.000000.
P1: 1.500 nF AUTO
P1: 1.500 nF AUTO
New:
ut71x: Applying exponent -12, new value is 1.5e-09.
P1: 1.500 nF AUTO
P1: 1.500 nF AUTO
This fixes bug #700.
This is a (hopefully temporary) workaround for the
SR_CONF_CAPTUREFILE mechanism. The value for
vdev->capturefile is set by this, however only once
via stream_session_data().
During stream processing in stream_session_data(),
capturefile may receive new values - e.g. when there
are multiple logic files or if there is analog data.
With that, the initially set capturefile is overwritten.
When re-loading the file, we are then running into
issues because we don't know what the initial value was.
As all .sr files use "logic-1" by default and, we
simulate the behavior of stream_session_data() and
assign this name to capturefile if there are logic
channels present.
With this change, all three kinds of files reload
as expected: logic only, analog only and mixed signal.
For this reason, it's a short-term fix for #944.
The handling of the digital channels for this series is somewhere
between that of the DS1000D series (PROTOCOL_V2) and the MSO1000Z
(PROTOCOL_V4).
The :LA command set is similar to that of V4, but the LA data has to be
requested with :WAV:SOUR:LA and arrives in interleaved form like V2.
None of these changes should affect other models. They only affect the
case of PROTOCOL_V3 with digital channels, which occurs only for the
MSO2000A series.
'i' was iterating in steps of unitsize. However, the destination array
was also indexed with it, but it is of u8 type. Let 'i' run bytewise and
only multiply with unitsize when we need it.
This fixes parts of bug #844.
Signed-off-by: Wolfram Sang <wsa@the-dreams.de>
'j' is the loop variable for channels, not 'i'.
This fixes parts of bug #844.
Reported-by: Maxim Sloyko <m.sloyko@gmail.com>
Signed-off-by: Wolfram Sang <wsa@the-dreams.de>
src/output/csv.c: In function 'dump_saved_values':
src/output/csv.c:461:6: warning: format '%lu' expects argument of
type 'long unsigned int', but argument 3 has type 'uint64_t' [-Wformat=]
ctx->sample_time, ctx->value);
^
Fixes#933.
We'd already had this problem elsewhere and thus have this wrapper function
that does this where necessary. It just wasn't in use on these two call sites,
which was causing timing problems when used over tcp-raw or VXI transports.
With trigger enabled, and with PulseView, a second (or more) acquisition
starts immediately instead of blocking. It's mandatory to try several times
to have a correct behavior.
According to http://mygizmos.org/ols/Logic-Sniffer-FPGA-Spec.pdf section 2.3.1
p.8, the Openbench Logic Sniffer must be reset before each arm command.
This fixes bug #809.
Signed-off-by: Gwenhael Goavec-Merou <gwenhael.goavec-merou@trabucayre.com>
Openbench Logic Sniffer reset is a little more complex than a simple send.
To avoid code duplication, this patch adds a new function dedicated to
this task.
Signed-off-by: Gwenhael Goavec-Merou <gwenhael.goavec-merou@trabucayre.com>
Instead of replacing the group=plugdev, simply add the TAG as well.
This allows (in most cases) the same file to be used happily on systemd
and older group based systems. Some systems may produce warnings about
non-existant groups, but it remains functional. Approach inspired by
that taken by the OpenOCD project.
This fixes parts of bug #665.
Signed-off-by: Karl Palsson <karlp@tweak.net.au>
Increasing the chunk size from 512ksamples to 4Msamples leads to
slightly faster session file loading from sigrok session (*.sr) files
in frontends, while not looking too "chunky".
The performance increase is not really massive, but still noticeable.
A further increase to, say, 10 or 100Msamples shows no further
noticeable improvements.
This changes the fx2lafw code to only enable the wide_sampling (16bit)
method, if at least one of the higher eight channels is enabled. This
has the benefit, that we can use higher samplerates on 16bit LA
devices if we use only the first eight channels.
The wide sampling is also enabled if we have one or more analog
channels.
Signed-off-by: Jan Losinski <losinski@wh2.tu-dresden.de>
Gerhard Sittig
Uwe Hermann
Angus Gratton
Soeren Apel
Martin Ling
Wolfram Sang
Johannes Römer
Gwenhael Goavec-Merou
Marc Schink
Karl Palsson
Bert Vermeulen
Jan Losinski
Sven Schnelle