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kicad/demos/video/video.pro

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ADDED: Schematic plotting can use a dedicated color theme ADDED: PDF, PS, and SVG plots can optionally include the page background color Fixes #1830
2020-03-06 03:00:30 +00:00
update=Thu 05 Mar 2020 20:34:10 EST
Fixes
2011-03-07 20:20:37 +00:00
version=1
ADDED: Schematic plotting can use a dedicated color theme ADDED: PDF, PS, and SVG plots can optionally include the page background color Fixes #1830
2020-03-06 03:00:30 +00:00
last_client=eeschema
Fixes
2011-03-07 20:20:37 +00:00
[general]
version=1
RootSch=video.sch
BoardNm=video.brd
[cvpcb]
version=1
NetIExt=net
[cvpcb/libraries]
EquName1=devcms
Update demo "video"
2019-08-25 16:39:24 +00:00
[eeschema]
version=1
LibDir=
Fixes
2011-03-07 20:20:37 +00:00
[pcbnew]
version=1
Pcbnew: Minor fix in hotkeys. Demos: add an example to use a local fp-lib-table and local libs, and update schematics and boards.
2014-08-31 16:19:07 +00:00
PageLayoutDescrFile=
Fixes
2011-03-07 20:20:37 +00:00
LastNetListRead=video.net
Update demo "video"
2019-08-25 16:39:24 +00:00
LastSTEPExportPath=
LastIDFExportPath=
LastVRMLExportPath=
LastSpecctraDSNExportPath=
LastGenCADExportPath=
CopperLayerCount=4
BoardThickness=1.6002
AllowMicroVias=0
AllowBlindVias=0
RequireCourtyardDefinitions=0
ProhibitOverlappingCourtyards=1
MinTrackWidth=0.2
MinViaDiameter=0.7999999999999999
MinViaDrill=0.4
MinMicroViaDiameter=0.508
MinMicroViaDrill=0.127
MinHoleToHole=0.25
CopperEdgeClearance=0.01
TrackWidth1=0.2
ViaDiameter1=0.889
ViaDrill1=0.4
dPairWidth1=0.2
dPairGap1=0.25
dPairViaGap1=0.25
SilkLineWidth=0.3048
SilkTextSizeV=1.27
SilkTextSizeH=1.27
SilkTextSizeThickness=0.2032
SilkTextItalic=0
SilkTextUpright=1
CopperLineWidth=0.3048
CopperTextSizeV=1.524
CopperTextSizeH=1.524
CopperTextThickness=0.2032
CopperTextItalic=0
CopperTextUpright=1
EdgeCutLineWidth=0.2032
CourtyardLineWidth=0.05
OthersLineWidth=0.09999999999999999
OthersTextSizeV=1
OthersTextSizeH=1
OthersTextSizeThickness=0.15
OthersTextItalic=0
OthersTextUpright=1
Pcbnew: Minor fix in hotkeys. Demos: add an example to use a local fp-lib-table and local libs, and update schematics and boards.
2014-08-31 16:19:07 +00:00
SolderMaskClearance=0.254
Update demo "video"
2019-08-25 16:39:24 +00:00
SolderMaskMinWidth=0.25
SolderPasteClearance=0
SolderPasteRatio=-0
[pcbnew/Layer.F.Cu]
Name=top_copper
Type=0
Enabled=1
[pcbnew/Layer.In1.Cu]
Name=GND_layer
Type=0
Enabled=1
[pcbnew/Layer.In2.Cu]
Name=VCC_layer
Type=0
Enabled=1
[pcbnew/Layer.In3.Cu]
Name=In3.Cu
Type=0
Enabled=0
[pcbnew/Layer.In4.Cu]
Name=In4.Cu
Type=0
Enabled=0
[pcbnew/Layer.In5.Cu]
Name=In5.Cu
Type=0
Enabled=0
[pcbnew/Layer.In6.Cu]
Name=In6.Cu
Type=0
Enabled=0
[pcbnew/Layer.In7.Cu]
Name=In7.Cu
Type=0
Enabled=0
[pcbnew/Layer.In8.Cu]
Name=In8.Cu
Type=0
Enabled=0
[pcbnew/Layer.In9.Cu]
Name=In9.Cu
Type=0
Enabled=0
[pcbnew/Layer.In10.Cu]
Name=In10.Cu
Type=0
Enabled=0
[pcbnew/Layer.In11.Cu]
Name=In11.Cu
Type=0
Enabled=0
[pcbnew/Layer.In12.Cu]
Name=In12.Cu
Type=0
Enabled=0
[pcbnew/Layer.In13.Cu]
Name=In13.Cu
Type=0
Enabled=0
[pcbnew/Layer.In14.Cu]
Name=In14.Cu
Type=0
Enabled=0
[pcbnew/Layer.In15.Cu]
Name=In15.Cu
Type=0
Enabled=0
[pcbnew/Layer.In16.Cu]
Name=In16.Cu
Type=0
Enabled=0
[pcbnew/Layer.In17.Cu]
Name=In17.Cu
Type=0
Enabled=0
[pcbnew/Layer.In18.Cu]
Name=In18.Cu
Type=0
Enabled=0
[pcbnew/Layer.In19.Cu]
Name=In19.Cu
Type=0
Enabled=0
[pcbnew/Layer.In20.Cu]
Name=In20.Cu
Type=0
Enabled=0
[pcbnew/Layer.In21.Cu]
Name=In21.Cu
Type=0
Enabled=0
[pcbnew/Layer.In22.Cu]
Name=In22.Cu
Type=0
Enabled=0
[pcbnew/Layer.In23.Cu]
Name=In23.Cu
Type=0
Enabled=0
[pcbnew/Layer.In24.Cu]
Name=In24.Cu
Type=0
Enabled=0
[pcbnew/Layer.In25.Cu]
Name=In25.Cu
Type=0
Enabled=0
[pcbnew/Layer.In26.Cu]
Name=In26.Cu
Type=0
Enabled=0
[pcbnew/Layer.In27.Cu]
Name=In27.Cu
Type=0
Enabled=0
[pcbnew/Layer.In28.Cu]
Name=In28.Cu
Type=0
Enabled=0
[pcbnew/Layer.In29.Cu]
Name=In29.Cu
Type=0
Enabled=0
[pcbnew/Layer.In30.Cu]
Name=In30.Cu
Type=0
Enabled=0
[pcbnew/Layer.B.Cu]
Name=bottom_copper
Type=0
Enabled=1
[pcbnew/Layer.B.Adhes]
Enabled=1
[pcbnew/Layer.F.Adhes]
Enabled=1
[pcbnew/Layer.B.Paste]
Enabled=1
[pcbnew/Layer.F.Paste]
Enabled=1
[pcbnew/Layer.B.SilkS]
Enabled=1
[pcbnew/Layer.F.SilkS]
Enabled=1
[pcbnew/Layer.B.Mask]
Enabled=1
[pcbnew/Layer.F.Mask]
Enabled=1
[pcbnew/Layer.Dwgs.User]
Enabled=1
[pcbnew/Layer.Cmts.User]
Enabled=1
[pcbnew/Layer.Eco1.User]
Enabled=1
[pcbnew/Layer.Eco2.User]
Enabled=1
[pcbnew/Layer.Edge.Cuts]
Enabled=1
[pcbnew/Layer.Margin]
Enabled=1
[pcbnew/Layer.B.CrtYd]
Enabled=1
[pcbnew/Layer.F.CrtYd]
Enabled=1
[pcbnew/Layer.B.Fab]
Enabled=1
[pcbnew/Layer.F.Fab]
Enabled=1
[pcbnew/Layer.Rescue]
Enabled=0
[pcbnew/Netclasses]
[pcbnew/Netclasses/Default]
Name=Default
Clearance=0.2
TrackWidth=0.2
ViaDiameter=0.889
ViaDrill=0.4
uViaDiameter=0.508
uViaDrill=0.127
dPairWidth=0.2
dPairGap=0.25
dPairViaGap=0.25
[pcbnew/Netclasses/1]
Name=pwr
Clearance=0.2
TrackWidth=0.23
ViaDiameter=0.889
ViaDrill=0.4
uViaDiameter=0.508
uViaDrill=0.127
dPairWidth=0.2
dPairGap=0.25
dPairViaGap=0.25
ADDED: Schematic plotting can use a dedicated color theme ADDED: PDF, PS, and SVG plots can optionally include the page background color Fixes #1830
2020-03-06 03:00:30 +00:00
[schematic_editor]
version=1
PageLayoutDescrFile=
PlotDirectoryName=/home/jon/Desktop/plot_tests/
SubpartIdSeparator=0
SubpartFirstId=65
NetFmtName=Pcbnew
SpiceAjustPassiveValues=0
LabSize=50
ERC_WriteFile=0
ERC_TestSimilarLabels=1
ERC_CheckUniqueGlobalLabels=1
ERC_CheckBusDriverConflicts=1
ERC_CheckBusEntryConflicts=1
ERC_CheckBusToBusConflicts=1
ERC_CheckBusToNetConflicts=1