2007-11-27 01:34:35 +00:00
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/*
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2011-09-30 18:15:37 +00:00
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* This program source code file is part of KiCad, a free EDA CAD application.
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2007-11-27 01:34:35 +00:00
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*
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2016-09-08 18:17:37 +00:00
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* Copyright (C) 2007-2016 Dick Hollenbeck, dick@softplc.com
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2019-06-04 10:45:43 +00:00
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* Copyright (C) 2017-2019 KiCad Developers, see change_log.txt for contributors.
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2007-11-27 01:34:35 +00:00
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*
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* This program is free software; you can redistribute it and/or
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* modify it under the terms of the GNU General Public License
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* as published by the Free Software Foundation; either version 2
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* of the License, or (at your option) any later version.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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* You should have received a copy of the GNU General Public License
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* along with this program; if not, you may find one here:
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* http://www.gnu.org/licenses/old-licenses/gpl-2.0.html
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* or you may search the http://www.gnu.org website for the version 2 license,
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* or you may write to the Free Software Foundation, Inc.,
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* 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301, USA
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*/
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2018-01-28 21:02:31 +00:00
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#ifndef DRC_H
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#define DRC_H
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2007-11-27 01:34:35 +00:00
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2020-05-18 00:20:16 +00:00
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#include <board_commit.h>
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2019-05-31 02:30:28 +00:00
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#include <class_board.h>
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#include <class_track.h>
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2020-02-28 00:05:40 +00:00
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#include <class_marker_pcb.h>
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2018-08-27 13:50:50 +00:00
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#include <geometry/seg.h>
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2018-11-28 12:11:43 +00:00
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#include <geometry/shape_poly_set.h>
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2019-05-31 02:30:28 +00:00
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#include <memory>
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#include <vector>
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2019-06-03 13:49:17 +00:00
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#include <tools/pcb_tool_base.h>
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2019-01-11 13:21:38 +00:00
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2018-01-06 23:37:24 +00:00
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2007-12-01 03:42:52 +00:00
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/// DRC error codes:
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2020-03-18 09:19:46 +00:00
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enum PCB_DRC_CODE {
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DRCE_FIRST = 1,
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DRCE_UNCONNECTED_ITEMS = DRCE_FIRST, ///< items are unconnected
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2020-05-07 13:35:50 +00:00
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DRCE_TRACK_NEAR_HOLE, ///< thru hole is too close to track
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2020-03-18 09:19:46 +00:00
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DRCE_TRACK_NEAR_PAD, ///< pad too close to track
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DRCE_TRACK_NEAR_VIA, ///< track too close to via
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2020-05-07 13:35:50 +00:00
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DRCE_TRACK_NEAR_ZONE, ///< track & zone collide or are too close together
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DRCE_TRACK_NEAR_COPPER, ///< track & copper graphic collide or are too close
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2020-03-18 09:19:46 +00:00
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DRCE_VIA_NEAR_VIA, ///< via too close to via
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DRCE_VIA_NEAR_TRACK, ///< via too close to track
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2020-05-07 13:35:50 +00:00
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DRCE_VIA_NEAR_COPPER, ///< via and copper graphic collide or are too close
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2020-03-18 09:19:46 +00:00
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DRCE_TRACK_ENDS, ///< track ends are too close
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DRCE_TRACK_SEGMENTS_TOO_CLOSE, ///< 2 parallel track segments too close: segm ends between segref ends
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DRCE_TRACKS_CROSSING, ///< tracks are crossing
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2020-05-07 13:35:50 +00:00
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DRCE_TRACK_NEAR_EDGE, ///< track too close to board edge
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2020-05-18 20:09:36 +00:00
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DRCE_VIA_NEAR_EDGE, ///< via too close to board edge
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DRCE_PAD_NEAR_EDGE, ///< pad too close to board edge
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2020-05-07 13:35:50 +00:00
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DRCE_PAD_NEAR_PAD, ///< pad too close to pad
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DRCE_PAD_NEAR_COPPER, ///< pad and copper graphic collide or are too close
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2020-03-18 09:19:46 +00:00
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DRCE_ZONES_INTERSECT, ///< copper area outlines intersect
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DRCE_ZONES_TOO_CLOSE, ///< copper area outlines are too close
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2020-05-07 13:35:50 +00:00
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DRCE_ZONE_HAS_EMPTY_NET, ///< copper area has a net but no pads in nets, which is suspicious
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2020-05-14 19:24:10 +00:00
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DRCE_DANGLING_VIA, ///< via which isn't connected to anything
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DRCE_DANGLING_TRACK, ///< track with at least one end not connected to anything
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2020-03-18 09:19:46 +00:00
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DRCE_HOLE_NEAR_PAD, ///< hole too close to pad
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DRCE_HOLE_NEAR_TRACK, ///< hole too close to track
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2020-05-07 13:35:50 +00:00
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DRCE_DRILLED_HOLES_TOO_CLOSE, ///< overlapping drilled holes break drill bits
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2020-03-18 09:19:46 +00:00
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DRCE_TOO_SMALL_TRACK_WIDTH, ///< Too small track width
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2020-05-23 21:48:24 +00:00
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DRCE_TOO_LARGE_TRACK_WIDTH, ///< Too small track width
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2020-03-18 09:19:46 +00:00
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DRCE_TOO_SMALL_VIA, ///< Too small via size
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2020-05-11 19:39:30 +00:00
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DRCE_TOO_SMALL_VIA_ANNULUS, ///< Via size and drill leave annulus too small
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2020-03-18 09:19:46 +00:00
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DRCE_TOO_SMALL_VIA_DRILL, ///< Too small via drill
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2020-05-04 19:08:42 +00:00
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DRCE_TOO_SMALL_PAD_DRILL, ///< Too small via drill
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2020-05-07 13:35:50 +00:00
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DRCE_VIA_HOLE_BIGGER, ///< via's hole is bigger than its diameter
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DRCE_MICROVIA_NOT_ALLOWED, ///< micro vias are not allowed
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DRCE_MICROVIA_TOO_MANY_LAYERS, ///< micro via's layer pair incorrect (layers must be adjacent)
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DRCE_TOO_SMALL_MICROVIA, ///< Too small micro via size
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2020-03-18 09:19:46 +00:00
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DRCE_TOO_SMALL_MICROVIA_DRILL, ///< Too small micro via drill
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2020-05-07 13:35:50 +00:00
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DRCE_BURIED_VIA_NOT_ALLOWED, ///< buried vias are not allowed
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2020-03-18 09:19:46 +00:00
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DRCE_NETCLASS_TRACKWIDTH, ///< netclass has TrackWidth < board.m_designSettings->m_TrackMinWidth
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DRCE_NETCLASS_CLEARANCE, ///< netclass has Clearance < board.m_designSettings->m_TrackClearance
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2020-05-11 19:39:30 +00:00
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DRCE_NETCLASS_VIAANNULUS, ///< netclass ViaSize & ViaDrill leave annulus < board.m_designSettings->m_ViasMinAnnulus
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2020-03-18 09:19:46 +00:00
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DRCE_NETCLASS_VIASIZE, ///< netclass has ViaSize < board.m_designSettings->m_ViasMinSize
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2020-05-04 21:05:30 +00:00
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DRCE_NETCLASS_VIADRILLSIZE, ///< netclass has ViaDrillSize < board.m_designSettings->m_MinThroughDrill
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2020-03-18 09:19:46 +00:00
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DRCE_NETCLASS_uVIASIZE, ///< netclass has ViaSize < board.m_designSettings->m_MicroViasMinSize
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DRCE_NETCLASS_uVIADRILLSIZE, ///< netclass has ViaSize < board.m_designSettings->m_MicroViasMinDrill
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2020-05-07 13:35:50 +00:00
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DRCE_VIA_INSIDE_KEEPOUT,
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2020-05-25 17:46:06 +00:00
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DRCE_MICROVIA_INSIDE_KEEPOUT,
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DRCE_BBVIA_INSIDE_KEEPOUT,
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2020-05-07 13:35:50 +00:00
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DRCE_TRACK_INSIDE_KEEPOUT,
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DRCE_PAD_INSIDE_KEEPOUT,
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DRCE_FOOTPRINT_INSIDE_KEEPOUT,
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2020-05-25 17:46:06 +00:00
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DRCE_HOLE_INSIDE_KEEPOUT,
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DRCE_TEXT_INSIDE_KEEPOUT,
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DRCE_GRAPHICS_INSIDE_KEEPOUT,
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2020-03-18 09:19:46 +00:00
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DRCE_OVERLAPPING_FOOTPRINTS, ///< footprint courtyards overlap
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2020-05-07 13:35:50 +00:00
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DRCE_MISSING_COURTYARD, ///< footprint has no courtyard defined
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DRCE_MALFORMED_COURTYARD, ///< footprint has a courtyard but malformed
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///< (not convertible to a closed polygon with holes)
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2020-05-14 21:01:39 +00:00
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DRCE_PTH_IN_COURTYARD,
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DRCE_NPTH_IN_COURTYARD,
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2020-03-18 09:19:46 +00:00
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DRCE_DISABLED_LAYER_ITEM, ///< item on a disabled layer
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DRCE_INVALID_OUTLINE, ///< invalid board outline
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DRCE_MISSING_FOOTPRINT, ///< footprint not found for netlist item
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DRCE_DUPLICATE_FOOTPRINT, ///< more than one footprints found for netlist item
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DRCE_EXTRA_FOOTPRINT, ///< netlist item not found for footprint
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2020-04-24 13:36:10 +00:00
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DRCE_UNRESOLVED_VARIABLE,
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2020-05-07 13:35:50 +00:00
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DRCE_LAST = DRCE_UNRESOLVED_VARIABLE,
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2020-04-24 13:36:10 +00:00
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// These are actually Cleanup Tracks and Vias actions, not DRCE errors
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2020-05-14 19:24:10 +00:00
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CLEANUP_SHORT,
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CLEANUP_REDUNDANT_VIA,
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CLEANUP_DUPLICATE_TRACK,
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CLEANUP_MERGE_TRACKS,
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CLEANUP_DANGLING_TRACK,
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CLEANUP_DANGLING_VIA,
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CLEANUP_ZERO_LENGTH_TRACK,
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CLEANUP_TRACK_IN_PAD
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2020-03-18 09:19:46 +00:00
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};
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2020-02-28 00:05:40 +00:00
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2007-11-27 01:34:35 +00:00
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2011-09-23 13:57:12 +00:00
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class PCB_EDIT_FRAME;
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2020-03-16 11:05:01 +00:00
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class DIALOG_DRC;
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2011-09-23 13:57:12 +00:00
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class BOARD_ITEM;
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class BOARD;
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class D_PAD;
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class ZONE_CONTAINER;
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class TRACK;
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class MARKER_PCB;
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class DRC_ITEM;
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class NETCLASS;
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2018-08-23 22:41:57 +00:00
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class EDA_TEXT;
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2018-08-27 13:50:50 +00:00
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class DRAWSEGMENT;
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2019-03-28 19:30:51 +00:00
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class NETLIST;
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2018-08-27 13:50:50 +00:00
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class wxWindow;
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class wxString;
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class wxTextCtrl;
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2007-11-27 01:34:35 +00:00
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2007-12-03 05:14:51 +00:00
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2007-11-27 01:34:35 +00:00
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/**
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2018-02-10 20:17:11 +00:00
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* Design Rule Checker object that performs all the DRC tests. The output of
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2007-12-01 03:42:52 +00:00
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* the checking goes to the BOARD file in the form of two MARKER lists. Those
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* two lists are displayable in the drc dialog box. And they can optionally
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* be sent to a text file on disk.
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* This class is given access to the windows and the BOARD
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* that it needs via its constructor or public access functions.
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2008-01-12 20:31:56 +00:00
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*/
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2019-06-03 13:49:17 +00:00
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class DRC : public PCB_TOOL_BASE
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2007-11-27 01:34:35 +00:00
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{
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2020-03-16 11:05:01 +00:00
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friend class DIALOG_DRC;
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2008-01-12 20:31:56 +00:00
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2019-06-03 13:49:17 +00:00
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public:
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DRC();
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~DRC();
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/// @copydoc TOOL_INTERACTIVE::Reset()
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void Reset( RESET_REASON aReason ) override;
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2007-12-01 03:42:52 +00:00
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private:
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2019-03-19 16:46:46 +00:00
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bool m_doUnconnectedTest; // enable unconnected tests
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2020-05-29 20:23:08 +00:00
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bool m_testTracksAgainstZones; // enable zone to items clearance tests
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2019-03-19 16:46:46 +00:00
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bool m_doKeepoutTest; // enable keepout areas to items clearance tests
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bool m_refillZones; // refill zones if requested (by user).
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bool m_reportAllTrackErrors; // Report all tracks errors (or only 4 first errors)
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2019-03-28 19:30:51 +00:00
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bool m_testFootprints; // Test footprints against schematic
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2008-01-12 20:31:56 +00:00
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2020-05-24 14:54:26 +00:00
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PCB_EDIT_FRAME* m_editFrame; // The pcb frame editor which owns the board
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2020-05-16 19:12:56 +00:00
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BOARD* m_pcb;
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SHAPE_POLY_SET m_board_outlines; // The board outline including cutouts
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2020-05-18 20:09:36 +00:00
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bool m_board_outline_valid;
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2020-05-16 19:12:56 +00:00
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DIALOG_DRC* m_drcDialog;
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2008-01-12 20:31:56 +00:00
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2020-05-16 19:12:56 +00:00
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std::vector<DRC_ITEM*> m_unconnected; // list of unconnected pads
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std::vector<DRC_ITEM*> m_footprints; // list of footprint warnings
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2020-05-24 14:54:26 +00:00
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bool m_drcRun; // indicates DRC has been run at least once
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bool m_footprintsTested; // indicates footprints were tested in last run
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2020-05-16 19:12:56 +00:00
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std::vector<DRC_SELECTOR*> m_ruleSelectors;
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std::vector<DRC_RULE*> m_rules;
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2008-01-12 20:31:56 +00:00
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2020-05-29 20:23:08 +00:00
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// Temp variables for performance during a single DRC run
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//
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2020-05-18 00:20:16 +00:00
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// wxString's c'tor is surprisingly expensive, and in the world of DRC everything matters
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2020-05-29 20:23:08 +00:00
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//
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wxString m_msg;
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wxString m_clearanceSource;
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int m_largestClearance;
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2020-05-18 00:20:16 +00:00
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2020-05-29 20:23:08 +00:00
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private:
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2019-06-03 13:49:17 +00:00
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///> Sets up handlers for various events.
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void setTransitions() override;
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2008-01-12 20:31:56 +00:00
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/**
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2018-02-10 20:17:11 +00:00
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* Update needed pointers from the one pointer which is known not to change.
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2007-12-01 03:42:52 +00:00
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*/
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2011-09-23 13:57:12 +00:00
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void updatePointers();
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2008-01-12 20:31:56 +00:00
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2020-05-24 14:54:26 +00:00
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EDA_UNITS userUnits() const { return m_editFrame->GetUserUnits(); }
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2020-02-28 00:05:40 +00:00
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2017-03-03 15:04:58 +00:00
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/**
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2018-02-10 20:17:11 +00:00
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* Adds a DRC marker to the PCB through the COMMIT mechanism.
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2017-03-03 15:04:58 +00:00
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*/
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2020-05-18 00:20:16 +00:00
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void addMarkerToPcb( BOARD_COMMIT& aCommit, MARKER_PCB* aMarker );
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2020-02-28 00:05:40 +00:00
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2008-01-12 20:31:56 +00:00
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//-----<categorical group tests>-----------------------------------------
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2011-11-10 08:21:11 +00:00
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/**
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2018-02-10 20:17:11 +00:00
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* Perform the DRC on all tracks.
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*
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* This test can take a while, a progress bar can be displayed
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2015-07-08 07:33:11 +00:00
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* @param aActiveWindow = the active window ued as parent for the progress bar
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* @param aShowProgressBar = true to show a progress bar
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2011-11-11 07:00:51 +00:00
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* (Note: it is shown only if there are many tracks)
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2011-11-10 08:21:11 +00:00
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*/
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2020-05-18 00:20:16 +00:00
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void testTracks( BOARD_COMMIT& aCommit, wxWindow * aActiveWindow, bool aShowProgressBar );
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2008-01-12 20:31:56 +00:00
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2020-05-18 20:09:36 +00:00
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void testPadClearances( BOARD_COMMIT& aCommit );
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2018-04-14 14:58:01 +00:00
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2011-09-23 13:57:12 +00:00
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void testUnconnected();
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2007-12-01 03:42:52 +00:00
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2020-05-18 00:20:16 +00:00
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void testZones( BOARD_COMMIT& aCommit );
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2008-01-12 20:31:56 +00:00
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2020-05-18 00:20:16 +00:00
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void testCopperDrawItem( BOARD_COMMIT& aCommit, BOARD_ITEM* aDrawing );
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2018-08-27 13:50:50 +00:00
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2020-05-18 00:20:16 +00:00
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void testCopperTextAndGraphics( BOARD_COMMIT& aCommit );
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2014-08-13 15:47:02 +00:00
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2020-03-29 01:12:29 +00:00
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// Tests for items placed on disabled layers (causing false connections).
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2020-05-18 00:20:16 +00:00
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void testDisabledLayers( BOARD_COMMIT& aCommit );
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2020-03-29 01:12:29 +00:00
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2018-11-28 12:11:43 +00:00
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/**
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* Test that the board outline is contiguous and composed of valid elements
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*/
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2020-05-18 00:20:16 +00:00
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void testOutline( BOARD_COMMIT& aCommit );
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2018-11-28 12:11:43 +00:00
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2008-01-12 20:31:56 +00:00
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//-----<single "item" tests>-----------------------------------------
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2007-12-01 03:42:52 +00:00
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/**
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2018-02-10 20:17:11 +00:00
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* Test the clearance between aRefPad and other pads.
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*
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2007-12-01 03:42:52 +00:00
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* The pad list must be sorted by x coordinate.
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2018-02-10 20:17:11 +00:00
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*
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2018-05-16 07:20:04 +00:00
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* @param aRefPad is the pad to test
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* @param aStart is the first pad of the list to test against aRefPad
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* @param aEnd is the end of the list and is not included
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* @param x_limit is used to stop the test
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* (i.e. when the current pad pos X in list exceeds this limit, because the list
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* is sorted by X coordinate)
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2007-12-01 03:42:52 +00:00
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*/
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2020-05-18 00:20:16 +00:00
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bool doPadToPadsDrc( BOARD_COMMIT& aCommit, D_PAD* aRefPad, D_PAD** aStart, D_PAD** aEnd,
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int x_limit );
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2008-01-12 20:31:56 +00:00
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2007-12-01 03:42:52 +00:00
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/**
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2018-02-10 20:17:11 +00:00
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* Test the current segment.
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*
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2007-12-01 03:42:52 +00:00
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* @param aRefSeg The segment to test
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2019-05-31 02:30:28 +00:00
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* @param aStartIt the iterator to the first track to test
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* @param aEndIt the marker for the iterator end
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2019-03-19 16:46:46 +00:00
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* @param aTestZones true if should do copper zones test. This can be very time consumming
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2018-02-10 20:17:11 +00:00
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* @return bool - true if no problems, else false and m_currentMarker is
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2007-12-01 03:42:52 +00:00
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* filled in with the problem information.
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*/
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2020-05-18 00:20:16 +00:00
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void doTrackDrc( BOARD_COMMIT& aCommit, TRACK* aRefSeg, TRACKS::iterator aStartIt,
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TRACKS::iterator aEndIt, bool aTestZones );
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2017-03-16 17:09:33 +00:00
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2007-12-01 03:42:52 +00:00
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//-----<single tests>----------------------------------------------
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/**
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* @param aRefPad The reference pad to check
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* @param aPad Another pad to check against
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2020-04-26 10:30:32 +00:00
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* @param aMinClearance is the minimum allowed distance between the pads
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* @param aActual [out] it the actual distance (only guaranteed to be set for violations)
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* @return bool - true if clearance between aRefPad and aPad is >= aMinClearance, else false
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2007-12-01 03:42:52 +00:00
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*/
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2020-04-26 10:30:32 +00:00
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bool checkClearancePadToPad( D_PAD* aRefPad, D_PAD* aPad, int aMinClearance, int* aActual );
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2008-01-12 20:31:56 +00:00
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2007-12-01 03:42:52 +00:00
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/**
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2018-02-10 20:17:11 +00:00
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* Check the distance from a pad to segment. This function uses several
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2007-12-01 03:42:52 +00:00
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* instance variable not passed in:
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2010-09-18 17:55:08 +00:00
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* @param aPad Is the pad involved in the check
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* @param aSegmentWidth width of the segment to test
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* @param aMinDist Is the minimum clearance needed
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2020-04-24 18:56:44 +00:00
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* @param aActualDist [out] Is the actual clearance (only guarantted to be set on violations)
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2007-12-01 03:42:52 +00:00
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*
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2010-09-18 17:55:08 +00:00
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* @return true distance >= dist_min,
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* false if distance < dist_min
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2007-12-01 03:42:52 +00:00
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*/
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2020-04-26 10:30:32 +00:00
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bool checkClearanceSegmToPad( const SEG& seg, int segWidth, const D_PAD* pad,
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int minClearance, int* aActualDist );
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2008-01-12 20:31:56 +00:00
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2007-12-01 03:42:52 +00:00
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2008-01-12 20:31:56 +00:00
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2007-12-01 03:42:52 +00:00
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//-----</single tests>---------------------------------------------
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2008-01-12 20:31:56 +00:00
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2007-11-27 01:34:35 +00:00
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public:
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2020-05-18 16:11:57 +00:00
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/**
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* Load the DRC rules. Must be called after the netclasses have been read.
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*/
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2020-05-24 14:54:26 +00:00
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bool LoadRules();
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2020-05-18 16:11:57 +00:00
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2020-05-18 00:20:16 +00:00
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/**
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* Fetches a reasonable point for marking a violoation between two non-point objects.
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*/
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static wxPoint GetLocation( TRACK* aTrack, ZONE_CONTAINER* aConflictZone );
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static wxPoint GetLocation( TRACK* aTrack, const SEG& aConflictSeg );
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2007-12-01 03:42:52 +00:00
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/**
|
2018-02-10 20:17:11 +00:00
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* Open a dialog and prompts the user, then if a test run button is
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2007-12-03 05:14:51 +00:00
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* clicked, runs the test(s) and creates the MARKERS. The dialog is only
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* created if it is not already in existence.
|
2018-02-10 20:17:11 +00:00
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*
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2016-07-27 12:53:45 +00:00
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* @param aParent is the parent window for wxWidgets. Usually the PCB editor frame
|
2018-04-08 10:28:59 +00:00
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* but can be another dialog
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2016-07-28 12:07:35 +00:00
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* if aParent == NULL (default), the parent will be the PCB editor frame
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* and the dialog will be not modal (just float on parent
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* if aParent is specified, the dialog will be modal.
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2018-04-08 10:28:59 +00:00
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* The modal mode is mandatory if the dialog is created from another dialog, not
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2016-07-28 12:07:35 +00:00
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* from the PCB editor frame
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2007-12-01 03:42:52 +00:00
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*/
|
2019-06-03 13:49:17 +00:00
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void ShowDRCDialog( wxWindow* aParent );
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int ShowDRCDialog( const TOOL_EVENT& aEvent );
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2007-12-03 05:14:51 +00:00
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|
2020-03-08 15:55:14 +00:00
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/**
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* Check to see if the DRC dialog is currently shown
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*
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* @return true if the dialog is shown
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*/
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bool IsDRCDialogShown();
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|
2007-12-03 05:14:51 +00:00
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/**
|
2018-02-10 20:17:11 +00:00
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* Deletes this ui dialog box and zeros out its pointer to remember
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2007-12-04 18:23:38 +00:00
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* the state of the dialog's existence.
|
2018-02-10 20:17:11 +00:00
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*
|
2007-12-04 18:23:38 +00:00
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* @param aReason Indication of which button was clicked to cause the destruction.
|
2018-02-10 20:17:11 +00:00
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|
* if aReason == wxID_OK, design parameters values which can be entered from the dialog
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* will bbe saved in design parameters list
|
2007-12-03 05:14:51 +00:00
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*/
|
2016-07-28 12:07:35 +00:00
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void DestroyDRCDialog( int aReason );
|
2008-01-12 20:31:56 +00:00
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|
2007-12-01 05:37:44 +00:00
|
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|
/**
|
2018-02-10 20:17:11 +00:00
|
|
|
* Run all the tests specified with a previous call to
|
2007-12-01 05:37:44 +00:00
|
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|
* SetSettings()
|
2009-06-27 06:26:41 +00:00
|
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|
* @param aMessages = a wxTextControl where to display some activity messages. Can be NULL
|
2007-12-01 05:37:44 +00:00
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|
*/
|
2010-09-18 08:29:40 +00:00
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|
void RunTests( wxTextCtrl* aMessages = NULL );
|
2007-11-27 01:34:35 +00:00
|
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|
};
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|
2018-01-28 21:02:31 +00:00
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#endif // DRC_H
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