2017-03-22 13:43:10 +00:00
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/*
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* This program source code file is part of KICAD, a free EDA CAD application.
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*
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* Copyright (C) 2017 CERN
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* @author Tomasz Wlostowski <tomasz.wlostowski@cern.ch>
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*
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* This program is free software; you can redistribute it and/or
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* modify it under the terms of the GNU General Public License
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* as published by the Free Software Foundation; either version 2
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* of the License, or (at your option) any later version.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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* You should have received a copy of the GNU General Public License
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* along with this program; if not, you may find one here:
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* http://www.gnu.org/licenses/old-licenses/gpl-2.0.html
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* or you may search the http://www.gnu.org website for the version 2 license,
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* or you may write to the Free Software Foundation, Inc.,
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* 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301, USA
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*/
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#ifdef PROFILE
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#include <profile.h>
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#endif
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2017-11-15 17:33:06 +00:00
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#include <connectivity_data.h>
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2017-03-22 13:43:10 +00:00
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#include <connectivity_algo.h>
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#include <ratsnest_data.h>
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#ifdef USE_OPENMP
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#include <omp.h>
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#endif /* USE_OPENMP */
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CONNECTIVITY_DATA::CONNECTIVITY_DATA()
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{
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m_connAlgo.reset( new CN_CONNECTIVITY_ALGO );
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2018-01-06 05:02:28 +00:00
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m_progressReporter = nullptr;
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2017-03-22 13:43:10 +00:00
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}
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CONNECTIVITY_DATA::~CONNECTIVITY_DATA()
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{
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Clear();
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}
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bool CONNECTIVITY_DATA::Add( BOARD_ITEM* aItem )
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{
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m_connAlgo->Add( aItem );
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return true;
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}
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bool CONNECTIVITY_DATA::Remove( BOARD_ITEM* aItem )
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{
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m_connAlgo->Remove( aItem );
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return true;
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}
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bool CONNECTIVITY_DATA::Update( BOARD_ITEM* aItem )
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{
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m_connAlgo->Remove( aItem );
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m_connAlgo->Add( aItem );
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return true;
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}
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void CONNECTIVITY_DATA::Build( BOARD* aBoard )
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{
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m_connAlgo.reset( new CN_CONNECTIVITY_ALGO );
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m_connAlgo->Build( aBoard );
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RecalculateRatsnest();
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}
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void CONNECTIVITY_DATA::Build( const std::vector<BOARD_ITEM*>& aItems )
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{
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m_connAlgo.reset( new CN_CONNECTIVITY_ALGO );
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m_connAlgo->Build( aItems );
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RecalculateRatsnest();
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}
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void CONNECTIVITY_DATA::updateRatsnest()
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{
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int lastNet = m_connAlgo->NetCount();
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#ifdef PROFILE
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PROF_COUNTER rnUpdate( "update-ratsnest" );
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#endif
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int nDirty = 0;
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int i;
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#ifdef USE_OPENMP
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2017-06-23 11:56:28 +00:00
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#pragma omp parallel shared(lastNet) private(i)
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2017-03-22 13:43:10 +00:00
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{
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2017-06-23 11:56:28 +00:00
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#pragma omp for schedule(guided, 1)
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2017-03-22 13:43:10 +00:00
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#else /* USE_OPENMP */
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{
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#endif
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// Start with net number 1, as 0 stands for not connected
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for( i = 1; i < lastNet; ++i )
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{
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if( m_nets[i]->IsDirty() )
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{
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m_nets[i]->Update();
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nDirty++;
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}
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}
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} /* end of parallel section */
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2017-06-23 11:56:28 +00:00
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2017-03-22 13:43:10 +00:00
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#ifdef PROFILE
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rnUpdate.Show();
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#endif /* PROFILE */
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}
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2017-09-23 09:20:10 +00:00
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void CONNECTIVITY_DATA::addRatsnestCluster( const std::shared_ptr<CN_CLUSTER>& aCluster )
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2017-03-22 13:43:10 +00:00
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{
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auto rnNet = m_nets[ aCluster->OriginNet() ];
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rnNet->AddCluster( aCluster );
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}
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void CONNECTIVITY_DATA::RecalculateRatsnest()
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{
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2017-04-18 15:32:05 +00:00
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m_connAlgo->PropagateNets();
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2017-03-22 13:43:10 +00:00
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int lastNet = m_connAlgo->NetCount();
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if( lastNet >= (int) m_nets.size() )
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{
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unsigned int prevSize = m_nets.size();
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m_nets.resize( lastNet + 1 );
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for( unsigned int i = prevSize; i < m_nets.size(); i++ )
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m_nets[i] = new RN_NET;
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}
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auto clusters = m_connAlgo->GetClusters();
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int dirtyNets = 0;
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for( int net = 0; net < lastNet; net++ )
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2017-06-30 11:40:20 +00:00
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{
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2017-03-22 13:43:10 +00:00
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if( m_connAlgo->IsNetDirty( net ) )
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{
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m_nets[net]->Clear();
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dirtyNets++;
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}
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2017-06-30 11:40:20 +00:00
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}
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2017-03-22 13:51:07 +00:00
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2017-03-22 13:43:10 +00:00
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for( auto c : clusters )
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{
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int net = c->OriginNet();
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if( m_connAlgo->IsNetDirty( net ) )
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{
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addRatsnestCluster( c );
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}
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}
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m_connAlgo->ClearDirtyFlags();
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updateRatsnest();
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}
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2017-03-22 13:51:07 +00:00
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void CONNECTIVITY_DATA::BlockRatsnestItems( const std::vector<BOARD_ITEM*>& aItems )
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2017-03-22 13:43:10 +00:00
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{
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std::vector<BOARD_CONNECTED_ITEM*> citems;
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for( auto item : aItems )
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{
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if( item->Type() == PCB_MODULE_T )
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{
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2017-04-25 09:06:24 +00:00
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for( auto pad : static_cast<MODULE*>(item)->Pads() )
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2017-03-22 13:43:10 +00:00
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citems.push_back( pad );
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}
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else
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{
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citems.push_back( static_cast<BOARD_CONNECTED_ITEM*>(item) );
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}
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}
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for( auto item : citems )
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{
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2017-09-28 16:38:54 +00:00
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if ( m_connAlgo->ItemExists( item ) )
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2017-03-22 13:43:10 +00:00
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{
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2017-09-28 16:38:54 +00:00
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auto& entry = m_connAlgo->ItemEntry( item );
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for( auto cnItem : entry.GetItems() )
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{
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for( auto anchor : cnItem->Anchors() )
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anchor->SetNoLine( true );
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}
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2017-03-22 13:43:10 +00:00
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}
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}
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}
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int CONNECTIVITY_DATA::GetNetCount() const
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{
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return m_connAlgo->NetCount();
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}
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void CONNECTIVITY_DATA::FindIsolatedCopperIslands( ZONE_CONTAINER* aZone,
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std::vector<int>& aIslands )
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{
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m_connAlgo->FindIsolatedCopperIslands( aZone, aIslands );
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}
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2017-11-23 16:20:27 +00:00
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void CONNECTIVITY_DATA::FindIsolatedCopperIslands( std::vector<CN_ZONE_ISOLATED_ISLAND_LIST>& aZones )
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{
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m_connAlgo->FindIsolatedCopperIslands( aZones );
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}
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2017-03-22 13:43:10 +00:00
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void CONNECTIVITY_DATA::ComputeDynamicRatsnest( const std::vector<BOARD_ITEM*>& aItems )
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{
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m_dynamicConnectivity.reset( new CONNECTIVITY_DATA );
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m_dynamicConnectivity->Build( aItems );
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m_dynamicRatsnest.clear();
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2017-03-22 13:51:07 +00:00
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BlockRatsnestItems( aItems );
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2017-03-22 13:43:10 +00:00
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for( unsigned int nc = 1; nc < m_dynamicConnectivity->m_nets.size(); nc++ )
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{
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auto dynNet = m_dynamicConnectivity->m_nets[nc];
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if( dynNet->GetNodeCount() != 0 )
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{
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auto ourNet = m_nets[nc];
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CN_ANCHOR_PTR nodeA, nodeB;
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if( ourNet->NearestBicoloredPair( *dynNet, nodeA, nodeB ) )
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{
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RN_DYNAMIC_LINE l;
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l.a = nodeA->Pos();
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l.b = nodeB->Pos();
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l.netCode = nc;
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m_dynamicRatsnest.push_back( l );
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}
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}
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}
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for( auto net : m_dynamicConnectivity->m_nets )
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{
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if( !net )
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continue;
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const auto& edges = net->GetUnconnected();
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if( edges.empty() )
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continue;
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for( const auto& edge : edges )
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{
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const auto& nodeA = edge.GetSourceNode();
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const auto& nodeB = edge.GetTargetNode();
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RN_DYNAMIC_LINE l;
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l.a = nodeA->Pos();
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l.b = nodeB->Pos();
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l.netCode = 0;
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m_dynamicRatsnest.push_back( l );
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}
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}
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}
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void CONNECTIVITY_DATA::ClearDynamicRatsnest()
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{
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2017-09-23 09:20:10 +00:00
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m_connAlgo->ForEachAnchor( [] ( CN_ANCHOR& anchor ) { anchor.SetNoLine( false ); } );
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2017-08-01 13:20:40 +00:00
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HideDynamicRatsnest();
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}
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2017-03-28 16:30:49 +00:00
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2017-08-01 13:20:40 +00:00
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void CONNECTIVITY_DATA::HideDynamicRatsnest()
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{
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2017-03-22 13:43:10 +00:00
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m_dynamicConnectivity.reset();
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m_dynamicRatsnest.clear();
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}
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void CONNECTIVITY_DATA::PropagateNets()
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{
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m_connAlgo->PropagateNets();
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}
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unsigned int CONNECTIVITY_DATA::GetUnconnectedCount() const
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{
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unsigned int unconnected = 0;
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for( auto net : m_nets )
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{
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if( !net )
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continue;
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const auto& edges = net->GetUnconnected();
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if( edges.empty() )
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continue;
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unconnected += edges.size();
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}
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return unconnected;
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}
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void CONNECTIVITY_DATA::Clear()
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{
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for( auto net : m_nets )
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delete net;
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m_nets.clear();
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}
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2017-11-15 17:33:06 +00:00
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const std::vector<BOARD_CONNECTED_ITEM*> CONNECTIVITY_DATA::GetConnectedItems(
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2017-03-22 13:43:10 +00:00
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const BOARD_CONNECTED_ITEM* aItem,
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const KICAD_T aTypes[] ) const
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{
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2017-11-15 17:33:06 +00:00
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std::vector<BOARD_CONNECTED_ITEM*> rv;
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2017-03-22 13:51:07 +00:00
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const auto clusters = m_connAlgo->SearchClusters( CN_CONNECTIVITY_ALGO::CSM_CONNECTIVITY_CHECK,
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aTypes, aItem->GetNetCode() );
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2017-03-22 13:43:10 +00:00
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2017-03-22 13:51:07 +00:00
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for( auto cl : clusters )
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2017-06-23 11:56:28 +00:00
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{
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2017-03-22 13:51:07 +00:00
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if( cl->Contains( aItem ) )
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2017-03-22 13:43:10 +00:00
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{
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2017-03-22 13:51:07 +00:00
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for( const auto item : *cl )
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2017-07-21 09:40:26 +00:00
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{
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if( item->Valid() )
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rv.push_back( item->Parent() );
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}
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2017-03-22 13:43:10 +00:00
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}
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2017-06-23 11:56:28 +00:00
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}
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2017-03-22 13:51:07 +00:00
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2017-03-22 13:43:10 +00:00
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return rv;
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}
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2017-11-15 17:33:06 +00:00
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const std::vector<BOARD_CONNECTED_ITEM*> CONNECTIVITY_DATA::GetNetItems( int aNetCode,
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2017-03-22 13:43:10 +00:00
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const KICAD_T aTypes[] ) const
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{
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2017-06-23 11:56:28 +00:00
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std::set<BOARD_CONNECTED_ITEM*> items;
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2017-11-15 17:33:06 +00:00
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std::vector<BOARD_CONNECTED_ITEM*> rv;
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2017-05-04 22:43:43 +00:00
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2017-09-23 09:20:10 +00:00
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m_connAlgo->ForEachItem( [&items, aNetCode, &aTypes] ( CN_ITEM& aItem )
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2017-07-17 08:19:36 +00:00
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{
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2017-09-23 09:20:10 +00:00
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if( aItem.Valid() && ( aItem.Net() == aNetCode ) )
|
2017-07-17 08:19:36 +00:00
|
|
|
{
|
2017-09-23 09:20:10 +00:00
|
|
|
KICAD_T itemType = aItem.Parent()->Type();
|
2017-07-17 08:19:36 +00:00
|
|
|
|
|
|
|
for( int i = 0; aTypes[i] > 0; ++i )
|
|
|
|
{
|
|
|
|
wxASSERT( aTypes[i] < MAX_STRUCT_TYPE_ID );
|
|
|
|
|
|
|
|
if( itemType == aTypes[i] )
|
|
|
|
{
|
2017-09-23 09:20:10 +00:00
|
|
|
items.insert( aItem.Parent() );
|
2017-07-17 08:19:36 +00:00
|
|
|
break;
|
|
|
|
}
|
|
|
|
}
|
|
|
|
}
|
2017-05-04 22:43:43 +00:00
|
|
|
} );
|
2017-03-22 13:59:30 +00:00
|
|
|
|
2017-11-15 17:33:06 +00:00
|
|
|
std::copy( items.begin(), items.end(), std::back_inserter( rv ) );
|
2017-05-04 22:43:43 +00:00
|
|
|
|
|
|
|
return rv;
|
2017-03-22 13:43:10 +00:00
|
|
|
}
|
|
|
|
|
2017-03-22 13:51:07 +00:00
|
|
|
|
2017-03-22 13:43:10 +00:00
|
|
|
bool CONNECTIVITY_DATA::CheckConnectivity( std::vector<CN_DISJOINT_NET_ENTRY>& aReport )
|
|
|
|
{
|
|
|
|
RecalculateRatsnest();
|
|
|
|
|
2017-03-22 13:51:07 +00:00
|
|
|
for( auto net : m_nets )
|
2017-03-22 13:43:10 +00:00
|
|
|
{
|
2017-03-22 13:51:07 +00:00
|
|
|
if( net )
|
2017-03-22 13:43:10 +00:00
|
|
|
{
|
2017-03-22 13:51:07 +00:00
|
|
|
for( const auto& edge : net->GetEdges() )
|
2017-03-22 13:43:10 +00:00
|
|
|
{
|
|
|
|
CN_DISJOINT_NET_ENTRY ent;
|
|
|
|
ent.net = edge.GetSourceNode()->Parent()->GetNetCode();
|
2017-03-22 13:51:07 +00:00
|
|
|
ent.a = edge.GetSourceNode()->Parent();
|
|
|
|
ent.b = edge.GetTargetNode()->Parent();
|
2017-03-22 13:43:10 +00:00
|
|
|
ent.anchorA = edge.GetSourceNode()->Pos();
|
|
|
|
ent.anchorB = edge.GetTargetNode()->Pos();
|
|
|
|
aReport.push_back( ent );
|
|
|
|
}
|
|
|
|
}
|
|
|
|
}
|
2017-03-22 13:51:07 +00:00
|
|
|
|
2017-03-22 13:43:10 +00:00
|
|
|
return aReport.empty();
|
|
|
|
}
|
2017-03-22 13:51:07 +00:00
|
|
|
|
|
|
|
|
2017-06-23 11:56:28 +00:00
|
|
|
const std::vector<TRACK*> CONNECTIVITY_DATA::GetConnectedTracks( const BOARD_CONNECTED_ITEM* aItem )
|
2017-03-22 13:51:07 +00:00
|
|
|
const
|
|
|
|
{
|
|
|
|
auto& entry = m_connAlgo->ItemEntry( aItem );
|
|
|
|
|
|
|
|
std::set<TRACK*> tracks;
|
|
|
|
std::vector<TRACK*> rv;
|
|
|
|
|
|
|
|
for( auto citem : entry.GetItems() )
|
|
|
|
{
|
|
|
|
for( auto connected : citem->ConnectedItems() )
|
|
|
|
{
|
2017-07-21 09:40:26 +00:00
|
|
|
if( connected->Valid() && ( connected->Parent()->Type() == PCB_TRACE_T || connected->Parent()->Type() == PCB_VIA_T ) )
|
2017-03-22 13:51:07 +00:00
|
|
|
tracks.insert( static_cast<TRACK*> ( connected->Parent() ) );
|
|
|
|
}
|
|
|
|
}
|
|
|
|
|
|
|
|
std::copy( tracks.begin(), tracks.end(), std::back_inserter( rv ) );
|
|
|
|
return rv;
|
|
|
|
}
|
|
|
|
|
|
|
|
|
2017-06-23 11:56:28 +00:00
|
|
|
const std::vector<D_PAD*> CONNECTIVITY_DATA::GetConnectedPads( const BOARD_CONNECTED_ITEM* aItem )
|
2017-03-22 13:51:07 +00:00
|
|
|
const
|
|
|
|
{
|
|
|
|
auto& entry = m_connAlgo->ItemEntry( aItem );
|
|
|
|
|
|
|
|
std::set<D_PAD*> pads;
|
|
|
|
std::vector<D_PAD*> rv;
|
|
|
|
|
|
|
|
for( auto citem : entry.GetItems() )
|
|
|
|
{
|
|
|
|
for( auto connected : citem->ConnectedItems() )
|
|
|
|
{
|
2017-06-22 14:24:07 +00:00
|
|
|
if( connected->Valid() && connected->Parent()->Type() == PCB_PAD_T )
|
2017-03-22 13:51:07 +00:00
|
|
|
pads.insert( static_cast<D_PAD*> ( connected->Parent() ) );
|
|
|
|
}
|
|
|
|
}
|
|
|
|
|
|
|
|
std::copy( pads.begin(), pads.end(), std::back_inserter( rv ) );
|
|
|
|
return rv;
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
|
|
unsigned int CONNECTIVITY_DATA::GetNodeCount( int aNet ) const
|
|
|
|
{
|
2017-06-23 12:41:51 +00:00
|
|
|
int sum = 0;
|
|
|
|
|
2017-06-30 11:40:20 +00:00
|
|
|
if( aNet < 0 ) // Node count for all nets
|
2017-06-23 12:41:51 +00:00
|
|
|
{
|
2017-06-23 17:22:44 +00:00
|
|
|
for( const auto& net : m_nets )
|
2017-06-23 12:41:51 +00:00
|
|
|
sum += net->GetNodeCount();
|
|
|
|
}
|
2017-06-23 17:22:44 +00:00
|
|
|
else if( aNet < (int) m_nets.size() )
|
2017-06-23 12:41:51 +00:00
|
|
|
{
|
|
|
|
sum = m_nets[aNet]->GetNodeCount();
|
|
|
|
}
|
|
|
|
|
|
|
|
return sum;
|
2017-03-22 13:51:07 +00:00
|
|
|
}
|
|
|
|
|
|
|
|
|
|
|
|
unsigned int CONNECTIVITY_DATA::GetPadCount( int aNet ) const
|
|
|
|
{
|
2017-04-18 15:32:05 +00:00
|
|
|
int n = 0;
|
|
|
|
|
2018-05-21 00:06:01 +00:00
|
|
|
for( auto pad : m_connAlgo->ItemList() )
|
2017-04-18 15:32:05 +00:00
|
|
|
{
|
2018-05-21 00:06:01 +00:00
|
|
|
if( !pad->Valid() || pad->Parent()->Type() != PCB_PAD_T)
|
2017-07-21 09:40:26 +00:00
|
|
|
continue;
|
|
|
|
|
2017-04-18 15:32:05 +00:00
|
|
|
auto dpad = static_cast<D_PAD*>( pad->Parent() );
|
2017-06-23 11:56:28 +00:00
|
|
|
|
|
|
|
if( aNet < 0 || aNet == dpad->GetNetCode() )
|
2017-04-18 15:32:05 +00:00
|
|
|
{
|
|
|
|
n++;
|
|
|
|
}
|
|
|
|
}
|
|
|
|
|
|
|
|
return n;
|
2017-03-22 13:51:07 +00:00
|
|
|
}
|
|
|
|
|
|
|
|
|
|
|
|
const std::vector<VECTOR2I> CONNECTIVITY_DATA::NearestUnconnectedTargets(
|
|
|
|
const BOARD_CONNECTED_ITEM* aRef,
|
|
|
|
const VECTOR2I& aPos,
|
|
|
|
int aNet )
|
|
|
|
{
|
|
|
|
CN_CLUSTER_PTR refCluster;
|
|
|
|
int refNet = -1;
|
|
|
|
|
|
|
|
if( aRef )
|
|
|
|
refNet = aRef->GetNetCode();
|
|
|
|
|
|
|
|
if( aNet >= 0 )
|
|
|
|
refNet = aNet;
|
|
|
|
|
|
|
|
if( aRef )
|
|
|
|
{
|
|
|
|
for( auto cl : m_connAlgo->GetClusters() )
|
|
|
|
{
|
|
|
|
if( cl->Contains( aRef ) )
|
|
|
|
{
|
|
|
|
refCluster = cl;
|
|
|
|
break;
|
|
|
|
}
|
|
|
|
}
|
|
|
|
}
|
|
|
|
|
|
|
|
std::set <VECTOR2I> anchors;
|
|
|
|
|
|
|
|
for( auto cl : m_connAlgo->GetClusters() )
|
|
|
|
{
|
|
|
|
if( cl != refCluster )
|
|
|
|
{
|
|
|
|
for( auto item : *cl )
|
|
|
|
{
|
2017-07-21 09:40:26 +00:00
|
|
|
if( item->Valid() && item->Parent()->GetNetCode() == refNet
|
2017-03-22 13:51:07 +00:00
|
|
|
&& item->Parent()->Type() != PCB_ZONE_AREA_T )
|
2017-06-23 11:56:28 +00:00
|
|
|
{
|
2017-03-22 13:51:07 +00:00
|
|
|
for( auto anchor : item->Anchors() )
|
|
|
|
{
|
|
|
|
anchors.insert( anchor->Pos() );
|
|
|
|
}
|
2017-06-23 11:56:28 +00:00
|
|
|
}
|
2017-03-22 13:51:07 +00:00
|
|
|
}
|
|
|
|
}
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
|
|
std::vector<VECTOR2I> rv;
|
|
|
|
|
|
|
|
std::copy( anchors.begin(), anchors.end(), std::back_inserter( rv ) );
|
|
|
|
std::sort( rv.begin(), rv.end(), [aPos] ( const VECTOR2I& a, const VECTOR2I& b )
|
|
|
|
{
|
|
|
|
auto da = (a - aPos).EuclideanNorm();
|
|
|
|
auto db = (b - aPos).EuclideanNorm();
|
|
|
|
|
|
|
|
return da < db;
|
|
|
|
} );
|
|
|
|
|
|
|
|
return rv;
|
|
|
|
}
|
2017-03-22 15:47:15 +00:00
|
|
|
|
2017-06-23 11:56:28 +00:00
|
|
|
|
2017-03-22 15:47:15 +00:00
|
|
|
void CONNECTIVITY_DATA::GetUnconnectedEdges( std::vector<CN_EDGE>& aEdges) const
|
|
|
|
{
|
2017-06-23 11:56:28 +00:00
|
|
|
for( auto rnNet : m_nets )
|
2017-03-22 15:47:15 +00:00
|
|
|
{
|
2017-06-23 11:56:28 +00:00
|
|
|
if( rnNet )
|
2017-03-22 15:47:15 +00:00
|
|
|
{
|
|
|
|
for( auto edge : rnNet->GetEdges() )
|
|
|
|
{
|
|
|
|
aEdges.push_back( edge );
|
|
|
|
}
|
|
|
|
}
|
|
|
|
}
|
|
|
|
}
|
2017-06-22 14:24:07 +00:00
|
|
|
|
2017-06-23 11:56:28 +00:00
|
|
|
|
|
|
|
const std::vector<BOARD_CONNECTED_ITEM*> CONNECTIVITY_DATA::GetConnectedItems(
|
|
|
|
const BOARD_CONNECTED_ITEM* aItem, const VECTOR2I& aAnchor, KICAD_T aTypes[] )
|
2017-06-22 14:24:07 +00:00
|
|
|
{
|
|
|
|
auto& entry = m_connAlgo->ItemEntry( aItem );
|
|
|
|
std::vector<BOARD_CONNECTED_ITEM* > rv;
|
|
|
|
|
|
|
|
for( auto cnItem : entry.GetItems() )
|
|
|
|
{
|
|
|
|
for( auto anchor : cnItem->Anchors() )
|
|
|
|
{
|
2017-06-23 11:56:28 +00:00
|
|
|
if( anchor->Pos() == aAnchor )
|
2017-06-22 14:24:07 +00:00
|
|
|
{
|
|
|
|
for( int i = 0; aTypes[i] > 0; i++ )
|
|
|
|
{
|
2017-07-21 09:40:26 +00:00
|
|
|
if( cnItem->Valid() && cnItem->Parent()->Type() == aTypes[i] )
|
2017-06-22 14:24:07 +00:00
|
|
|
{
|
|
|
|
rv.push_back( cnItem->Parent() );
|
|
|
|
break;
|
|
|
|
}
|
|
|
|
}
|
|
|
|
}
|
|
|
|
}
|
|
|
|
}
|
|
|
|
|
|
|
|
return rv;
|
|
|
|
}
|
2017-06-29 22:45:50 +00:00
|
|
|
|
2017-07-17 08:21:36 +00:00
|
|
|
|
2017-06-29 22:45:50 +00:00
|
|
|
RN_NET* CONNECTIVITY_DATA::GetRatsnestForNet( int aNet )
|
|
|
|
{
|
2017-07-17 08:21:36 +00:00
|
|
|
if ( aNet < 0 || aNet >= (int) m_nets.size() )
|
2017-06-29 22:45:50 +00:00
|
|
|
{
|
|
|
|
return nullptr;
|
|
|
|
}
|
2017-07-17 08:21:36 +00:00
|
|
|
|
2017-06-29 22:45:50 +00:00
|
|
|
return m_nets[ aNet ];
|
|
|
|
}
|
2017-07-02 00:05:42 +00:00
|
|
|
|
2017-07-17 08:21:36 +00:00
|
|
|
|
2017-07-02 00:05:42 +00:00
|
|
|
void CONNECTIVITY_DATA::MarkItemNetAsDirty( BOARD_ITEM *aItem )
|
|
|
|
{
|
|
|
|
if (aItem->Type() == PCB_MODULE_T)
|
|
|
|
{
|
|
|
|
for ( auto pad : static_cast<MODULE*>( aItem )->Pads() )
|
|
|
|
{
|
|
|
|
m_connAlgo->MarkNetAsDirty( pad->GetNetCode() );
|
|
|
|
}
|
|
|
|
}
|
|
|
|
if (aItem->IsConnected() )
|
|
|
|
{
|
|
|
|
m_connAlgo->MarkNetAsDirty( static_cast<BOARD_CONNECTED_ITEM*>( aItem )->GetNetCode() );
|
|
|
|
}
|
|
|
|
}
|
2017-11-23 16:20:27 +00:00
|
|
|
|
|
|
|
void CONNECTIVITY_DATA::SetProgressReporter( PROGRESS_REPORTER* aReporter )
|
|
|
|
{
|
|
|
|
m_progressReporter = aReporter;
|
|
|
|
m_connAlgo->SetProgressReporter( m_progressReporter );
|
|
|
|
}
|