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fixed performance regression in DRC clearance test

This commit is contained in:
Tomasz Włostowski 2017-04-26 21:52:17 +02:00
parent 2c68786fa8
commit 56928647ef
1 changed files with 3 additions and 1 deletions
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4
pcbnew/drc_clearance_test_functions.cpp
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@ -274,9 +274,11 @@ bool DRC::doTrackDrc( TRACK* aRefSeg, TRACK* aStart, bool testPads )
{
unsigned pad_count = m_pcb->GetPadCount();
auto pads = m_pcb->GetPads();
for( unsigned ii = 0; ii<pad_count; ++ii )
{
D_PAD* pad = m_pcb->GetPad( ii );
D_PAD* pad = pads[ii];
/* No problem if pads are on an other layer,
* But if a drill hole exists (a pad on a single layer can have a hole!)