Check for zone-zone overlap
Instead of just checking for the zone outline, we adjust to check the
full fill area of the zones for intersection and overlaps
(cherry picked from commit 954b265839)
This commit is contained in:
Seth Hillbrand
parent
90d1695bbc
commit
cadea90109
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@ -364,6 +364,14 @@ public:
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return A + ( B - A ) / 2;
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return A + ( B - A ) / 2;
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}
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}
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bool operator<( const SEG& aSeg ) const
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{
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if( A == aSeg.A )
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return B < aSeg.B;
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return A < aSeg.A;
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}
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private:
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private:
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bool ccw( const VECTOR2I& aA, const VECTOR2I& aB, const VECTOR2I &aC ) const;
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bool ccw( const VECTOR2I& aA, const VECTOR2I& aB, const VECTOR2I &aC ) const;
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@ -836,6 +836,11 @@ public:
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return ( t1.m_Pos != t2.m_Pos || t1.m_Size != t2.m_Size );
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return ( t1.m_Pos != t2.m_Pos || t1.m_Size != t2.m_Size );
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}
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}
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const bool IsValid() const
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{
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return m_init;
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}
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private:
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private:
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Vec m_Pos; // Rectangle Origin
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Vec m_Pos; // Rectangle Origin
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Vec m_Size; // Rectangle Size
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Vec m_Size; // Rectangle Size
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@ -28,6 +28,7 @@
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#include <pcb_shape.h>
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#include <pcb_shape.h>
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#include <pad.h>
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#include <pad.h>
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#include <pcb_track.h>
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#include <pcb_track.h>
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#include <thread_pool.h>
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#include <zone.h>
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#include <zone.h>
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#include <geometry/seg.h>
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#include <geometry/seg.h>
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@ -41,6 +42,8 @@
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#include <drc/drc_test_provider_clearance_base.h>
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#include <drc/drc_test_provider_clearance_base.h>
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#include <pcb_dimension.h>
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#include <pcb_dimension.h>
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#include <future>
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/*
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/*
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Copper clearance test. Checks all copper items (pads, vias, tracks, drawings, zones) for their
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Copper clearance test. Checks all copper items (pads, vias, tracks, drawings, zones) for their
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electrical clearance.
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electrical clearance.
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@ -993,19 +996,81 @@ void DRC_TEST_PROVIDER_COPPER_CLEARANCE::testZonesToZones()
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bool testClearance = !m_drcEngine->IsErrorLimitExceeded( DRCE_CLEARANCE );
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bool testClearance = !m_drcEngine->IsErrorLimitExceeded( DRCE_CLEARANCE );
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bool testIntersects = !m_drcEngine->IsErrorLimitExceeded( DRCE_ZONES_INTERSECT );
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bool testIntersects = !m_drcEngine->IsErrorLimitExceeded( DRCE_ZONES_INTERSECT );
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SHAPE_POLY_SET buffer;
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SHAPE_POLY_SET* boardOutline = nullptr;
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DRC_CONSTRAINT constraint;
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DRC_CONSTRAINT constraint;
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int zone2zoneClearance;
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bool cancelled = false;
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std::vector<std::map<PCB_LAYER_ID, std::vector<SEG>>> poly_segments;
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if( m_board->GetBoardPolygonOutlines( buffer ) )
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poly_segments.resize( m_board->m_DRCCopperZones.size() );
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boardOutline = &buffer;
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// Contains the index for zoneA, zoneB, the conflict point, the actual clearance, the required clearance, and the layer
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using report_data = std::tuple<int, int, VECTOR2I, int, int, PCB_LAYER_ID>;
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const int invalid_zone = -1;
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std::vector<std::future<report_data>> futures;
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thread_pool& tp = GetKiCadThreadPool();
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auto checkZones = [testClearance, testIntersects, &poly_segments, &cancelled, invalid_zone]
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( int zoneA, int zoneB,
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int zone2zoneClearance, PCB_LAYER_ID layer ) -> report_data
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{
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// Iterate through all the segments of refSmoothedPoly
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std::map<VECTOR2I, int> conflictPoints;
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std::vector<SEG>& refSegments = poly_segments[zoneA][layer];
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std::vector<SEG>& testSegments = poly_segments[zoneB][layer];
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bool reported = false;
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auto invalid_result = std::make_tuple( invalid_zone, invalid_zone, VECTOR2I(), 0, 0, F_Cu );
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for( SEG& refSegment : refSegments )
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{
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int ax1 = refSegment.A.x;
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int ay1 = refSegment.A.y;
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int ax2 = refSegment.B.x;
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int ay2 = refSegment.B.y;
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// Iterate through all the segments in smoothed_polys[ia2]
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for( SEG& testSegment : testSegments )
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{
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// Build test segment
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VECTOR2I pt;
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int bx1 = testSegment.A.x;
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int by1 = testSegment.A.y;
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int bx2 = testSegment.B.x;
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int by2 = testSegment.B.y;
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// We have ensured that the A segment starts before the B segment, so if the
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// A segment ends before the B segment starts, we can skip to the next A
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if( ax2 < bx1 )
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break;
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int d = GetClearanceBetweenSegments( bx1, by1, bx2, by2, 0,
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ax1, ay1, ax2, ay2, 0,
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zone2zoneClearance, &pt.x, &pt.y );
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if( d < zone2zoneClearance )
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{
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if( d == 0 && testIntersects )
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reported = true;
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else if( testClearance )
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reported = true;
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if( reported )
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return std::make_tuple( zoneA, zoneB, pt, d, zone2zoneClearance, layer );
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}
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if( cancelled )
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return invalid_result;
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}
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}
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return invalid_result;
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};
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for( int layer_id = F_Cu; layer_id <= B_Cu; ++layer_id )
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for( int layer_id = F_Cu; layer_id <= B_Cu; ++layer_id )
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{
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{
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PCB_LAYER_ID layer = static_cast<PCB_LAYER_ID>( layer_id );
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PCB_LAYER_ID layer = static_cast<PCB_LAYER_ID>( layer_id );
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std::vector<SHAPE_POLY_SET> smoothed_polys;
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int zone2zoneClearance;
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smoothed_polys.resize( m_board->m_DRCCopperZones.size() );
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// Skip over layers not used on the current board
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// Skip over layers not used on the current board
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if( !m_board->IsLayerEnabled( layer ) )
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if( !m_board->IsLayerEnabled( layer ) )
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@ -1015,12 +1080,30 @@ void DRC_TEST_PROVIDER_COPPER_CLEARANCE::testZonesToZones()
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{
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{
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if( m_board->m_DRCCopperZones[ii]->IsOnLayer( layer ) )
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if( m_board->m_DRCCopperZones[ii]->IsOnLayer( layer ) )
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{
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{
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m_board->m_DRCCopperZones[ii]->BuildSmoothedPoly( smoothed_polys[ii], layer,
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SHAPE_POLY_SET poly =
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boardOutline );
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*m_board->m_DRCCopperZones[ii]->GetFilledPolysList( layer );
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std::vector<SEG>& poly_segs = poly_segments[ii][layer];
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poly.Fracture( SHAPE_POLY_SET::PM_FAST );
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poly.BuildBBoxCaches();
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poly_segs.reserve( poly.FullPointCount() );
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for( auto it = poly.IterateSegmentsWithHoles(); it; it++ )
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{
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SEG seg = *it;
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if( seg.A.x > seg.B.x )
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seg.Reverse();
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poly_segs.push_back( seg );
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}
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std::sort( poly_segs.begin(), poly_segs.end() );
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}
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}
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}
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}
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// iterate through all areas
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std::vector<std::pair<int, int>> zonePairs;
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for( size_t ia = 0; ia < m_board->m_DRCCopperZones.size(); ia++ )
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for( size_t ia = 0; ia < m_board->m_DRCCopperZones.size(); ia++ )
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{
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{
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if( !reportProgress( layer_id * m_board->m_DRCCopperZones.size() + ia,
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if( !reportProgress( layer_id * m_board->m_DRCCopperZones.size() + ia,
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@ -1046,102 +1129,62 @@ void DRC_TEST_PROVIDER_COPPER_CLEARANCE::testZonesToZones()
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if( zoneA->GetNetCode() == zoneB->GetNetCode() && zoneA->GetNetCode() >= 0 )
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if( zoneA->GetNetCode() == zoneB->GetNetCode() && zoneA->GetNetCode() >= 0 )
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continue;
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continue;
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// test for different priorities
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if( zoneA->GetAssignedPriority() != zoneB->GetAssignedPriority() )
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continue;
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// rule areas may overlap at will
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// rule areas may overlap at will
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if( zoneA->GetIsRuleArea() || zoneB->GetIsRuleArea() )
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if( zoneA->GetIsRuleArea() || zoneB->GetIsRuleArea() )
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continue;
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continue;
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// Examine a candidate zone: compare zoneB to zoneA
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// Examine a candidate zone: compare zoneB to zoneA
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SHAPE_POLY_SET* polyA = m_board->m_DRCCopperZones[ia]->GetFill( layer );
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SHAPE_POLY_SET* polyB = m_board->m_DRCCopperZones[ia2]->GetFill( layer );
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if( !polyA->BBoxFromCaches().Intersects( polyB->BBoxFromCaches() ) )
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continue;
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// Get clearance used in zone to zone test.
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// Get clearance used in zone to zone test.
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constraint = m_drcEngine->EvalRules( CLEARANCE_CONSTRAINT, zoneA, zoneB, layer );
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constraint = m_drcEngine->EvalRules( CLEARANCE_CONSTRAINT, zoneA, zoneB, layer );
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zone2zoneClearance = constraint.GetValue().Min();
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zone2zoneClearance = constraint.GetValue().Min();
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if( constraint.GetSeverity() == RPT_SEVERITY_IGNORE )
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if( constraint.GetSeverity() == RPT_SEVERITY_IGNORE || zone2zoneClearance <= 0 )
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continue;
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continue;
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if( testIntersects )
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futures.push_back( tp.submit( checkZones, ia, ia2, zone2zoneClearance, layer ) );
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{
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// test for some corners of zoneA inside zoneB
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for( auto it = smoothed_polys[ia].IterateWithHoles(); it; it++ )
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{
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VECTOR2I currentVertex = *it;
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wxPoint pt( currentVertex.x, currentVertex.y );
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if( smoothed_polys[ia2].Contains( currentVertex ) )
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{
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std::shared_ptr<DRC_ITEM> drce = DRC_ITEM::Create( DRCE_ZONES_INTERSECT );
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drce->SetItems( zoneA, zoneB );
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drce->SetViolatingRule( constraint.GetParentRule() );
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reportViolation( drce, pt, layer );
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}
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}
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// test for some corners of zoneB inside zoneA
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for( auto it = smoothed_polys[ia2].IterateWithHoles(); it; it++ )
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{
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VECTOR2I currentVertex = *it;
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wxPoint pt( currentVertex.x, currentVertex.y );
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if( smoothed_polys[ia].Contains( currentVertex ) )
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{
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std::shared_ptr<DRC_ITEM> drce = DRC_ITEM::Create( DRCE_ZONES_INTERSECT );
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drce->SetItems( zoneB, zoneA );
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drce->SetViolatingRule( constraint.GetParentRule() );
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reportViolation( drce, pt, layer );
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}
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}
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}
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}
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}
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}
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// Iterate through all the segments of refSmoothedPoly
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for( auto& task : futures )
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std::map<VECTOR2I, int> conflictPoints;
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for( auto refIt = smoothed_polys[ia].IterateSegmentsWithHoles(); refIt; refIt++ )
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{
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{
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// Build ref segment
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if( !task.valid() )
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SEG refSegment = *refIt;
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continue;
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// Iterate through all the segments in smoothed_polys[ia2]
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std::future_status result;
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for( auto it = smoothed_polys[ia2].IterateSegmentsWithHoles(); it; it++ )
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while( true )
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{
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{
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// Build test segment
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result = task.wait_for( std::chrono::milliseconds( 200 ) );
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SEG testSegment = *it;
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VECTOR2I pt;
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int ax1, ay1, ax2, ay2;
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if( m_drcEngine->IsCancelled() )
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ax1 = refSegment.A.x;
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ay1 = refSegment.A.y;
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ax2 = refSegment.B.x;
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ay2 = refSegment.B.y;
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int bx1, by1, bx2, by2;
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bx1 = testSegment.A.x;
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by1 = testSegment.A.y;
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bx2 = testSegment.B.x;
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by2 = testSegment.B.y;
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int d = GetClearanceBetweenSegments( bx1, by1, bx2, by2, 0,
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ax1, ay1, ax2, ay2, 0,
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zone2zoneClearance, &pt.x, &pt.y );
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if( d < zone2zoneClearance )
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{
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{
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if( conflictPoints.count( pt ) )
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cancelled = true;
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conflictPoints[ pt ] = std::min( conflictPoints[ pt ], d );
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break;
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else
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conflictPoints[ pt ] = d;
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}
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}
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}
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}
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for( const std::pair<const VECTOR2I, int>& conflict : conflictPoints )
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if( result == std::future_status::ready )
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{
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{
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int actual = conflict.second;
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report_data data = task.get();
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int zoneA_id = std::get<0>( data );
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int zoneB_id = std::get<1>( data );
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VECTOR2I pt = std::get<2>( data );
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int actual = std::get<3>( data );
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int required = std::get<4>( data );
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PCB_LAYER_ID layer = std::get<5>( data );
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if( zoneA_id != invalid_zone )
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{
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ZONE* zoneA = m_board->m_DRCCopperZones[zoneA_id];
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ZONE* zoneB = m_board->m_DRCCopperZones[zoneB_id];
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constraint = m_drcEngine->EvalRules( CLEARANCE_CONSTRAINT, zoneA, zoneB, layer );
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std::shared_ptr<DRC_ITEM> drce;
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std::shared_ptr<DRC_ITEM> drce;
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if( actual <= 0 && testIntersects )
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if( actual <= 0 && testIntersects )
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@ -1153,7 +1196,7 @@ void DRC_TEST_PROVIDER_COPPER_CLEARANCE::testZonesToZones()
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drce = DRC_ITEM::Create( DRCE_CLEARANCE );
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drce = DRC_ITEM::Create( DRCE_CLEARANCE );
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wxString msg = formatMsg( _( "(%s clearance %s; actual %s)" ),
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wxString msg = formatMsg( _( "(%s clearance %s; actual %s)" ),
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constraint.GetName(),
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constraint.GetName(),
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zone2zoneClearance,
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required,
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std::max( actual, 0 ) );
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std::max( actual, 0 ) );
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drce->SetErrorMessage( drce->GetErrorText() + wxS( " " ) + msg );
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drce->SetErrorMessage( drce->GetErrorText() + wxS( " " ) + msg );
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@ -1164,13 +1207,13 @@ void DRC_TEST_PROVIDER_COPPER_CLEARANCE::testZonesToZones()
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drce->SetItems( zoneA, zoneB );
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drce->SetItems( zoneA, zoneB );
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drce->SetViolatingRule( constraint.GetParentRule() );
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drce->SetViolatingRule( constraint.GetParentRule() );
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reportViolation( drce, conflict.first, layer );
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reportViolation( drce, pt, layer );
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}
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}
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}
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}
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if( m_drcEngine->IsCancelled() )
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break;
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return;
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}
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}
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}
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}
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}
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}
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}
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}
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@ -0,0 +1,524 @@
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(kicad_pcb (version 20230620) (generator pcbnew)
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(general
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(thickness 1.6)
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)
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(paper "A4")
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(layers
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||||||
|
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|
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|
"unresolved_variable": "error",
|
||||||
|
"via_dangling": "warning",
|
||||||
|
"zones_intersect": "error"
|
||||||
|
},
|
||||||
|
"rules": {
|
||||||
|
"max_error": 0.005,
|
||||||
|
"min_clearance": 0.0,
|
||||||
|
"min_connection": 0.0,
|
||||||
|
"min_copper_edge_clearance": 0.5,
|
||||||
|
"min_hole_clearance": 0.25,
|
||||||
|
"min_hole_to_hole": 0.25,
|
||||||
|
"min_microvia_diameter": 0.19999999999999998,
|
||||||
|
"min_microvia_drill": 0.09999999999999999,
|
||||||
|
"min_resolved_spokes": 2,
|
||||||
|
"min_silk_clearance": 0.0,
|
||||||
|
"min_text_height": 0.7999999999999999,
|
||||||
|
"min_text_thickness": 0.08,
|
||||||
|
"min_through_hole_diameter": 0.3,
|
||||||
|
"min_track_width": 0.0,
|
||||||
|
"min_via_annular_width": 0.09999999999999999,
|
||||||
|
"min_via_diameter": 0.5,
|
||||||
|
"solder_mask_to_copper_clearance": 0.0,
|
||||||
|
"use_height_for_length_calcs": true
|
||||||
|
},
|
||||||
|
"teardrop_options": [
|
||||||
|
{
|
||||||
|
"td_onpadsmd": true,
|
||||||
|
"td_onroundshapesonly": false,
|
||||||
|
"td_ontrackend": false,
|
||||||
|
"td_onviapad": true
|
||||||
|
}
|
||||||
|
],
|
||||||
|
"teardrop_parameters": [
|
||||||
|
{
|
||||||
|
"td_allow_use_two_tracks": true,
|
||||||
|
"td_curve_segcount": 0,
|
||||||
|
"td_height_ratio": 1.0,
|
||||||
|
"td_length_ratio": 0.5,
|
||||||
|
"td_maxheight": 2.0,
|
||||||
|
"td_maxlen": 1.0,
|
||||||
|
"td_on_pad_in_zone": false,
|
||||||
|
"td_target_name": "td_round_shape",
|
||||||
|
"td_width_to_size_filter_ratio": 0.9
|
||||||
|
},
|
||||||
|
{
|
||||||
|
"td_allow_use_two_tracks": true,
|
||||||
|
"td_curve_segcount": 0,
|
||||||
|
"td_height_ratio": 1.0,
|
||||||
|
"td_length_ratio": 0.5,
|
||||||
|
"td_maxheight": 2.0,
|
||||||
|
"td_maxlen": 1.0,
|
||||||
|
"td_on_pad_in_zone": false,
|
||||||
|
"td_target_name": "td_rect_shape",
|
||||||
|
"td_width_to_size_filter_ratio": 0.9
|
||||||
|
},
|
||||||
|
{
|
||||||
|
"td_allow_use_two_tracks": true,
|
||||||
|
"td_curve_segcount": 0,
|
||||||
|
"td_height_ratio": 1.0,
|
||||||
|
"td_length_ratio": 0.5,
|
||||||
|
"td_maxheight": 2.0,
|
||||||
|
"td_maxlen": 1.0,
|
||||||
|
"td_on_pad_in_zone": false,
|
||||||
|
"td_target_name": "td_track_end",
|
||||||
|
"td_width_to_size_filter_ratio": 0.9
|
||||||
|
}
|
||||||
|
],
|
||||||
|
"track_widths": [],
|
||||||
|
"via_dimensions": [],
|
||||||
|
"zones_allow_external_fillets": false
|
||||||
|
},
|
||||||
|
"layer_presets": [],
|
||||||
|
"viewports": []
|
||||||
|
},
|
||||||
|
"boards": [],
|
||||||
|
"cvpcb": {
|
||||||
|
"equivalence_files": []
|
||||||
|
},
|
||||||
|
"libraries": {
|
||||||
|
"pinned_footprint_libs": [],
|
||||||
|
"pinned_symbol_libs": []
|
||||||
|
},
|
||||||
|
"meta": {
|
||||||
|
"filename": "intersectingzones.kicad_pro",
|
||||||
|
"version": 1
|
||||||
|
},
|
||||||
|
"net_settings": {
|
||||||
|
"classes": [
|
||||||
|
{
|
||||||
|
"bus_width": 12,
|
||||||
|
"clearance": 0.2,
|
||||||
|
"diff_pair_gap": 0.25,
|
||||||
|
"diff_pair_via_gap": 0.25,
|
||||||
|
"diff_pair_width": 0.2,
|
||||||
|
"line_style": 0,
|
||||||
|
"microvia_diameter": 0.3,
|
||||||
|
"microvia_drill": 0.1,
|
||||||
|
"name": "Default",
|
||||||
|
"pcb_color": "rgba(0, 0, 0, 0.000)",
|
||||||
|
"schematic_color": "rgba(0, 0, 0, 0.000)",
|
||||||
|
"track_width": 0.2,
|
||||||
|
"via_diameter": 0.6,
|
||||||
|
"via_drill": 0.3,
|
||||||
|
"wire_width": 6
|
||||||
|
}
|
||||||
|
],
|
||||||
|
"meta": {
|
||||||
|
"version": 3
|
||||||
|
},
|
||||||
|
"net_colors": null,
|
||||||
|
"netclass_assignments": null,
|
||||||
|
"netclass_patterns": []
|
||||||
|
},
|
||||||
|
"pcbnew": {
|
||||||
|
"last_paths": {
|
||||||
|
"gencad": "",
|
||||||
|
"idf": "",
|
||||||
|
"netlist": "",
|
||||||
|
"specctra_dsn": "",
|
||||||
|
"step": "",
|
||||||
|
"vrml": ""
|
||||||
|
},
|
||||||
|
"page_layout_descr_file": ""
|
||||||
|
},
|
||||||
|
"schematic": {
|
||||||
|
"legacy_lib_dir": "",
|
||||||
|
"legacy_lib_list": []
|
||||||
|
},
|
||||||
|
"sheets": [],
|
||||||
|
"text_variables": {}
|
||||||
|
}
|
||||||
|
|
@ -191,3 +191,63 @@ BOOST_FIXTURE_TEST_CASE( DRCFalseNegativeRegressions, DRC_REGRESSION_TEST_FIXTUR
|
||||||
}
|
}
|
||||||
}
|
}
|
||||||
}
|
}
|
||||||
|
|
||||||
|
|
||||||
|
BOOST_FIXTURE_TEST_CASE( DRCFalseNegativeRegressionsNoFill, DRC_REGRESSION_TEST_FIXTURE )
|
||||||
|
{
|
||||||
|
// These documents at one time failed to catch DRC errors that they should have but only
|
||||||
|
// when the zones were filled. In other words, refilling the zone will fix the error, but
|
||||||
|
// DRC should have caught it regardless
|
||||||
|
|
||||||
|
std::vector< std::pair<wxString, int> > tests =
|
||||||
|
{
|
||||||
|
{ "intersectingzones", 1 } // zones are too close to each other
|
||||||
|
};
|
||||||
|
|
||||||
|
for( const std::pair<wxString, int>& entry : tests )
|
||||||
|
{
|
||||||
|
KI_TEST::LoadBoard( m_settingsManager, entry.first, m_board );
|
||||||
|
|
||||||
|
std::vector<DRC_ITEM> violations;
|
||||||
|
BOARD_DESIGN_SETTINGS& bds = m_board->GetDesignSettings();
|
||||||
|
|
||||||
|
// Disable DRC tests not useful in this testcase
|
||||||
|
bds.m_DRCSeverities[ DRCE_COPPER_SLIVER ] = SEVERITY::RPT_SEVERITY_IGNORE;
|
||||||
|
bds.m_DRCSeverities[ DRCE_LIB_FOOTPRINT_ISSUES ] = SEVERITY::RPT_SEVERITY_IGNORE;
|
||||||
|
bds.m_DRCSeverities[ DRCE_LIB_FOOTPRINT_MISMATCH ] = SEVERITY::RPT_SEVERITY_IGNORE;
|
||||||
|
|
||||||
|
bds.m_DRCEngine->SetViolationHandler(
|
||||||
|
[&]( const std::shared_ptr<DRC_ITEM>& aItem, VECTOR2I aPos, int aLayer )
|
||||||
|
{
|
||||||
|
PCB_MARKER temp( aItem, aPos );
|
||||||
|
|
||||||
|
if( bds.m_DrcExclusions.find( temp.Serialize() ) == bds.m_DrcExclusions.end() )
|
||||||
|
violations.push_back( *aItem );
|
||||||
|
} );
|
||||||
|
|
||||||
|
bds.m_DRCEngine->RunTests( EDA_UNITS::MILLIMETRES, true, false );
|
||||||
|
|
||||||
|
if( violations.size() == entry.second )
|
||||||
|
{
|
||||||
|
BOOST_CHECK_EQUAL( 1, 1 ); // quiet "did not check any assertions" warning
|
||||||
|
BOOST_TEST_MESSAGE( wxString::Format( "DRC regression: %s, passed", entry.first ) );
|
||||||
|
}
|
||||||
|
else
|
||||||
|
{
|
||||||
|
BOOST_CHECK_EQUAL( violations.size(), entry.second );
|
||||||
|
|
||||||
|
UNITS_PROVIDER unitsProvider( pcbIUScale, EDA_UNITS::INCHES );
|
||||||
|
|
||||||
|
std::map<KIID, EDA_ITEM*> itemMap;
|
||||||
|
m_board->FillItemMap( itemMap );
|
||||||
|
|
||||||
|
for( const DRC_ITEM& item : violations )
|
||||||
|
{
|
||||||
|
BOOST_TEST_MESSAGE( item.ShowReport( &unitsProvider, RPT_SEVERITY_ERROR,
|
||||||
|
itemMap ) );
|
||||||
|
}
|
||||||
|
|
||||||
|
BOOST_ERROR( wxString::Format( "DRC regression: %s, failed", entry.first ) );
|
||||||
|
}
|
||||||
|
}
|
||||||
|
}
|
||||||
|
|
|
||||||
Loading…
Reference in New Issue