Commit Graph

262 Commits

Author SHA1 Message Date
Jeff Young 22cde88ba9 Allow chamfering/filleting of zone/board edge intersections.
Fixes https://gitlab.com/kicad/code/kicad/issues/5947
2020-10-10 23:09:43 +01:00
Jeff Young 04c4012ee6 Make track/via sizes UI more predictable and compatible with DRC.
Two main changes: netclass values need to go through the DRC engine
so they can interact with other rules.  They're also now dependent
on the layer being routed as well as the start object.

Also make the controls adjust to each other better.  For instance,
copy-track-width needs to turn off when you select a particular
track width, and a particular track width needs to zero out when
you choose copy-track-width.

Fixes https://gitlab.com/kicad/code/kicad/issues/5951
2020-10-10 19:32:30 +01:00
Jeff Young fdeb340d21 Defensive code against missing nets.
Also adds net re-parenting code to Repair Board.

Fixes https://gitlab.com/kicad/code/kicad/issues/5935
2020-10-10 16:54:19 +01:00
Jeff Young 90baed7e82 Fix typo of transposed semi-colon and comma.
Also eases translation of strings while we're here.

Fixes https://gitlab.com/kicad/code/kicad/issues/5933
2020-10-10 12:25:22 +01:00
Jeff Young 1fc94c7a2d Fix printf arg mismatch.
Fixes https://gitlab.com/kicad/code/kicad/issues/5933
2020-10-09 13:57:49 +01:00
Jeff Young 0c7630f8b4 Get rid of wxWidgets assert. 2020-10-09 00:31:29 +01:00
Jeff Young 4f2e574f4b Move IsADiffPair to drc_engine.cpp for now.
Otherwise we have to include drc_test_provider_diff_pair_coupling.cpp
in CVPCB, which isn't ideal either.

I'll let Tom figure out the best plan going forward, but this should
at least get things compiling/linking again.
2020-10-09 00:05:22 +01:00
Jeff Young 6550e01318 Sort synthetic netclass rules by min clearance.
This way when 'A' and 'B' have different netclasses the largest will
fire (rather than just a random one of the two).

Fixes https://gitlab.com/kicad/code/kicad/issues/5926
2020-10-08 23:41:27 +01:00
Tomasz Wlostowski b5fa523a11 PCB_EXPR_EVALUATOR: added isDiffPair() API method 2020-10-09 00:01:26 +02:00
Tomasz Wlostowski 5c2c66dd07 drc: sane default rules for via diameters/diff pair widths/diff pair gaps (required by the P&S) 2020-10-09 00:01:26 +02:00
Tomasz Wlostowski 8a7fc7e970 drc: more robust segment pair detection, still issues with approximated arc corners though... 2020-10-07 16:36:37 +02:00
Tomasz Wlostowski 719363fa4a Factor out class MINOPTMAX<> into a separate header 2020-10-07 16:36:37 +02:00
Jeff Young f620f8bdd3 Report silk/edge collisions.
Fixes https://gitlab.com/kicad/code/kicad/issues/5854
2020-10-06 13:20:52 +01:00
Jeff Young 0751965b2b Be more responsive to user cancel. 2020-10-05 22:31:52 +01:00
Jeff Young 5705859e9e Remove accidental debug code. 2020-10-05 12:27:21 +01:00
Jeff Young 37906511f5 Class renaming.
DRAWSEGMENT  -> PCB_SHAPE
EDGE_MODULE  -> FP_SHAPE
TEXTE_PCB    -> PCB_TEXT
TEXTE_MODULE -> FP_TEXT
2020-10-05 11:55:33 +01:00
Jeff Young 7a4900b8dc PCB_LINE_T -> PCB_SHAPE_T and PCB_MODULE_EDGE_T -> PCB_FP_SHAPE_T
Also updated footprint text and zone types for consistencey.
2020-10-04 16:49:04 +01:00
Jeff Young 85c6cebd77 Rework silk-to-pad checker to handle all solder mask clipping of silk.
Fixes https://gitlab.com/kicad/code/kicad/issues/5851
2020-10-04 13:21:01 +01:00
Jeff Young 36ceb8075e Fix logic bug in DRC RTree handler.
Return value from visitor is whether or not to keep searching, not
whether or not there was a collision.
2020-10-04 13:21:01 +01:00
Jeff Young 44580acee2 Clean up some compiler warnings. 2020-10-03 22:55:34 +01:00
Mikolaj Wielgus 400c15b8eb Add mils to units, remove useMils variables 2020-10-03 20:06:56 +00:00
jean-pierre charras 3144bab36f final cleanup about removing useless include 2020-10-03 16:40:36 +02:00
jean-pierre charras 0b23cb7dbb more cleanup about removing useless include 2020-10-03 15:26:03 +02:00
Jeff Young bea5914726 Make sure all DRC paths check for via/pad being flashed on layer.
Fixes https://gitlab.com/kicad/code/kicad/issues/5830
2020-10-03 14:20:19 +01:00
jean-pierre charras e76736b7bf Fix a few Coverity warnings 2020-10-03 12:47:41 +02:00
Tomasz Wlostowski 5ef1dc17ad drc: ignore silk2pad/silk2silk violations for hidden text objects 2020-10-02 21:06:52 +02:00
Tomasz Wlostowski ca8aca6faa drc: implement DRC_RTREE::CheckColliding 2020-10-02 21:06:52 +02:00
Tomasz Wlostowski 8eb9d34aad drc: silk to silk clerance test should not report errors for hidden text 2020-10-01 18:55:53 +02:00
Tomasz Wlostowski aee16efe32 drc: LVS test should not throw an error if running in no-project mode 2020-10-01 18:55:53 +02:00
jean-pierre charras f702da95c7 Minor code cleanup, step2: remove more useless include.
fix also a minor compil warning
2020-10-01 15:39:47 +02:00
jean-pierre charras 3f8c9d49f8 Revert "Code cleanup: remove useless wx/wx.h include inside a few files."
due to compil issue on Linux

This reverts commit cffccc3970.
2020-09-30 20:47:20 +02:00
jean-pierre charras cffccc3970 Code cleanup: remove useless wx/wx.h include inside a few files.
in most of files, including wx.h is not necessary, when only 2 or 3 wx files must be included.
Moreover, on windows, including wx.h sometimes create compil warnings about
shadowed vars defined in some specific windows headers.
2020-09-30 20:03:27 +02:00
Seth Hillbrand bf3cb0b1d0 Standardize pad type enums 2020-09-30 08:38:35 -07:00
Jeff Young d3f8f2b81e Remove confusion between pad->IsOnLayer and pad->IsPadOnLayer 2020-09-30 11:50:51 +01:00
Jeff Young ab033327c7 Limit checks need to be done at start, not end.
(We also use the limit checks to ignore violations.)

Fixes https://gitlab.com/kicad/code/kicad/issues/5831
2020-09-29 21:23:26 +01:00
Jeff Young 2cf303bb09 Test against pad hole cylinder when pad is not on layer. 2020-09-29 18:18:19 +01:00
Jeff Young 66454ec895 Don't do hole-to-pad clearance testing on compound pads.
Fixes https://gitlab.com/kicad/code/kicad/issues/5822
2020-09-29 14:11:32 +01:00
Jeff Young bf67648562 Support optional location reporting in SHAPE collisions.
Also fixes a few bugs in the collision routines.
2020-09-28 23:28:33 +01:00
Jeff Young 09ab269770 Support for 'L' in DRC expression language.
Also make layer testing work again against both canonical names and
user names.
2020-09-27 21:33:37 +01:00
Tomasz Wlostowski c5c6b97c8b drc: fixed warnings in length matcher 2020-09-27 17:51:16 +02:00
Tomasz Wlostowski fbb669aa75 drc: diff pair test provider reports gap & max uncoupled length violations. 2020-09-27 17:50:57 +02:00
Tomasz Wlostowski 8e9a39e17c drc: fix incorrect DRCE_LAST 2020-09-27 17:50:24 +02:00
Tomasz Wlostowski 5874373a0c drc: unfinished version of diff pair gap/coupled length test 2020-09-27 16:45:46 +02:00
Tomasz Wlostowski 9b4504e73f drc: report from-to paths for length matched signals 2020-09-27 16:45:46 +02:00
Tomasz Wlostowski adf7d3260d drc: parse diff pair constranits 2020-09-27 16:45:46 +02:00
Tomasz Wlostowski cb2dfcde83 drc: error codes for diff-pair related stuff 2020-09-27 16:45:46 +02:00
Tomasz Wlostowski bd0bd5b84b drc: support for skew & via_count constraints. Length test now generates a length report 2020-09-27 16:45:46 +02:00
Tomasz Wlostowski f38147c201 drc: add support for via_count constraint to the parser 2020-09-27 16:45:46 +02:00
Tomasz Wlostowski 2258c861c9 drc: initial version of matched trace lengths test provider 2020-09-27 16:45:46 +02:00
Tomasz Wlostowski 2bacfe8202 drc: use R-Tree intersection for silk clearance tests 2020-09-27 16:45:46 +02:00