* Delete Single Pad Net option does not delete the net if a zone use this net (i.e. is attached to this pad).
* pcb_parser accept now negative netcodes in zones (can happen with old files, which previously could crash Pcbnew)
* pcb_parser accept now files with incorrect or missing net count (can happen with old files, which previously could crash Pcbnew)
* if a zone has a non-existent net name it now keep this net name, and DRC detect it (previously, the net name was lost, and the DRC did not tected this issue).
* Drc test: now detect a "dead" net, i.e. a net with 0 pads, but still used by a zone. It happens easily after a schematic modification, when a net disappears or is renamed.
* if the current select plugin is the github plugin, one can select some of these libraries and add them to the table
* if the current select plugin is the kicad plugin, one can select some of these libraries and download them to make alocal copy.
They can added to the table after they are downloaded.
* Make generate button the default in Eeschema netlist dialog.
* Fix spacing issues in export IDF dialog.
* Make OK button the default in export IDF dialog.
* Remove unnecessary end dialog code from export IDF dialog.
* Improve resizing of export IDF dialog.
this option was possible only by modifying the way display options are managed.
before these changes, display options were a global DISPLAY_OPTIONS class instance.
Now each EDA_DRAW_FRAME(and derivated classes) includes its own DISPLAY_OPTIONS class instance.
As a consequence, some duplicate display option variables in these classes have been removed, because there were just duplicate variables of the DISPLAY_OPTIONS class instance.
Please, note the layer manager was already available in GAL mode, but is was the same as tne board editor, which is not good.
Now:
- In default mode or GAL mode, the look is the same.
- Only suitable technical layers (i.e. paired layers) are selectable from the layers manager (for special purposes, some other layers can be used, via the graphic items properties dialog)
* Change Read to Load in Pcbnew and Eeschema preference menus.
* Make electrical rules check status bar message the same for both the menu
and toolbar entries.
When the filename is not absolute, the page layout file is now searched first in project folder, and then in kicad template folder, if not found in project.
Fix issue when using a page layout file in project folder: eeschema and Pcbnew did not use it, unless using an absolute path.
Now, if the file path is nor absolute, it is seen as relative to the project (which is the expected behavior)
fp lib wizard: when pcbnew id compiled with USE_GITHUB_PLUGIN=OFF, the github plugin option is no more accessible (and the web viewer no more used).
Looked like a minor issue, but was due to a more serious bug, when using 2 different DSN_LEXERS which were not synchronized.
The fix is not perfect, but unfortunately, the parser used to read the PCB_PLOT_PARAMS in .kicad_pcb files is also used in legacy board file reader.
Therefore it is better than write 2 parser functions, one for legacy files, the other for the .kicad_pcb files, which make the same thing.
BOM dialog: remove a not very useful button, and merge its function with an other (not perfect, need more work)
Add message box to show info added in BOM python scripts (See scripts/bom-in-python/README-bom.txt about this info)
This is due to the fact the boost::pylygon function resize ( a inflate/deflate function) used for calculations does not work with boost version >= 1.56.
Use Clipper inflate/deflate function instead. It is faster and works fine.
* Make title capitalization consistant.
* Replace some instances of module with footprint.
* Use angle instead of orientation where appropriate.
* Remove abbreviations where it made sense.
* Coding policy fixes.
- fixed walkaround bug causing unwanted overlap/clearance violation when the first segment of trace being laid intersects the obstacle's hull at the same point twice (ie. goes in, turns around and goes out).
- fixed placer bug not splitting the start segment after toggling via placement or changing trace width
- re-worked PNS_LINE_PLACER and PNS_ROUTER classes a bit, removing duplicate class members
- cleaned up Andrew's blind/buried via fixes
- fixed 'custom via width' dialog bug updating the width even when closed/cancelled
- fixed incorrect radius of drawn microvias
* Fix assertions in Eeschema when editing net labels, electronic rules check,
and plotting.
* Fix assertion when opening PCB calculator.
* Fix assertions in Pcbnew when changing footprints in footprint properties
dialog and adding or editing text.
* Add more missing source code licenses.
* Fix coding policy violations (tabs and trailing white space) in Python
scripting code.
* Add stable release policy to full documentation build.
* Make all files generated by make_lexer() dependencies of thier respective build targets.
* Make building Boost a dependency for all libraries.
* Remove duplicate make_lexer() call for Specctra lexer files.
* Improve VRML export dialog lay out.
* Make the OK button the default action in the export dialog.
* Make 3D model export work correctly and avoid redundant file copies.
* Fix embedded path separators in wrl files on windows.
* Fix absolute model file path creation in wrl files.
* Clean up VRML export code.
* Change hot key editing contol from wxGridTableBase to wxListCtrl.
* Separate hot key lists into separate tabs rather than one large list.
* Coding policy fixes.