Commit Graph

104 Commits

Author SHA1 Message Date
Tomasz Wlostowski 9176062d0f drc_proto: return 'safe' null constraint if no matching rule found. To be fixed 2020-09-08 01:31:42 +02:00
Tomasz Wlostowski fc58c4a20e drc_proto: netclass wip 2020-09-08 01:31:42 +02:00
Tomasz Wlostowski 8a5297180e drc_proto: initial version of legacy rule import (without overrides yet) 2020-09-08 01:31:42 +02:00
Tomasz Wlostowski 05b88acf16 drc_proto: wip adding accessors to DRC_RULE/DRC_RULE_CONDITION 2020-09-08 01:31:42 +02:00
Tomasz Wlostowski 8e4a3f5e65 drc_proto: nicer logging on the console 2020-09-08 01:31:42 +02:00
Tomasz Wlostowski b107c4a025 drc_proto: working on progress reporting 2020-09-08 01:31:42 +02:00
Tomasz Wlostowski adbd94553d drc_proto: all tests now supported in drc_proto. Not tested yet! 2020-09-08 01:31:42 +02:00
Seth Hillbrand 3095d0e335 DRC_TREE: Allow indexing on triangulated zones
Also move to BOARD_ITEM* as we might want to run DRC on non-copper items
2020-09-04 15:53:49 -07:00
Jeff Young 9e12ea9bb6 Cleanup some dead code and make better use of iterators.
Also applies coding style around auto and lambdas.
2020-08-28 11:05:58 +01:00
Thomas Pointhuber a03fb7a9a8 Altium: Refactor and add initial structure for schematic importer
altium: move pcbnew/altium2kicadpcb_plugin -> pcbnew/plugins/altium

See: https://gitlab.com/kicad/code/kicad/-/issues/4412
2020-08-23 19:01:08 +00:00
Wayne Stambaugh ede39780e2 Remove all debugging output that cannot be disabled.
The use of printf, wxLogDebug, and std::err/std::out causes excessive
debugging output which makes finding specific debugging messages more
difficult than it needs to be.

There is still some debugging output in test code that really needs to
be moved into a unit test.

Add debugging output section to the coding policy regarding debugging
output.
2020-08-18 10:17:36 -04:00
Tomasz Wlostowski f582783b27 qa/drc_proto: updated DRC rule file format to the last version, post-rebase fixes too 2020-08-13 14:50:59 +02:00
Tomasz Wlostowski e0ffdc8fe7 drc_proto: update file format, get the thing to compile again 2020-08-13 14:50:59 +02:00
Tomasz Wlostowski 52fefd15e0 common: include drc_proto keywords in the main DRC parser 2020-08-13 14:50:59 +02:00
Tomasz Wlostowski 35e45c5917 drc_proto: edge clearance wip 2020-08-13 14:50:59 +02:00
Tomasz Wlostowski e38796396f qa/drc_proto: default values for fields in DRC_RULE 2020-08-13 14:50:59 +02:00
Tomasz Wlostowski 782fcc6139 qa/drc_proto: fix regressions in DRC_RULE_PARSER 2020-08-13 14:50:59 +02:00
Jeff Young 463100d67f Remove a long-standing hack to keep divots out of adjacent zones.
The new algorithm unions any adjacent zones before doing the
chamfer/fillet and then subtracts the other zones back out afterwards.

Fixes https://gitlab.com/kicad/code/kicad/issues/3812
2020-08-12 22:20:08 +01:00
Seth Hillbrand 7c455f2357 First pass at DRC RTree functionality
This implements a copper-layer RTree with functions for iterating over
the elements in a copper layer and providing Nearest Neighbor returns
for BOARD_CONNECTED_ITEMS
2020-08-11 16:52:29 -07:00
Seth Hillbrand 41edf5c5bf Updating DRC to handle vias with differing layers 2020-08-10 03:27:27 +00:00
Jeff Young 4317881012 Improve delete-unused-layers to better handle multi-layer items.
Fixes https://gitlab.com/kicad/code/kicad/issues/5116
2020-08-09 15:39:51 +01:00
Mark Roszko c6e388db14 Implement an app progress indicator in the taskbar
ADDED: Progress indicator in the taskbar

This adds a progress indicator to the Windows and macOS taskbar
icons to display the progress of some operations.

Note, this requires wxWidgets 3.1+
2020-08-09 10:55:00 +00:00
Jeff Young e5b50d90a7 Update DRC rules to new layer and disallow grammars.
Also adds support for hooking rules up to named zones.

Fixes https://gitlab.com/kicad/code/kicad/issues/2041
2020-08-07 21:49:36 +01:00
Qbort 9977299340 Fix compile errors in drc_engine.cpp and panel_setup_rules.cpp 2020-07-31 21:47:01 +00:00
Ian McInerney 268dec5c19 Cleanup some build and Coverity warnings 2020-07-31 02:46:05 +01:00
Jeff Young fdb23d1a2d Add DRC check for items (pads for now) shorting two nets.
Fixes https://gitlab.com/kicad/code/kicad/issues/4955
2020-07-30 21:42:23 +01:00
Jeff Young 577c1be391 Report all DRC rule errors, not just the first. 2020-07-30 14:27:42 +01:00
Tomasz Wlostowski b06c158764 drc_proto: thou shalt count rule hits from 1, not 0 2020-07-30 00:02:36 +02:00
Tomasz Wlostowski 8de484eff3 drc_proto: follow up Jeff's changes 2020-07-30 00:02:15 +02:00
Tomasz Wlostowski faf469bd23 drc_proto: follow up Jeff's changes to libeval_compiler 2020-07-29 23:15:19 +02:00
Tomasz Wlostowski e32c38ef81 drc_proto: simple test cases for copper clearance and hole clearance tests 2020-07-29 23:14:34 +02:00
Tomasz Wlostowski 128ae8b49e drc_proto: working on hole size/track width checker 2020-07-29 23:14:34 +02:00
Tomasz Wlostowski ff1872379d drc_proto: report rule hit statistics 2020-07-29 23:14:34 +02:00
Tomasz Wlostowski 7fc532df2e drc_proto: import new error reporting code from Jeff 2020-07-29 23:14:34 +02:00
Tomasz Wlostowski 6615397541 drc_proto: DRC_RULE now uses new libeval API 2020-07-29 23:14:34 +02:00
Tomasz Wlostowski a504bd0795 drc_proto: don't launch DRC providers with empty/incomplete rule sets 2020-07-29 23:14:03 +02:00
Tomasz Wlostowski cf0bb60fbb drc_proto: migrated GetEffectiveShape(s) to SHAPE_COMPOUND 2020-07-29 23:14:03 +02:00
Tomasz Wlostowski 8d9d3ff795 qa/drc_proto: debug level settable by env var 2020-07-29 23:14:03 +02:00
Tomasz Wlostowski 91b68e4578 drc_proto: follow up Jeff's changes in legacy DRC/board model 2020-07-29 23:14:03 +02:00
Jeff Young 0fecb5f277 Be more explicit about string/character conversions.
This *may* fix the bug where a layer name isn't displayed correctly
in the error dialog.  But probably not.
2020-07-28 20:44:40 +01:00
Jeff Young bf445c1a95 Performance enhancements.
1) cache pad polygon outlines
   huge improvement in connectivity performance and a decent
   improvement in DRC performance
2) don't pre-allocate CONTEXT stack
   significant improvement in DRC rule performance
2) don't keep re-encoding strings
   decent improvement in DRC rule performance
2020-07-25 13:03:33 +01:00
Jeff Young 6529e339a9 Don't store context in the uCode. (It's not thread-safe.)
Although it does give some pretty funny results when filling zones.
2020-07-23 22:21:13 +01:00
Jeff Young a6b6084a60 Add preflighting for DRC rule function calls. 2020-07-22 14:33:32 +01:00
Jeff Young c52df811ae Add expression eval to constraint min/max/opt values.
Also adds error reporting for above.
2020-07-21 23:43:10 +01:00
Jeff Young 095937563b Hook libeval compiler up to rule parser
- convert expression string tokens to single-quote-delimited
- fix bug where netclass assignments weren't getting updated after
  board setup dialog
- move property manager rebuild to lazy evaluation
- improve performance with wider use of const&
- retire DRC_SELECTOR stuff
- use wxString for GUI stuff (particularly translated stuff)
- fix EqualTo() to return false instead of asserting when op types
  don't match
- fix buffer overruns with fixed-size string buffers
- make expression function calls case-insensitive
- integrate expression errors into rule parser
- produce more and better error messages
- keep BOARD_ITEM ptrs const as long as possible
- fix a couple of uninitialized variables
2020-07-20 22:11:53 +01:00
Tomasz Wlostowski 0a4c8cd45c drc_proto: import latest Jeff & Jon's changes + update copyright headers 2020-07-05 22:44:38 +02:00
Tomasz Wlostowski e9d37dd7ce drc_proto: implement QueryWorstConstraint 2020-07-05 22:44:38 +02:00
Tomasz Wlostowski bc86ea7682 drc_proto: use separate lexer for rule file from current pcbnew DRC 2020-07-05 22:44:38 +02:00
Tomasz Wlostowski 0e0cf5dff8 drc_proto: moving to GetEffectiveShapes() 2020-07-05 22:44:38 +02:00
Tomasz Wlostowski 1cabc1bc0f qa/drc_proto: rework common clearance code into base class, start working on hole clearance test refactor 2020-07-05 22:44:38 +02:00
Tomasz Wlostowski b3ce23f0e2 PCB_EXPR_EVALUATOR: implement isPlated virtual property 2020-07-05 22:44:38 +02:00
Tomasz Wlostowski d57d5d73b2 qa: clearance test works and reports. about to do board outline clearance test 2020-07-05 22:44:38 +02:00
Tomasz Wlostowski bd19892cd0 qa/drc_proto: clearance test seems to work with conditional rules, need to clean up & add reporting 2020-07-05 22:44:38 +02:00
Tomasz Wlostowski 085698d17c drc_proto: wip 2020-07-05 22:44:38 +02:00