Seth Hillbrand
ba11de6e66
Update QA test schematics with valid and invalid variants
2022-12-09 02:14:05 +00:00
Barabas Raffai
63da407345
Add tests for no connect flag
2022-12-09 02:14:05 +00:00
Mikolaj Wielgus
b025b103de
Sim Model Editor: Make the VBIC model the first BJT model to select
2022-11-29 10:13:20 +01:00
Mikolaj Wielgus
484620eeb5
Sim QA: Add test for VDMOS
2022-11-29 09:48:01 +01:00
Mikolaj Wielgus
5fb191e4d6
Sim QA: Test all BJT parameters in each model
2022-11-28 09:49:48 +01:00
Mikolaj Wielgus
26644952a4
Sim QA: Test all diode parameters
2022-11-28 08:01:50 +01:00
Mikolaj Wielgus
f2fb734e06
Sim QA: Add test for Numparam expressions inside .subckt
2022-11-27 06:32:17 +01:00
Mikolaj Wielgus
08d37d2795
Sim QA: Add Spice .subckt parsing tests
2022-11-26 10:24:11 +01:00
Mikolaj Wielgus
9766351ee6
Sim: Update QA to tests to match the new model upgrade scheme
2022-11-25 05:38:21 +01:00
Mikolaj Wielgus
833146cf50
Sim QA: Fix QA errors
...
Let's not allow units in fields for now. (is 1m one meter or one milli?)
2022-11-22 21:18:01 +01:00
Mikolaj Wielgus
e9fe59a28c
Sim: Rename the missed Sim_* fields to Sim.*
2022-11-21 03:33:11 +01:00
Mikolaj Wielgus
059ca8fc48
Sim: Rename Sim_* fields to Sim.*
2022-11-20 03:37:54 +01:00
Tomasz Wlostowski
cab5f65685
qa/pns: added test case for via drag walkaround
2022-11-18 15:14:34 +01:00
Mikolaj Wielgus
e7c43ca20a
Sim: Remove inference from Reference and Value
2022-11-18 08:39:15 +01:00
Tomasz Wlostowski
33594e92fa
router: qa test case for backspace (unfix) regression
2022-11-15 23:05:53 +01:00
Jon Evans
c07477b94c
Move to explicit symbol properties mapping
...
Fixes https://gitlab.com/kicad/code/kicad/-/issues/12845
2022-11-08 22:19:08 -05:00
Tomasz Wlostowski
ab350cbfaa
qa: some trivial test cases for the P&S regressions
2022-10-31 11:49:31 +01:00
Mikolaj Wielgus
5eca8dd8de
Undo hardcoding swapping of diode pins
...
Revert commits d1e2acd3
70b4d1aa
cff508fb
2022-10-30 11:01:59 +01:00
Mikolaj Wielgus
cff508fb3b
Sim: Reverse diode model pin order to match diode symbols
2022-10-28 14:01:09 +02:00
Mikolaj Wielgus
f31feaac42
Sim: Commit forgotten files
2022-10-27 08:08:14 +02:00
Mikolaj Wielgus
00c04e74ed
Sim QA: Test LTspice parameters and ako models of BJTs
2022-10-20 04:00:33 +02:00
Mikolaj Wielgus
c4fc9c1b16
Sim QA: Add tests for AKO and LTspice diodes
2022-10-19 06:56:21 +02:00
Mikolaj Wielgus
42acabb5a9
Fix a mistake in uopamp.lib.spice
2022-10-18 22:38:49 +02:00
Mikolaj Wielgus
ae671c07e1
Commit missing uopamp.lib.spice
2022-10-18 17:38:23 +02:00
Mikolaj Wielgus
e5704d7058
Update uopamp.lib.spice to be the same in all QA tests
2022-10-18 06:15:54 +02:00
Mikolaj Wielgus
c8e13813d9
Sim: Rename Sim_Disabled field to Sim_Enable
2022-10-16 00:49:44 +02:00
Mikolaj Wielgus
c3d5b3b3e5
Sim: Only store device type in reference, not full model type
...
Instead of Reference="VSIN1", Value="dc=1 ampl=2 f=3", it's now
Reference="V1", Value="SIN dc=1 ampl=2 f=3".
2022-10-15 19:36:26 +02:00
Jeff Young
9424b166d0
Add regression test case for 12609.
2022-10-09 23:31:26 +01:00
Seth Hillbrand
0150655ed3
Fix missing DRC check with via
...
When the via is first and not second in our ordering, the hole-copper
clearance was not checked as the track did not have a hole.
We also calculated the NPTH-via clearance incorrectly in the inspector
2022-09-20 13:43:01 -07:00
Seth Hillbrand
60374daa49
Fix ERC global label unit tests
...
Need to test all units in the subgraph as there are chances that the
subgraph might have more than one label, which needs to be consistently
handled
2022-09-12 13:16:45 -07:00
Mikolaj Wielgus
0e0d1a34f5
Sim: Spice grammar fixes
...
- Fix parsing .model lines with model names containingnon-alphanumeric
characters like - and _,
- Fix parsing libraries in which EOF is not preceded by a newline.
Fixes https://gitlab.com/kicad/code/kicad/issues/12394
2022-09-12 04:05:17 +02:00
Mikolaj Wielgus
e56635a02b
Sim: Add mutual inductor model
2022-09-11 19:23:01 +02:00
Seth Hillbrand
f2e3329617
Add ERC QA tests
2022-09-09 17:21:57 -07:00
Jon Evans
a5246a6df7
DbLib: Support showing field names
2022-09-04 13:01:32 -04:00
Mikolaj Wielgus
b225e53135
Sim QA: Test raw model with fewer pins than its symbol
2022-09-02 16:42:15 +02:00
Mikolaj Wielgus
121fad63ab
Sim QA: Add Directives test
...
This test checks whether Spice directives placed in schematics as text
objects are properly included in the generated Spice netlist.
2022-08-31 09:41:35 +02:00
Mikolaj Wielgus
bd6c153ad9
Sim: Implement "enum" model parameters for switches
...
Displayed in Sim Model Dialog parameter grid as a dropdown
(wxEnumProperty).
2022-08-30 09:45:49 +02:00
Mikolaj Wielgus
385e5deaaa
Add Switches sim QA test
...
Tests voltage switches. Current switches will be tested as well once
they're fixed to work with .probe alli command in Ngspice.
2022-08-29 04:30:21 +02:00
Jon Evans
ae6a2a6443
ADDED: Database libraries MVP
...
Allows placing parts from an external database that reference symbols from another loaded library.
Includes:
- nanodbc wrapper
- database schematic library plugin
- basic tests
Fixes https://gitlab.com/kicad/code/kicad/-/issues/7436
2022-08-26 10:51:13 -04:00
Mikolaj Wielgus
103b8a0d2c
Update the Opamp test to use a symbol with unordered pins
2022-08-26 04:36:48 +02:00
Mikolaj Wielgus
c6defadb78
Add Fliege filter Spice netlist exporter test
...
Which we use to test multi-part symbols, as Fliege filter has two op
amps.
2022-08-25 08:47:31 +02:00
Mikolaj Wielgus
8a6a0ff7dc
Allow inferred voltage/current sources to have a single float in Value
...
Update Opamp test to use this feature.
2022-08-24 06:19:38 +02:00
Seth Hillbrand
b9461f2ba7
Re-enable tests for zones
...
Avoid invalid substantial checks triggered by signed floating point
zeros. Adds a QA check to ensure zone-self checks are maintained
2022-08-18 17:06:29 -07:00
Mikolaj Wielgus
b6f6d1ef81
Sim QA: Add legacy_opamp test to check legacy subckt fields
...
In particular, Spice_Node_Sequence needed some additional coverage.
2022-08-11 21:23:05 +02:00
Mikolaj Wielgus
c669d55eb8
Sim QA: Use uopamp_lvl2 instead of uopamp_lvl1 in Opamp test
2022-08-11 18:32:20 +02:00
jean-pierre charras
cc1e99ff5d
QA test: annotate rlc.kicad_sch. only annotated schematic give reliable result.
2022-08-10 11:16:07 +02:00
Mikolaj Wielgus
128fedec1a
Sim QA: Commit the missing rlc unit test project
2022-08-08 22:05:15 +02:00
Mikolaj Wielgus
f6771ed789
Sim QA: Add rlc project to test RLC ideal model inference
2022-08-08 17:06:50 +02:00
Mikolaj Wielgus
9e7bc585ef
Sim QA: Test only specific hardcoded points of the results
...
We don't want to assume Ngspice results to be very deterministic.
2022-08-04 21:07:43 +02:00
Mikolaj Wielgus
800b512fe8
Further cut off digits down to one after period in sim QA
...
We just want to make sure our netlist exporter works. Being
deterministic is the simulator's job, not ours, though perhaps we should
investigate that too eventually.
2022-08-03 16:25:00 +02:00
Mikolaj Wielgus
37209bb496
Try to fix Ngspice QA by resampling and cutting off value digits
...
`linearize` command resamples the data. Fourth and further digits from
decimal point are cut off by using `wrdata` command instead of `write`.
Oddly, "sources" unit test is not working (so it's still uncommented) --
some substantially different values are generated when generating the
reference with standalone Ngspice.
2022-08-03 14:28:01 +02:00
Jeff Young
cc78997386
Add annular ring test and fix footprint/pad mismatch in other test.
2022-08-01 21:50:35 +01:00
Jeff Young
203d778c92
Fix test failure.
2022-08-01 21:42:02 +01:00
Jeff Young
0304ad4494
Move connection width testing to rule system.
...
Also copies connection width progress reporting architecture over to
the sliver checker.
2022-08-01 13:09:51 +01:00
Mikolaj Wielgus
d7e5254c17
Comment out failing sim QA tests
...
The tests will probably have to test against manually specified bounds
and inexact points.
Added a previously mistakenly uncommitted cmos_not.csv.
2022-07-30 09:19:20 +02:00
Mikolaj Wielgus
7cf5138c63
Sim: Bugfixes, mostly for MS Windows compilation errors
...
Unfortunately, Windows headers define a lot of macros for common words,
so we had to rename some enums to not collide.
We also fix some of the many bugs related to the new simulation
architecture and the Spice Model Editor dialog.
2022-07-30 02:25:34 +00:00
Mikolaj Wielgus
739b9255d9
Sim Model Editor improvements
...
- Tab-switching,
- Automatic expansion of categories on tab-switch,
- Various minor simulation improvements,
- Various new simulation-related bugfixes.
2022-07-30 02:25:34 +00:00
Mikolaj Wielgus
6984f63af8
Sim: Transmission line models
...
Implement transmission line models and perform some adjustments to
the current models. Add some QA tests.
2022-07-30 02:25:34 +00:00
Mikolaj Wielgus
fe38c622a9
Sim: Improvements to model serialization
...
Don't serialize parameters in certain models for default values. Infer
models from Value field for some kinds of models. Resolve synonyms when
loading models from Spice libraries.
2022-07-30 02:25:34 +00:00
Mikolaj Wielgus
6450ec6b85
Sim: Spice netlist exporter rewrite
...
Rewrite the spice exporter to work with the new simulation model
architecture and data model, with many bugfixes related to the latter
two along the way.
2022-07-30 02:25:34 +00:00
luz paz
79fa911e0e
Fix various typos
...
Found via `codespell -q 3 -S *.po,./thirdparty,./Documentation/changelogs -L aactual,acount,aline,alocation,alog,anormal,anumber,aother,apoints,aparent,aray,ba,busses,dout,einstance,leaded,modul,ontext,ot,overide,serie,te,,tesselate,tesselator,tht`
2022-07-21 16:31:41 +00:00
Seth Hillbrand
3081023b5e
ADDED: Minimum copper connection width DRC check
...
Checks all copper connections in each net/layer for minimum width
setting.
Fixes https://gitlab.com/kicad/code/kicad/issues/9870
2022-07-11 19:26:56 +00:00
Jeff Young
ce4cedb5b4
Regression test case for 11814.
2022-06-15 11:45:29 +01:00
Jeff Young
09c9bc3037
Fix net ordering in gold file.
2022-05-27 21:28:17 +01:00
Jeff Young
e9e1878d96
Attempt to fix eeschema tests.
...
(Slashes in netnames must be escaped or else we think they're path
separators.)
2022-05-27 17:53:11 +01:00
Roberto Fernandez Bautista
55f22c526a
Fix annotation of incomplete multi-unit symbols and re-annotation of duplicates
...
Fixes https://gitlab.com/kicad/code/kicad/-/issues/11496
2022-05-26 09:23:36 +00:00
Jeff Young
4cd48cd5c9
Fix some test issues.
2022-04-23 22:15:39 +01:00
Jeff Young
2663ad5340
Implement Eagle text variables.
...
Also fixes two bugs:
1) subsequent text items that are marked >NAME or >VALUE will now get
imported as text items with ${REFERENCE} or ${VALUE} (instead of overwriting
the previous text item)
2) we no longer (accidentally) capitalize all text items.
Fixes https://gitlab.com/kicad/code/kicad/issues/11321
2022-04-10 17:29:47 +01:00
jean-pierre charras
5e52539939
eagle importer: fix incorrect conversion UTF8/wxString.
...
When importing a eagle board file using wxXmlDocument, the strings in eagle BOARD
(UTF8 encoded) are correctly converted to wxString (using unicode wide chars)
So trying to reconvert these strings using FROM_UTF8( <wxString>.c_str() )
is incorrect and can break initial string if non ASCII7 chars are found
2022-04-09 15:33:01 +02:00
Thomas Pointhuber
bd18e340f4
eagle: introduce *.lbr footprint import test
...
Bugs found but not fixed yet:
* Reference and Value are not converted correctly yet
* HOTFIX: test commented out
* GP3906-TLP and UBLOX_ZOE_M8-0-10 are not able to import the description again
* HOTFIX: description removed from gold file
2022-04-02 20:07:16 +02:00
Thomas Pointhuber
056748e0df
altium: Add testcase to verify that "PCB Binary Version 5.0" is also supported
2022-04-02 18:17:19 +02:00
Thomas Pointhuber
406c528ab7
altium: Create region for items on the KEEP_OUT_LAYER and use new Track unit-tests
2022-04-02 18:17:19 +02:00
Sylwester Kocjan
3da47e6123
qa: move pcbnew data to appropriate directory
2022-03-30 11:13:23 +00:00
Sylwester Kocjan
cfb8fbc644
qa: move eeschema data to appropriate directory
2022-03-30 11:13:23 +00:00
jean-pierre charras
f3be3a5762
test: update test files to fix DRC issues after changing the text position algo.
2022-03-30 10:56:16 +02:00
jean-pierre charras
93066004f1
QA: fix altium qa tests now the altium to pcbnew coordiantes are rounded
...
to the near 10nm value.
2022-03-24 12:36:46 +01:00
Jeff Young
d65019e280
Update tests.
2022-03-15 00:37:44 +00:00
Thomas Pointhuber
1831ae6fa4
altium: Fix test due to keepout restrictions parse changes
2022-03-12 09:59:57 +01:00
jean-pierre charras
4ad89b9c04
Fix qa tests after fix made in commit 878c70c1
2022-03-09 17:18:54 +01:00
Thomas Pointhuber
a9ebb42ecd
altium: Parse keepout restrictions of tracks
2022-03-07 19:58:43 +01:00
Seth Hillbrand
9d927f3135
Check for additional connections between tracks
...
Prevents removal when a track is connected not just to other tracks but
also other connected items
Fixes https://gitlab.com/kicad/code/kicad/issues/10916
2022-03-03 12:07:20 -08:00
Thomas Pointhuber
52a2d52bf0
altium: Parse solder and paste mask settings of tracks and arcs
2022-02-20 20:18:40 +01:00
Thomas Pointhuber
86c025eb30
altium: Fix parsing of zones which use the KEEP_OUT_LAYER
2022-02-19 14:37:05 +01:00
Seth Hillbrand
a19d9105f0
Fix SolderBridge check to only check across multiple
...
We should not generate an error when overlapping a single copper element
with a soldermask that is not associated with copper.
Fixes https://gitlab.com/kicad/code/kicad/issues/10906
2022-02-18 11:47:28 -08:00
Thomas Pointhuber
81b4229e12
altium: Improve test-coverage of *.PcbLib import functionality
...
* Add test-code for pads
* Move test-code into board_test_utils.cpp for reuse, one method per object
* Add a real (rather small) Altium footprint for testing purposes
2022-02-12 16:50:25 +01:00
Thomas Pointhuber
3f36e7d725
altium: Start with a test-suite to validate that *.PcbLib footprints are correctly imported
...
The test simply loads every footprint of a library, and compares all elements with an equivalent
KiCad footprint. This allows us to quickly spot regressions in the altium and kicad footprint importer,
and any code in-between. This test is only a demo, as the checks are still incomplete and quite a few
tests are missing.
It has to be noted that mask expansion is not supported rigt now by the altium importer, thus the
reference footprint is adjusted to keep the test happy.
2022-02-09 22:34:04 +01:00
Marek Roszko
28ce11212c
Emplace_back a bit a in clipper
2022-02-05 21:00:34 -05:00
Ola Rinta-Koski
9b406c1da4
Outline font support.
2022-01-08 16:47:45 +00:00
Marek Roszko
367431f825
Update solder_mask_bridge_test.kicad_pro to ignore library mismatches in test
2022-01-02 19:18:29 -05:00
Jeff Young
5f37c2b247
Custom rule severities.
...
ADDED severity token to custom rule syntax. Each rule can now define
its own severity.
Fixes https://gitlab.com/kicad/code/kicad/issues/6148
2021-12-24 15:42:22 +00:00
Jeff Young
3aa6d73770
Allow min/max/opt to come from different rules.
2021-12-24 12:36:37 +00:00
Jeff Young
4b6f2f0658
Add mechanical copper clearance testing for shapes.
...
Also includes going from distance-based neighbor exclusion to angle-
based. (Distance doesn't work when very short segments are followed
by very long ones.)
Fixes https://gitlab.com/kicad/code/kicad/issues/2512
2021-12-24 11:40:10 +00:00
Jeff Young
a48867ea01
Solder mask integrity testing.
...
ADDED DRC test for solder mask aperture bridging copper from different
nets.
ADDED visualization of minimum web width processing for solder masks.
ADDED allow_soldermask_bridges property for footprints.
Fixes https://gitlab.com/kicad/code/kicad/issues/2183
Fixes https://gitlab.com/kicad/code/kicad/issues/1792
2021-12-23 22:31:14 +00:00
Jeff Young
a1e3f2b188
Starved thermals DRC checking.
...
ADDED min_resolved_spokes constraint.
ADDED "Thermal relief connection to zone incomplete" violation.
Fixes https://gitlab.com/kicad/code/kicad/issues/2183
2021-12-23 22:30:42 +00:00
Jeff Young
32721755bf
Hook up zone-pad connections to custom rules.
...
ADDED zone_connection constraint.
ADDED thermal_relief_gap and thermal_spoke_width constraints.
ADDED angle override for thermal relief spokes in Pad Properties.
Fixes https://gitlab.com/kicad/code/kicad/issues/4067
2021-12-23 22:30:26 +00:00
Jeff Young
0a609dd48d
Add footprint library checking to DRC.
...
Fixes https://gitlab.com/kicad/code/kicad/issues/6821
2021-12-23 19:18:45 +00:00
Mikolaj Wielgus
e1cc7cfbe0
Change wire width from 5 mils back to 6 mils
...
These were remnants of https://gitlab.com/kicad/code/kicad/-/issues/7865
2021-11-07 14:32:27 +00:00
Jeff Young
a397e85589
Implement PTH/NPTH/courtyard collision tests.
...
Fixes https://gitlab.com/kicad/code/kicad/issues/9081
2021-09-04 00:16:26 +01:00
Jeff Young
1e23ce1c95
Pull some fixes back from 7.0.
...
1) An earlier 6.0 fix to apply pad clearance overrides to NPTH pads
got broken, so this replaces it.
2) Allow min/max/opt to be set by different rules.
3) Fixes a bug where board minimum enforcement over a local override
didn't get the right message text.
2021-08-21 16:43:11 +01:00
Jeff Young
a208dac8d8
Convert hole clearance tests from NPTH holes to all holes.
2021-08-09 22:26:00 +01:00