The last segment of a track could be removed when the iterator does not
correctly loop. Keeping the ll within bounds and checking for
equivalency instead of comparison works for last point
Includes:
- Fix GAL to draw closed polygons in eeschema
- Add functionality to eeschema to draw arbitary polygons
- Update polygon item previews to have customisable edge colour
- Add new SCH_RULE_AREA class, derived from a poly SCH_SHAPE
- Add SCH_RULE_AREA to paint and plot methods
- Add new rule area color preference to themes
The schematic net names are fully unique but if we have multiple pads
that are mapped to a NC pin, they need to have unique net names so that
they do not get connected to each other in the ratsnest. This breaks
the schematic parity check as we have modified the netname for some
pads. To work around this, we first maintain the zero-th net without
suffix and then add an additional check in DRC to ensure that we allow
unconnected nets as long as the share a common prefix with the schematic
netname.
The connectivity routine would consider symbols, overwriting unused
subgraphs for pins that were not in the change list. This is resolved
by updating the full connectivity to only use pins in the graph since
symbols are not connected independently.
In the process of adding QA tests for this change, additional issues
with the schematic QA were discovered. Specifically, we were not
properly setting the root sheet UUID. This was partially masked by a
const_cast setting of the RefDes in sch_symbol when called the RefDes
getter. This exposed the fact that our QA ERC numbers did not match the
schematic editor stand alone ERC numbers. So the test value for one
check needed to be updated
Fixes https://gitlab.com/kicad/code/kicad/-/issues/17528
When we add vertices to the tesselation routines, we cannot reuse these
without the original vertex points.
It may be possible to copy and modify the vertices from the hint data so
that they are properly positioned but naive attempts (moving based on
first point) did not work, so for now, we disable the hint cache when
the vertex sizes do not match as this prevents OOB access
Fixes https://gitlab.com/kicad/code/kicad/-/issues/17621
Polygon intersections happen against the original outline, not against
the currently remaining polygon. This avoids pathalogical cases
Adds new simplification system to avoid duplicated points
Adds new edge-splitting algorithm to provide additional fall-back
Verifies that polygon cuts do not swap holes for outlines (negative
area)
Fixes https://gitlab.com/kicad/code/kicad/-/issues/17559
The clearance between two zones could be rather slow. This was in part
to trying to do triangle-triangle collisions between zones when we only
need outline collision and in part to the shape_line_chain collision
routine. The shape_line_chain collisions don't need to recreate
segments on each iteration and should instead create them once and using
this to check all collisions
Fixes https://gitlab.com/kicad/code/kicad/-/issues/17327
These need to be re-done in a way that is more
tolerant of the inherent instability/noise in
the simulated circuits (or more ideally, changed
to test a particular thing that can be more
well-defined rather than just simulating a circuit
and seeing if the numbers come out a certain way)
Seth Hillbrand
Alex Shvartzkop
Jeff Young
James J
Marek Roszko
Jon Evans
Roberto Fernandez Bautista
Mike Williams
Tomasz Wlostowski