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93 Commits

Author SHA1 Message Date
Jeff Young e083cbaf50 Allow a single net collision with a free pad. 
(cherry picked from commit 3534cfbba8)
 2022-11-29 22:16:15 +00:00
Jeff Young fde2b429b9 Make sure pair caches are layer-specific where they need to be. 
(cherry picked from commit 909358e643)
 2022-10-24 10:57:07 +01:00
Seth Hillbrand e834374ad2 Drill size is absolute 
Use hole plating size for visibility only, not zone filling, routing or
DRC

(cherry picked from commit b4f3390626)
 2022-10-04 10:00:36 -07:00
Seth Hillbrand c45aa734b0 Fix missing DRC via/track check 
Depending on pointer ordering, the via/track clearance check might not
run as we were only checking when the first element was a track not via.

Re-written version of 0150655ed3 for v6
 2022-09-20 15:32:55 -07:00
Seth Hillbrand 69858ab4c0 Remove shared wxString instance in DRC 
Threaded DRC access will write to this string, re-allocating the memory
without any synchronization between threads using the string.  Comment
adding this listed performance as a reason for using shared strings.
Measured performance does not seem noticeably different in either case,
even with high-error count boards.  If there is a case where the
performance is limiting, we can replace these wxStrings with
std::wstring and utilize fmt

Fixes https://gitlab.com/kicad/code/kicad/issues/9888

(cherry picked from commit 5327b10064)
 2022-06-21 10:27:21 -07:00
Jeff Young f8c92e355b Plating thickness appears on both sides of hole wall. 2022-04-04 21:51:30 +01:00
Jeff Young ff604cc6a3 Pull some fixes back from master. 
Mostly wxT(), but also some performance, and some for better response
to Cancel button.

(cherry picked from commit 5c63df28e4)
 2022-03-18 12:49:54 -07:00
Seth Hillbrand b0f8055377 Revert "Pull some fixes back from master." 
This reverts commit 5c63df28e4.
 2022-03-17 16:21:37 -07:00
Jeff Young 5c63df28e4 Pull some fixes back from master. 
Mostly wxT(), but also some performance, and some for better response
to Cancel button.
 2022-03-16 15:15:09 +00:00
Jeff Young 856cc26d4c Allow vias the same same-net waiver that pads have for hole clearance 
Note that in 7.0 we have physical_hole_clearance rules to give a bit
more expressivity here.

Fixes https://gitlab.com/kicad/code/kicad/issues/9420
 2021-10-18 18:09:40 +01:00
Jeff Young b52529521e Replace individual LIB_* shapes with LIB_SHAPE (based on EDA_SHAPE). 
Also moves to more capable FILL_T model that can be shared.
 2021-10-15 12:45:43 +01:00
Wayne Stambaugh 3b16c38756 Coverity issue fixes. 
Fix Coverity issues 157138, 338547, and 338716.
 2021-09-08 14:51:27 -04:00
Jeff Young fec34e8dd8 Get rid of an extraneous layer parameter. 
Also adds a bit of nullptr safety.
 2021-08-23 20:00:17 +01:00
Jeff Young d34e9e8946 Code safety. 2021-08-13 21:28:11 +01:00
jean-pierre charras f4a7565b9c fix a compil warning 2021-08-11 08:16:26 +02:00
Jeff Young a208dac8d8 Convert hole clearance tests from NPTH holes to all holes. 2021-08-09 22:26:00 +01:00
Jeff Young 096e342386 Prefix TRACK, ARC and VIA. 2021-06-11 22:07:02 +01:00
Jeff Young 16b0147af8 Prefix DIMENSION types. 2021-06-11 17:59:44 +01:00
Marek Roszko 10e60acf34 Clean up including of board_design_settings.h 2021-06-06 15:03:42 -04:00
Ian McInerney 4f05262705 Cleanup includes in board.h and footprint.h 2021-06-03 20:19:52 +01:00
Jeff Young 00ed75b891 Fix DRC performance with multi-layer keepout zones. 
The main issue was a parameter mismatch which caused On^2 behaviour
for zone layers.

But there are several other performance optimizations here, along
with status bar updating for zones while running the dissallow test.

Fixes https://gitlab.com/kicad/code/kicad/issues/8521
 2021-06-02 14:11:43 +01:00
Marek Roszko 03cf2b517f Enum class PAD_ATTR_T 
Renamed such that python stays the same
 2021-05-01 10:51:54 -04:00
Jeff Young b65b1f8e9c Revert NPTH commit, and add some comments. 2021-04-26 17:33:49 +01:00
Jeff Young e3eacafbcb Run hole clearance tests on NPTH pads, but not copper clearance. 
Fixes https://gitlab.com/kicad/code/kicad/issues/8295
 2021-04-25 17:55:43 +01:00
Jeff Young 2cde76a191 Don't do any hole clearance testing within a single footprint. 
Fixes https://gitlab.com/kicad/code/kicad/issues/8141
 2021-04-11 16:03:16 +01:00
Jeff Young 3450610977 Add ability to allow thermal vias to be implemented as pads. 
This is mostly just for CADSTAR.  Since we don't (yet) have general
purpose footprint attributes, this reuses the "net tie" hack.

Fixes https://gitlab.com/kicad/code/kicad/issues/8141
 2021-04-09 14:02:13 +01:00
Jeff Young 6d6765cdaf Improve DRC status reporting. 
1) Don't report on tests not run.
2) Don't cancel subsequent tests because the current test didn't
have any constraints
3) Exit a little bit quicker when cancelled

Fixes https://gitlab.com/kicad/code/kicad/issues/7724
 2021-02-27 13:44:45 +00:00
Jeff Young 4ede4e061e More DRC performance work. 
Push DRC zone RTrees into BOARD so that they can also be used by
insideArea.

All these caches are a bit of an encapsulation leak, but they make a
significant impact on performance.

Fixes https://gitlab.com/kicad/code/kicad/issues/7720
 2021-02-27 11:45:04 +00:00
Jeff Young d523129929 Minor performance improvements. 
Fixes https://gitlab.com/kicad/code/kicad/issues/7720
 2021-02-26 17:58:08 +00:00
Jeff Young 6272b48481 Make sure layer gets passed in to rules evaluation. 2021-02-08 14:53:49 +00:00
Jeff Young 8571687f51 Upgrade place via tool to new DRC. 
Fixes https://gitlab.com/kicad/code/kicad/issues/7358
 2021-02-01 23:00:13 +00:00
Seth Hillbrand 23c6dbff38 Need to check track/track clearance 
The misplaced else prevented non-track/track intersection clearances
from being reported

Fixes https://gitlab.com/kicad/code/kicad/issues/7376
 2021-02-01 10:08:27 -08:00
Jeff Young 2d8cac658e Allow negative clearances to signal supression of DRC test. 2021-01-23 00:10:01 +00:00
Jeff Young da4b269783 Make sure pad local clearances get in to m_worstClearance. 2021-01-13 12:37:20 +00:00
Jeff Young 33aa6edb01 Don't run clearance tests on unflashed NPTH pad layers. 2021-01-04 00:03:21 +00:00
Jeff Young 018c17399d SNR. 2021-01-01 23:17:49 +00:00
Jeff Young 8300e17b69 Fix botched attempt to report hole violations between no-net items. 
Fixes https://gitlab.com/kicad/code/kicad/issues/6851
 2020-12-26 16:24:51 +00:00
Jeff Young af2219ba7f Finish implementation of hole clearance checking. 
It appears we never did via hole testing, and pad hole testing didn't
appear to get much testing.
 2020-12-25 22:32:19 +00:00
Jeff Young 4c5567a627 Allow colliding pads in netties as well as graphic shapes. 
Fixes https://gitlab.com/kicad/code/kicad/issues/6584
 2020-12-05 19:44:02 +00:00
Jeff Young dadfe03804 Reinstate 5.1 net-tie hack since "real" net-ties got pushed to 7.0. 
Fixes https://gitlab.com/kicad/code/kicad/issues/6556
 2020-11-30 16:11:15 +00:00
Jeff Young 3989c19c41 Don't test pad:track clearances in pad tester. 
They've already been tested in the track tester.

Fixes https://gitlab.com/kicad/code/kicad/issues/6554
 2020-11-30 14:38:06 +00:00
Jeff Young e09271ca0e Fixes for hole clearance and hole-to-hole tests. 
1) Separate out CONSTRAINT types
2) Filter both source and dest pads/vias for drilled holes when doing
   hole-to-hole checks.  We were checking the items being put into the
   DRC RTree, but not the items we were scanning.
3) Add hole clearance to Board Setup Constraints panel.

Fixes https://gitlab.com/kicad/code/kicad/issues/6546

Fixes https://gitlab.com/kicad/code/kicad/issues/4683
 2020-11-29 23:35:23 +00:00
Jeff Young e4d0ffd607 Retire old SKIP_STRUCT filtering. 
We already added the checkedPairs stuff which deals with a:b vs b:a
better, and the SKIP_STRUCT version had side-effects between the two
tests.

Fixes https://gitlab.com/kicad/code/kicad/issues/6539
 2020-11-29 00:08:23 +00:00
Jeff Young 9c7c05c161 Mostly formatting cleanup but a few type-casting cleanups too. 2020-11-24 22:16:41 +00:00
Jeff Young 533d344e3f Honour pad falshing when colliding with DRC RTree. 
Fixes https://gitlab.com/kicad/code/kicad/issues/6443
 2020-11-19 23:55:14 +00:00
Jeff Young bfc4afc506 Restore the 5.1 NetTie hack. 
We really need to do first-class net ties....

Fixes https://gitlab.com/kicad/code/kicad/issues/6416
 2020-11-17 20:07:21 +00:00
Jeff Young b2d86ec7c9 Don't double-check DRC clearances (a:b and b:a). 
Fixes https://gitlab.com/kicad/code/kicad/issues/6417
 2020-11-17 16:58:39 +00:00
Jeff Young bdbb68f813 MODULE -> FOOTPRINT. 2020-11-13 16:04:03 +00:00
Jeff Young 52a46341db More module -> footprint. 2020-11-13 15:16:24 +00:00
Jeff Young f5443de7f9 D_PAD -> PAD. 2020-11-13 15:16:24 +00:00