2e6968e7eb
Board edges tester also needs to check silk text for visibility.
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Fixes https://gitlab.com/kicad/code/kicad/issues/5989
2020-10-13 00:58:38 +01:00
83d231cd49
Fix test under msvc
2020-10-12 19:47:36 -04:00
8c4197db2a
Netclass track widths and via sizes are opts, not mins.
2020-10-13 00:34:10 +01:00
cd1a5ed6fb
Implement progress reporting for DRC RTree.
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Also fixes a bug in silk-to-mask checking which wasn't checking
zones on the mask layer.
Also a perfomance fix for the DRC RTree to use a hash table (std::map)
instead of a std::set for keeping track of known collisions.
Fixes https://gitlab.com/kicad/code/kicad/issues/5851
2020-10-13 00:03:58 +01:00
5afae757ff
Remove silk_clearance == 0 hack now that we have implied rules.
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Fixes https://gitlab.com/kicad/code/kicad/issues/5977
2020-10-12 21:13:26 +01:00
af90642440
Hook board edge clearance constraints up to zone filling.
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Also hooks them up to the clearance resolution reporter, and makes
some general improvements to reporting.
Fixes https://gitlab.com/kicad/code/kicad/issues/5947
2020-10-12 18:31:00 +01:00
32dffd27ab
Add silk clearance to board setup constraints.
2020-10-12 18:31:00 +01:00
1bcefe420a
Move compound graphics tests back out to the shared path.
2020-10-12 11:46:08 +01:00
72f6127e53
Clean up terminology so it matches the user message better.
2020-10-12 00:14:32 +01:00
8e70381be3
Don't try and infer optimum widths for board minimums.
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It doesn't work well with sorting the implicit rules by clearance.
Fixes https://gitlab.com/kicad/code/kicad/issues/5951
2020-10-11 17:17:21 +01:00
af28ef9d56
Add silk clearance checking to Resolve Clearances...
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Also fixes a bug in order of RTrees in silk collision checker.
2020-10-11 14:18:11 +01:00
42eecdfd3a
Collapse silk constraints down to one.
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Also updates the rule syntax help and code-completion with a bunch
of diff-pair and other stuff that hadn't been updated yet.
2020-10-11 13:19:23 +01:00
bcebb19665
Add implied diffpair netclass rules.
2020-10-11 13:19:23 +01:00
22cde88ba9
Allow chamfering/filleting of zone/board edge intersections.
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Fixes https://gitlab.com/kicad/code/kicad/issues/5947
2020-10-10 23:09:43 +01:00
04c4012ee6
Make track/via sizes UI more predictable and compatible with DRC.
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Two main changes: netclass values need to go through the DRC engine
so they can interact with other rules. They're also now dependent
on the layer being routed as well as the start object.
Also make the controls adjust to each other better. For instance,
copy-track-width needs to turn off when you select a particular
track width, and a particular track width needs to zero out when
you choose copy-track-width.
Fixes https://gitlab.com/kicad/code/kicad/issues/5951
2020-10-10 19:32:30 +01:00
fdeb340d21
Defensive code against missing nets.
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Also adds net re-parenting code to Repair Board.
Fixes https://gitlab.com/kicad/code/kicad/issues/5935
2020-10-10 16:54:19 +01:00
90baed7e82
Fix typo of transposed semi-colon and comma.
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Also eases translation of strings while we're here.
Fixes https://gitlab.com/kicad/code/kicad/issues/5933
2020-10-10 12:25:22 +01:00
1fc94c7a2d
Fix printf arg mismatch.
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Fixes https://gitlab.com/kicad/code/kicad/issues/5933
2020-10-09 13:57:49 +01:00
0c7630f8b4
Get rid of wxWidgets assert.
2020-10-09 00:31:29 +01:00
4f2e574f4b
Move IsADiffPair to drc_engine.cpp for now.
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Otherwise we have to include drc_test_provider_diff_pair_coupling.cpp
in CVPCB, which isn't ideal either.
I'll let Tom figure out the best plan going forward, but this should
at least get things compiling/linking again.
2020-10-09 00:05:22 +01:00
6550e01318
Sort synthetic netclass rules by min clearance.
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This way when 'A' and 'B' have different netclasses the largest will
fire (rather than just a random one of the two).
Fixes https://gitlab.com/kicad/code/kicad/issues/5926
2020-10-08 23:41:27 +01:00
b5fa523a11
PCB_EXPR_EVALUATOR: added isDiffPair() API method
2020-10-09 00:01:26 +02:00
5c2c66dd07
drc: sane default rules for via diameters/diff pair widths/diff pair gaps (required by the P&S)
2020-10-09 00:01:26 +02:00
8a7fc7e970
drc: more robust segment pair detection, still issues with approximated arc corners though...
2020-10-07 16:36:37 +02:00
719363fa4a
Factor out class MINOPTMAX<> into a separate header
2020-10-07 16:36:37 +02:00
f620f8bdd3
Report silk/edge collisions.
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Fixes https://gitlab.com/kicad/code/kicad/issues/5854
2020-10-06 13:20:52 +01:00
0751965b2b
Be more responsive to user cancel.
2020-10-05 22:31:52 +01:00
5705859e9e
Remove accidental debug code.
2020-10-05 12:27:21 +01:00
37906511f5
Class renaming.
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DRAWSEGMENT -> PCB_SHAPE
EDGE_MODULE -> FP_SHAPE
TEXTE_PCB -> PCB_TEXT
TEXTE_MODULE -> FP_TEXT
2020-10-05 11:55:33 +01:00
7a4900b8dc
PCB_LINE_T -> PCB_SHAPE_T and PCB_MODULE_EDGE_T -> PCB_FP_SHAPE_T
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Also updated footprint text and zone types for consistencey.
2020-10-04 16:49:04 +01:00
85c6cebd77
Rework silk-to-pad checker to handle all solder mask clipping of silk.
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Fixes https://gitlab.com/kicad/code/kicad/issues/5851
2020-10-04 13:21:01 +01:00
36ceb8075e
Fix logic bug in DRC RTree handler.
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Return value from visitor is whether or not to keep searching, not
whether or not there was a collision.
2020-10-04 13:21:01 +01:00
44580acee2
Clean up some compiler warnings.
2020-10-03 22:55:34 +01:00
400c15b8eb
Add mils to units, remove useMils variables
2020-10-03 20:06:56 +00:00
3144bab36f
final cleanup about removing useless include
2020-10-03 16:40:36 +02:00
0b23cb7dbb
more cleanup about removing useless include
2020-10-03 15:26:03 +02:00
bea5914726
Make sure all DRC paths check for via/pad being flashed on layer.
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Fixes https://gitlab.com/kicad/code/kicad/issues/5830
2020-10-03 14:20:19 +01:00
e76736b7bf
Fix a few Coverity warnings
2020-10-03 12:47:41 +02:00
5ef1dc17ad
drc: ignore silk2pad/silk2silk violations for hidden text objects
2020-10-02 21:06:52 +02:00
ca8aca6faa
drc: implement DRC_RTREE::CheckColliding
2020-10-02 21:06:52 +02:00
8eb9d34aad
drc: silk to silk clerance test should not report errors for hidden text
2020-10-01 18:55:53 +02:00
aee16efe32
drc: LVS test should not throw an error if running in no-project mode
2020-10-01 18:55:53 +02:00
f702da95c7
Minor code cleanup, step2: remove more useless include.
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fix also a minor compil warning
2020-10-01 15:39:47 +02:00
3f8c9d49f8
Revert "Code cleanup: remove useless wx/wx.h include inside a few files."
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due to compil issue on Linux
This reverts commit cffccc3970
2020-09-30 20:47:20 +02:00
cffccc3970
Code cleanup: remove useless wx/wx.h include inside a few files.
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in most of files, including wx.h is not necessary, when only 2 or 3 wx files must be included.
Moreover, on windows, including wx.h sometimes create compil warnings about
shadowed vars defined in some specific windows headers.
2020-09-30 20:03:27 +02:00
bf3cb0b1d0
Standardize pad type enums
2020-09-30 08:38:35 -07:00
d3f8f2b81e
Remove confusion between pad->IsOnLayer and pad->IsPadOnLayer
2020-09-30 11:50:51 +01:00
ab033327c7
Limit checks need to be done at start, not end.
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(We also use the limit checks to ignore violations.)
Fixes https://gitlab.com/kicad/code/kicad/issues/5831
2020-09-29 21:23:26 +01:00
2cf303bb09
Test against pad hole cylinder when pad is not on layer.
2020-09-29 18:18:19 +01:00
66454ec895
Don't do hole-to-pad clearance testing on compound pads.
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Fixes https://gitlab.com/kicad/code/kicad/issues/5822
2020-09-29 14:11:32 +01:00
Jeff Young
Marek Roszko
Tomasz Wlostowski
Mikolaj Wielgus
jean-pierre charras
Seth Hillbrand