* Cleanup namespace in enum ZoneConnection in pcbnew/zones.h to self-explained names unification: PAD_ZONE_CONN_INHERITED, PAD_ZONE_CONN_NONE,PAD_ZONE_CONN_THERMAL,PAD_ZONE_CONN_FULL, PAD_ZONE_CONN_THT_THERMAL
Eagle plugin: if a board has a odd number of copper layers, the converted board copper layer count is rounded to the next even count (a odd count creates issues in .kicad_pcb files).
2) Change from legacy Cu stack to counting down from top=(F_Cu or 0).
The old Cu stack required knowing the count of Cu layers to make
sense of the layer number when converting to many exported file types.
The new Cu stack is more commonly used, although ours still gives
B_Cu a fixed number.
3) Introduce class LSET and enum LAYER_ID.
4) Change *.kicad_pcb file format version to 4 from 3.
5) Change fixed names Inner1_Cu-Inner14_Cu to In1_Cu-In30_Cu and their
meanings are typically flipped.
6) Moved the #define LAYER_N_* stuff into legacy_plugin.cpp where they
can die a quiet death, and switch to enum LAYER_ID symbols throughout.
7) Removed the LEGACY_PLUGIN::Save() and FootprintSave() functions.
You will need to convert to the format immediately, *.kicad_pcb and
*.kicad_mod (=pretty) since legacy format was never going to know
about 32 Cu layers and additional technical layers and the reversed Cu
stack.
Removed SetCurrentClassName() (it was not used anywhere and less safe than SetCurrentClass()).
Added BOARD_DESIGN_SETTIGNS::GetDefault() to make some pieces of shorter and clearer.
Most of the changes are just adding GetDesignSettings() before every occurence of m_NetClasses.
More complex changes:
class_netclass.cpp - NETCLASS does not store the pointer to the parent BOARD anymore. Added function SetParams( BOARD_DESIGN_SETTINGS& ).
class_netclass.h - Removed GetTrackMinWidth(), GetViaMinDiameter(), GetViaMinDrill(), GetuViaMinDiameter(), GetuViaMinDrill() as they were refering to BOARD_DESIGN_SETTINGS anyway (they are not net class specific).
kicad_plugin.cpp - filters out empty nets (that are anyway not saved) when storing net class information. Previously it was done in NETCLASS::Format() function.
- SEGVIA becomes VIA
- Drill size moved from TRACK to VIA
- Removed shape from TRACK, becomes ViaType in VIA
- GetTrace becomes GetTrack, for uniformity
- Some minor constification and typo fixes
Renamed BOARD_CONNECTED_ITEM::SetNet() -> SetNetCode()
Added BOARD_CONNECTED_ITEM::GetNet() for accessing NETINFO_ITEM* of a given item.
Fixed module editor crash when launched to edit a module from a PCB.
Replaced some BOARD::FindNet( item->GetNet() ) calls with BOARD_CONNECTED_ITEM::GetNet().
GetNet() refers to the net code stored in the NETINFO_ITEM. SetNet() finds an appropriate NETINFO_ITEM and uses it.
Removing GetNet() & SetNet() (and the whole net code idea) requires too many changes in the code (~250 references to the mentioned functions).
BOARD_CONNECTED_ITEMs by default get a pointer to NETINFO_ITEM that stores unconnected items. This requires for all BOARD_CONNECTED_ITEMs to have a parent (so BOARD* is accessible). The only orphaned item is BOARD_DESIGN_SETTINGS::m_Pad_Master, but it does not cause any issues so far.
Items that do not have access to a BOARD (do not have set parents) and therefore cannot get net assigned, by default get const static NETINFO_LIST::ORPHANED.
Performed tests:
- loaded .kicad_pcb, KiCad legacy board, Eagle 6.0 board, P-CAD board - all ok
- load a simple project, reload netlist after changing connections in eeschema - ok
- save & reload a board - ok, but still contain empty nets
- remove everything, restore with undo - ok
- remove everything, reload netlist - ok
- changing net names (all possibilites: empty->existing, empty->not existing, existing->empty, existing->not existing) - all ok
- zones: when net is changed to a net that does not have any nodes besides the zone itself, it does not get filled
- ZONE_CONTAINER::m_Netname field
- ZONE_CONTAINER::SetNetName()
- ZONE_CONTAINER::SetNet() [it uses the one in BOARD_CONNECTED_ITEM]
- ZONE_CONTAINER::GetNetName() [instead BOARD_CONNECTED_ITEM::GetNetname is used]
- ZONE_CONTAINER::SetNetNameFromNetCode()
Performed tests:
- Drawn a zone that belongs to a net, then modified schematics so the net does not exist anymore. After reloading the net list, all pads/tracks are updated. Zones still belongs to the net that does not exist in the schematic (but still exists in .kicad_pcb file). After running DRC, the zone becomes not filled.
- Undo & redo affects assignment of a polygon to a specific net (you may change net of a polygon, refill it and undo/redo the changes).
D_PAD::GetNetname() and D_PAD::GetShortNetname() were moved to BOARD_CONNECTED_ITEM. Now they use the net name stored in NETINFO_ITEM.
Moved some one-line functions from class_board_connected_item.cpp to class_board_connected_item.h.
Added a copyright notice, moved Doxygen comments from class_board_connected_item.cpp to class_board_connected_item.h.
I have some doubts if changes introduced pcbnew/dialogs/dialog_pad_properties.cpp do not break anything, but I could not find a test case that breaks the pcbnew.
Performed tests:
- changed pad's net name from empty to existent - ok, name was changed
- changed pad's net name from empty to nonexistent - ok, error message is displayed, net name stays empty
- changed pad's net name from existent to empty - ok, net name became empty
- changed pad's net name from existent to nonexistent - ok, error message is displayed, net name is not changed
- (re)reading netlists, including net changes - fine, changes are applied, but empty nets are still kept
- loaded pcbnew/pcad2kicadpcb_plugin/examples/CK1202_V1.pcb to test P-CAD import plugin - ok, net names are correct
- imported an Eagle 6.0 board (Arduino Uno; http://arduino.cc/en/uploads/Main/arduino_Uno_Rev3-02-TH.zip) then saved in .kicad_pcb format and reloaded - ok, net names are correct
- saved demos/video/video.kicad_pcb in legacy format and then loaded it again - ok, net names are correct
* Replace illegal file system characters when reading legacy libraries to
prevent FPID parsing errors and allow saving to PRETTY file format.
* Create validator to filter illegal file system characters from footprint
name text edit controls to prevent issues when saving to PRETTY file format.
* Add missing source file licenses and some minor coding policy fixes.
comment for GITHUB_PLUGIN which should flow into Doxygen output.
*) Rewrote:
PCB_BASE_FRAME::Save_Module_In_Library(): now uses fp-lib-table and PROPERTIES.
PCB_EDIT_FRAME::ArchiveModulesOnBoard(): now can archive to any writable library type.
PCB_BASE_FRAME::SelectLibrary(): is now generic for selecting a library, not just the active library.
FIX: unique renaming of eagle footprints by substituting illegal : and / with URL encoding technique.
ADD: window resize border to DisplayError() windows.
Eagle plugin: filter and replace not allowed chars in FPID(-':' and '/') by _ or -, if they are used in Eagle footprint names (otherwise, boards converted and saved under kicad_pcb format are not readable by Pcbnew).
pass into an HTML rendering panel and otherwise look goofey.
*) Implement BOARD::Move() can call it from EAGLE_PLUGIN::Load().
*) When USE_FP_LIB_TABLE, tolerate blank nicknames in FPIDs coming from eeschema.
See the switch for this in pcbnew/netlist.cpp as ALLOW_PARTIAL_FPID.
*) Add an assert and a try catch block to figure out that View does not
like some eagle pcb board. bitset::set() is getting a -1 value and firing
an exception.
* Make footprint editor work properly with library table.
* Fix bug in Eagle plugin when comparing file timestamps.
* Fix bug in footprint viewer when error occur loading footprints from
the selected library.
* Fix error message display by in footprint viewer on library load error.
* Make footprint viewer work properly with library table.
* Fix bug in Eagle plugin when enumerating footprints.
* Add missing P-CAD plugin from footprint library table editing dialog.
* Fix bug in FOOTPRINT_INFO::LoadLibraries when error occur loading footprints
from libraries.
* Use FPID instead of wxString in MODULE object.
* Use FPID instead of wxString when loading and saving files.
* Use FPID in COMPONENT object.
* Add wxString helper functions and comparison operators to FPID.
* Add fp_lib token to pcb and netlist file formats.
* Add code to load and save FPIDs to pcb file format.
* Fix segfault when deleting invalid footprint library tables in Pcbnew
in non footprint library table build.
* Fix bug when counting the number of mod files in
EDA_APP::SetFootprintLibTablePath();
* Complete encapsulation of the ZONE_CONTAINER class.
* Fixed a bug in the EDA_TEXT::Format() default effects behavior due to
improper conversion to internal units and missing test for default
thickness.
* Improved grammar of some Pcbnew context menu strings.
* Moved some more cleverly hidden BOARD object methods into class_board.cpp.
* Lots of coding policy and documentation fixes.
* Complete encapsulation of the MODULE class.
* Complete encapsulation of the EDA_TEXT class.
* Encapsulate most of the ZONE_CONTAINER class.
* Add pcbcommon library as a dependency for reSWIGging the scripting
support. This should cover most dependency cases.
their type, by using the more abstract PLUGIN::Footprint*() functions.
This is an intermediate phase only, other changes will be necessary as library table support comes in.
Encapsulate usage of library path searching, since that will go away as library table support comes in.
Add FOOTPRINT_EDIT_FRAME::{get,set}LibPath() and FOOTPRINT_EDIT_FRAME::{get,set}LibNickName() functions
to provide this encapsulation.
This required the additional compiler command line option "-std=c++0x".
2) Switch to unique_ptr from auto_ptr which is C++ deprecated.
3) Change to new English layer names per mailing list discussion, see class_board.cpp.
4) When saving to *.kicad_pcb or *.kicad_mod, identify opportunities to use wildcard
layer sets, for pads so far.
5) Switch to two std::string hashtables in pcb_parser.cpp, away from one wxString based one
for layer names and layer sets mapping. One hashtable holds the mask, the other the index.
Layer sets are only in the mask table.
6) Move "LOCALE_IO toggle" into PCB_IO::Format() since it is a public API function and
caller should find it as convenient as possible to use. LOCALE_IO should handle
nesting OK in the case where public Format() is called from one of the Footprint*()
functions.
7) Drop support for "export module to new library". Creating new libraries will have to
be handled in concert with library table entries, and we've talked recently about
creating a better footprint library manager, one that resides in a DLL/DSO. So
this kind of functionality needs to be handled in there in the near future.
8) Change name of exported PCB_IO module/footprint to *.kicad_mod and not *.emp.
pad and via sizes from those settings when diameter is not given
in the local object. Calculation algorithms are inferred from the
UI help of the Eagle program.
For edge connector type of footprints, some copper pads can be on the
back side even within packages.
Flipping of packages to back was not being done correctly, but I think this
is working now.
There are still remaining issues with text positioning that I am working on.
* Derive the pcbnew copper zone and non-copper zone dialog windows from DIAG_SHIM,
which injects some template code.
* Update UIpolicies.txt to talk about DIALOG_SHIM support.
* Add zone support to eagle_plugin.
* Organize ZONE_CONTAINER class declaration for future privacy and accessors.