Commit Graph

82 Commits

Author SHA1 Message Date
Mikolaj Wielgus e5704d7058 Update uopamp.lib.spice to be the same in all QA tests 2022-10-18 06:15:54 +02:00
Mikolaj Wielgus c8e13813d9 Sim: Rename Sim_Disabled field to Sim_Enable 2022-10-16 00:49:44 +02:00
Mikolaj Wielgus c3d5b3b3e5 Sim: Only store device type in reference, not full model type
Instead of Reference="VSIN1", Value="dc=1 ampl=2 f=3", it's now
Reference="V1", Value="SIN dc=1 ampl=2 f=3".
2022-10-15 19:36:26 +02:00
Seth Hillbrand 60374daa49 Fix ERC global label unit tests
Need to test all units in the subgraph as there are chances that the
subgraph might have more than one label, which needs to be consistently
handled
2022-09-12 13:16:45 -07:00
Mikolaj Wielgus 0e0d1a34f5 Sim: Spice grammar fixes
- Fix parsing .model lines with model names containingnon-alphanumeric
  characters like - and _,
- Fix parsing libraries in which EOF is not preceded by a newline.

Fixes https://gitlab.com/kicad/code/kicad/issues/12394
2022-09-12 04:05:17 +02:00
Mikolaj Wielgus e56635a02b Sim: Add mutual inductor model 2022-09-11 19:23:01 +02:00
Seth Hillbrand f2e3329617 Add ERC QA tests 2022-09-09 17:21:57 -07:00
Mikolaj Wielgus b225e53135 Sim QA: Test raw model with fewer pins than its symbol 2022-09-02 16:42:15 +02:00
Mikolaj Wielgus 121fad63ab Sim QA: Add Directives test
This test checks whether Spice directives placed in schematics as text
objects are properly included in the generated Spice netlist.
2022-08-31 09:41:35 +02:00
Mikolaj Wielgus bd6c153ad9 Sim: Implement "enum" model parameters for switches
Displayed in Sim Model Dialog parameter grid as a dropdown
(wxEnumProperty).
2022-08-30 09:45:49 +02:00
Mikolaj Wielgus 385e5deaaa Add Switches sim QA test
Tests voltage switches. Current switches will be tested as well once
they're fixed to work with .probe alli command in Ngspice.
2022-08-29 04:30:21 +02:00
Mikolaj Wielgus 103b8a0d2c Update the Opamp test to use a symbol with unordered pins 2022-08-26 04:36:48 +02:00
Mikolaj Wielgus c6defadb78 Add Fliege filter Spice netlist exporter test
Which we use to test multi-part symbols, as Fliege filter has two op
amps.
2022-08-25 08:47:31 +02:00
Mikolaj Wielgus 8a6a0ff7dc Allow inferred voltage/current sources to have a single float in Value
Update Opamp test to use this feature.
2022-08-24 06:19:38 +02:00
Mikolaj Wielgus b6f6d1ef81 Sim QA: Add legacy_opamp test to check legacy subckt fields
In particular, Spice_Node_Sequence needed some additional coverage.
2022-08-11 21:23:05 +02:00
Mikolaj Wielgus c669d55eb8 Sim QA: Use uopamp_lvl2 instead of uopamp_lvl1 in Opamp test 2022-08-11 18:32:20 +02:00
jean-pierre charras cc1e99ff5d QA test: annotate rlc.kicad_sch. only annotated schematic give reliable result. 2022-08-10 11:16:07 +02:00
Mikolaj Wielgus 128fedec1a Sim QA: Commit the missing rlc unit test project 2022-08-08 22:05:15 +02:00
Mikolaj Wielgus f6771ed789 Sim QA: Add rlc project to test RLC ideal model inference 2022-08-08 17:06:50 +02:00
Mikolaj Wielgus 9e7bc585ef Sim QA: Test only specific hardcoded points of the results
We don't want to assume Ngspice results to be very deterministic.
2022-08-04 21:07:43 +02:00
Mikolaj Wielgus 800b512fe8 Further cut off digits down to one after period in sim QA
We just want to make sure our netlist exporter works. Being
deterministic is the simulator's job, not ours, though perhaps we should
investigate that too eventually.
2022-08-03 16:25:00 +02:00
Mikolaj Wielgus 37209bb496 Try to fix Ngspice QA by resampling and cutting off value digits
`linearize` command resamples the data. Fourth and further digits from
decimal point are cut off by using `wrdata` command instead of `write`.
Oddly, "sources" unit test is not working (so it's still uncommented) --
some substantially different values are generated when generating the
reference with standalone Ngspice.
2022-08-03 14:28:01 +02:00
Mikolaj Wielgus d7e5254c17 Comment out failing sim QA tests
The tests will probably have to test against manually specified bounds
and inexact points.

Added a previously mistakenly uncommitted cmos_not.csv.
2022-07-30 09:19:20 +02:00
Mikolaj Wielgus 7cf5138c63 Sim: Bugfixes, mostly for MS Windows compilation errors
Unfortunately, Windows headers define a lot of macros for common words,
so we had to rename some enums to not collide.

We also fix some of the many bugs related to the new simulation
architecture and the Spice Model Editor dialog.
2022-07-30 02:25:34 +00:00
Mikolaj Wielgus 739b9255d9 Sim Model Editor improvements
- Tab-switching,
- Automatic expansion of categories on tab-switch,
- Various minor simulation improvements,
- Various new simulation-related bugfixes.
2022-07-30 02:25:34 +00:00
Mikolaj Wielgus 6984f63af8 Sim: Transmission line models
Implement transmission line models and perform some adjustments to
the current models. Add some QA tests.
2022-07-30 02:25:34 +00:00
Mikolaj Wielgus fe38c622a9 Sim: Improvements to model serialization
Don't serialize parameters in certain models for default values. Infer
models from Value field for some kinds of models. Resolve synonyms when
loading models from Spice libraries.
2022-07-30 02:25:34 +00:00
Mikolaj Wielgus 6450ec6b85 Sim: Spice netlist exporter rewrite
Rewrite the spice exporter to work with the new simulation model
architecture and data model, with many bugfixes related to the latter
two along the way.
2022-07-30 02:25:34 +00:00
Jeff Young 09c9bc3037 Fix net ordering in gold file. 2022-05-27 21:28:17 +01:00
Jeff Young e9e1878d96 Attempt to fix eeschema tests.
(Slashes in netnames must be escaped or else we think they're path
separators.)
2022-05-27 17:53:11 +01:00
Roberto Fernandez Bautista 55f22c526a Fix annotation of incomplete multi-unit symbols and re-annotation of duplicates
Fixes https://gitlab.com/kicad/code/kicad/-/issues/11496
2022-05-26 09:23:36 +00:00
Sylwester Kocjan cfb8fbc644 qa: move eeschema data to appropriate directory 2022-03-30 11:13:23 +00:00