Commit Graph

192 Commits

Author SHA1 Message Date
Seth Hillbrand 819bdf4372 Fix qa failure 2024-05-21 16:26:00 -07:00
John Beard 6992afeb38 Consider a bus entry hitting a wire corner or tee to be dot-worthy
This doesn't change the connectivity, it just makes putting the
dot more closely match what the connectivity already does.

Fixes: https://gitlab.com/kicad/code/kicad/-/issues/18046
2024-05-20 12:40:29 +08:00
John Beard 6313b58ad6 Break out junction analysis so it can be tested in isolation
There are some corner cases with bus entries that could do with
care and it's a bit tricky to keep all the cases in mind at once!
2024-05-20 12:40:29 +08:00
Jon Evans e16130a02c Move pad and via properties into PADSTACK 2024-05-14 20:57:56 -04:00
Jon Evans c800fb790d Start unifying padstack properties 2024-05-14 20:57:56 -04:00
Jeff Young e73d2a32dc ADDED checkbox for saving SPICE digital event data.
Fixes https://gitlab.com/kicad/code/kicad/-/issues/17828
2024-05-12 18:24:53 +01:00
Thomas Pointhuber a44c106f62 Migrate Altium pcblib test to BOOST_DATA_TEST_CASE and use FootprintNeedsUpdate for equality checking 2024-05-12 18:41:31 +02:00
Thomas Pointhuber 3ade85bc8d Fix compilation error caused by trying to include boost/test/data/test_case.hpp by default 2024-05-12 17:29:40 +02:00
Thomas Pointhuber 0890594f75 Altium: migrate test_altium_parser_utils.cpp to use BOOST_DATA_TEST_CASE 2024-05-12 17:10:45 +02:00
Thomas Pointhuber 01892ab98f Altium: extend tests to handle new cases introduced with commit b7460f29b4 2024-05-12 17:01:30 +02:00
Thomas Pointhuber 4aca6ba294 Change test_altium_parser.cpp to use BOOST_DATA_TEST_CASE for parameterized tests 2024-05-12 16:58:25 +02:00
Jeff Young 29360b1aef Raw spice models don't have pin names. 2024-05-10 20:58:13 +01:00
Jon Evans e1f6d82a34 Fix lifetime of markers in DRCFalseNegativeRegressions 2024-05-07 12:21:06 -04:00
John Beard fa7e842c8c Rework item distribution
This splits the tool into two separate tools: by center and
by even gaps. Previously, this was automatically decided, based on
if the items could have any gaps between them. This was unintuitive
as it would appear to arrange by centre point sometimes but not others.
When items aren't all the same width, the results can then be very
different, based only on the starting positions.

The new behaviour is to have a dedicated tool for each, which echos
how graphical programs like Inkscape manage this.

The by-gaps method is then extended to work for overlapping items
(when items overlap, the overlaps are made equal). The logic is
centralised in kimath/geometry, and some QA is added. This should
make it easier to extend to eeschema, for example.

This also (attempts to) address some rounding issues which could
cause minor, but compounding, errors to build up along the list
of items.

Also, fix bugs in the collection filtering - previously items
like markers were filtered out only after the selection size
was used to compute the gaps between items.
2024-05-05 03:35:09 +08:00
Thomas Pointhuber e82b8f6fda Fix small memleak in test_lib_part.cpp 2024-05-04 13:12:25 +02:00
Seth Hillbrand 8463bd59b7 ADDED: Optional check for four way junctions
Defaults to off because this is likely contentious

Fixes https://gitlab.com/kicad/code/kicad/-/issues/17870
2024-05-03 12:06:24 -07:00
Seth Hillbrand 2139789c4c Move ERC items to their own directory 2024-05-03 12:06:24 -07:00
Seth Hillbrand 5bede7bddb Update QA to reflect current correct output
Previously, (v7), the NPTH had a too-large clearance.  This affected the
fill so that there was no island.  In v8, at some point, NPTH had zero
clearance, which was definitely incorrect but also did not create an
island.

Correcting this to have the appropriate clearance between copper and
NPTH results in one almost island that has a neck and is appropriately
caught by the copper connection check.
2024-05-02 12:16:05 -07:00
Seth Hillbrand 339cf3f2e2 Fix simplify routine for last segment
The last segment of a track could be removed when the iterator does not
correctly loop.  Keeping the ll within bounds and checking for
equivalency instead of comparison works for last point
2024-04-30 16:11:20 -07:00
Alex Shvartzkop 16e3692e71 Build time optimizations. 2024-04-27 23:49:13 +03:00
Jeff Young c59ed0bbb7 Flip symbol editor's Y axis to match other editors. 2024-04-27 13:47:56 +01:00
James J be8744176c Add SCH_RULE_AREA shapes to eeschema
Includes:
 - Fix GAL to draw closed polygons in eeschema
 - Add functionality to eeschema to draw arbitary polygons
 - Update polygon item previews to have customisable edge colour
 - Add new SCH_RULE_AREA class, derived from a poly SCH_SHAPE
 - Add SCH_RULE_AREA to paint and plot methods
 - Add new rule area color preference to themes
2024-04-25 14:24:46 +00:00
Jeff Young 95136494b3 RIP LIB_PIN. 2024-04-20 12:10:31 +01:00
Jeff Young d761b4f22f RIP LIB_TEXTBOX and LIB_SHAPE. 2024-04-16 16:31:16 +01:00
Jeff Young 3efe504dcc Collapse LIB_TEXT into SCH_TEXT. 2024-04-16 16:31:16 +01:00
Seth Hillbrand f61d400d88 Allow non-identical schematic/pcb nets
The schematic net names are fully unique but if we have multiple pads
that are mapped to a NC pin, they need to have unique net names so that
they do not get connected to each other in the ratsnest.  This breaks
the schematic parity check as we have modified the netname for some
pads.  To work around this, we first maintain the zero-th net without
suffix and then add an additional check in DRC to ensure that we allow
unconnected nets as long as the share a common prefix with the schematic
netname.
2024-04-15 17:54:44 -07:00
Jeff Young d77eae3e7e Collapse LIB_FIELD into SCH_FIELD. 2024-04-13 15:42:13 +01:00
Marek Roszko af2c52cf0a Remove wxT() that gets fed to ostream in boost and causes compile error 2024-04-12 23:06:23 -04:00
Seth Hillbrand a9f35ba42e Fix incremental connectivity
The connectivity routine would consider symbols, overwriting unused
subgraphs for pins that were not in the change list.  This is resolved
by updating the full connectivity to only use pins in the graph since
symbols are not connected independently.

In the process of adding QA tests for this change, additional issues
with the schematic QA were discovered.  Specifically, we were not
properly setting the root sheet UUID.  This was partially masked by a
const_cast setting of the RefDes in sch_symbol when called the RefDes
getter.  This exposed the fact that our QA ERC numbers did not match the
schematic editor stand alone ERC numbers.  So the test value for one
check needed to be updated

Fixes https://gitlab.com/kicad/code/kicad/-/issues/17528
2024-04-10 17:25:58 -07:00
Jeff Young 5abc7145da Fold LIB_ITEM into SCH_ITEM. 2024-04-08 10:24:50 +01:00
Jon Evans d77d31b663 Fix running pytest tests in macOS 2024-04-06 12:15:35 -04:00
Jeff Young 5dd8747ecb Harmonize mirroring APIs. 2024-04-06 09:34:56 +01:00
Jeff Young c5ed80af52 Harmonize rotate APIs. 2024-04-06 09:34:56 +01:00
Jon Evans 1dbe78c68b Add QA tests and expand serialization for API 2024-04-02 19:51:18 -04:00
Jon Evans 6bd02cae6d Refactor; add user control over API server 2024-04-02 19:51:18 -04:00
Jon Evans f613cd1cb4 ADDED: A new IPC API based on protobuf and nng
Details, documentation, and language bindings are works in
progress and will be evolving over the course of KiCad 9
development.
2024-04-02 19:34:36 -04:00
Seth Hillbrand 553e4a25bf Tidy up some remaining triangulation cases
Found and fixed a few corner cases where triangulation point removal
could reset expected points
2024-04-01 11:48:12 -07:00
Seth Hillbrand 06b199fd41 Do not use cache when we modify vertices
When we add vertices to the tesselation routines, we cannot reuse these
without the original vertex points.

It may be possible to copy and modify the vertices from the hint data so
that they are properly positioned but naive attempts (moving based on
first point) did not work, so for now, we disable the hint cache when
the vertex sizes do not match as this prevents OOB access

Fixes https://gitlab.com/kicad/code/kicad/-/issues/17621
2024-03-31 15:00:46 -07:00
Roberto Fernandez Bautista 6078bc52eb PNS: Fix a few memory leaks 2024-03-31 18:21:02 +02:00
Seth Hillbrand c3f6a84d66 Update triangulation to handle poly-intersection
Polygon intersections happen against the original outline, not against
the currently remaining polygon.  This avoids pathalogical cases

Adds new simplification system to avoid duplicated points
Adds new edge-splitting algorithm to provide additional fall-back
Verifies that polygon cuts do not swap holes for outlines (negative
area)

Fixes https://gitlab.com/kicad/code/kicad/-/issues/17559
2024-03-28 10:16:24 -07:00
Marek Roszko ab759d21f2 Fix more build warnings 2024-03-23 08:53:11 -04:00
Seth Hillbrand 6b915049d1 Check singular arcs connection
Even if there are no other segments in the line chain, we still should
check for arc connections in cases of individual arcs on a line chain
2024-03-22 10:41:42 -07:00
Marek Roszko 83ef5fd7d6 Move PGM_BASE to kicommon 2024-03-20 23:29:42 -04:00
JamesJ 2311eed08a Add new ERC rule to check for global labels with only one entry in the schematic
By default this rule is set to ignore to provide continuity for those using
single global labels to name nets (e.g. in simulation)

Fixes https://gitlab.com/kicad/code/kicad/-/issues/13212
2024-03-17 23:24:43 +00:00
Seth Hillbrand 3cc1617f5a Fix slow selection time when calculating clearance
The clearance between two zones could be rather slow.  This was in part
to trying to do triangle-triangle collisions between zones when we only
need outline collision and in part to the shape_line_chain collision
routine.  The shape_line_chain collisions don't need to recreate
segments on each iteration and should instead create them once and using
this to check all collisions

Fixes https://gitlab.com/kicad/code/kicad/-/issues/17327
2024-03-11 16:32:24 -07:00
Roberto Fernandez Bautista 43e1b36d4d SHAPE_LINE_CHAIN: Fix indices rotation after clipper
Also fix IsArcStart and IsArcEnd functions to work with chains that only
have arcs.
2024-03-02 12:09:09 +00:00
Roberto Fernandez Bautista 5920ee4598 SHAPE_LINE_CHAIN: Add test case of seg+large angle arc 2024-03-02 12:09:09 +00:00
Alex Shvartzkop defcb49ac8 Support Altium Schematic ASCII import 2024-02-29 20:49:20 +00:00
Jeff Young 532645c9b0 Add tables to eeItem test. 2024-02-25 21:08:38 +00:00
Jeff Young 3b560cef50 Fix some test errors. 2024-02-25 13:43:45 +00:00