Commit Graph

27 Commits

Author SHA1 Message Date
Maciej Suminski 8a4e723504 NETINFO_ITEMs are not stored in a vector anymore, instead they are held in a unordered_map. Now, the net codes may be not consecutive. There is another way for assigning net codes (using a static int that holds a possible empty net code and a function that makes sure it is not used [getFreeNetCode()]).
Removed some unused fields (NETINFO_ITEM::m_NbNodes, m_NbLink, m_NbNoconn, m_Flag).
2014-01-16 14:20:51 +01:00
Maciej Suminski d62b47a0df BOARD_CONNECTED_ITEMs do not store net code anymore (m_NetCode field), instead net info is stored using a pointer to NETINFO_ITEM.
GetNet() refers to the net code stored in the NETINFO_ITEM. SetNet() finds an appropriate NETINFO_ITEM and uses it.
Removing GetNet() & SetNet() (and the whole net code idea) requires too many changes in the code (~250 references to the mentioned functions).
BOARD_CONNECTED_ITEMs by default get a pointer to NETINFO_ITEM that stores unconnected items. This requires for all BOARD_CONNECTED_ITEMs to have a parent (so BOARD* is accessible). The only orphaned item is BOARD_DESIGN_SETTINGS::m_Pad_Master, but it does not cause any issues so far.
Items that do not have access to a BOARD (do not have set parents) and therefore cannot get net assigned, by default get const static NETINFO_LIST::ORPHANED.

Performed tests:
- loaded .kicad_pcb, KiCad legacy board, Eagle 6.0 board, P-CAD board - all ok
- load a simple project, reload netlist after changing connections in eeschema - ok
- save & reload a board - ok, but still contain empty nets
- remove everything, restore with undo - ok
- remove everything, reload netlist - ok
- changing net names (all possibilites: empty->existing, empty->not existing, existing->empty, existing->not existing) - all ok
- zones: when net is changed to a net that does not have any nodes besides the zone itself, it does not get filled
2014-01-15 18:03:06 +01:00
Maciej Suminski 3017b61711 Added NETINFO_LIST::UNCONNECTED constant. 2014-01-15 09:34:16 +01:00
Maciej Suminski bf80cc770e Changed the way of looking up NETINFO_ITEM using net names (using boost::unordered_map). Added a hash function (wxString) for that. Introduced NETINFO_ITEM::GetNetItem( wxString ). BOARD::FindNet() uses the map.
Net codes are updated upon net list update. (BOARD::ReplaceNetlist())
Added in some places (mostly class_board.cpp) pad->SetNet() calls to synchronize net codes.
On creation of NETINFO_LIST, the first NETINFO_ITEM is added (the unconnected items net).
Removed COMPONENT_NET::m_netNumber, as it was not used anywhere.
Added an assert to D_PAD::GetNetname(), checking if net code and net name is consistent for unconnected pads. Added an assert for NETINFO_LIST::AppendNet() to assure that appended nets are unique.

It seems that at this point:
- Updating net lists works fine. The only difference between the file ouput is that after changes it contains empty nets as well.
- Nets are not saved in the lexical order. Still, net names and net codes are properly assigned to all items in the .kicad_pcb file. It is going to be addressed in the next commit. I believe it should not create any problems, as pads are sorted by their net names anyway (NETINFO_LIST::buildPadsFullList())

Performed tests:
- Created a blank PCB, saved as pic_programmer.kicad_pcb (from demos folder). Updated net lists. .kicad_pcb file (comparing to the results from master branch) differ with net order (as mentioned before), net codes and timestamps.
- Removed some of components from the above .kicad_pcb file and updated net lists. Modules reappeared. .kicad_pcb file differs in the same way as described above.
- Trying to change a pad net name (via properties dialog) results in assert being fired. It is done on purpose (as there is a call to GetNetname() and net name and net code do not match). This will not happen after the next commit.
- Prepared a simple project (starting with schematics). Imported net list, changed schematic, reimported net list - changes are applied.
- Eagle & KiCad legacy boards seem to load without any problem.
2014-01-10 18:04:07 +01:00
Maciej Suminski 487b609e76 Removed NETINFO_ITEM::SetNet() and NETINFO_ITEM::SetNetname() methods.
NETINFO_ITEM::m_Net and NETINFO_ITEM::m_Netname are const.

Changes to be verified:
- pcbnew/minimun_spanning_tree.cpp: It segfaults is m_Size == 0
- pcbnew/exporters/export_gencad.cpp: I removed the SetNetname() call, as it changes only the unconnected net and in the next line it returns if the net is unconnected. Still, I wonder if name for the unconnected net matters. What about tests that check if a net name is empty to decide if it is unconnected net or not.
2014-01-09 15:51:47 +01:00
jean-pierre charras 8cca89ffbe Pcbnew: read netlist enhancements: add option to remove single pads nets, add enforce tests to report non existing netnames in zones.
Fix also some very minor errors in comments.
2013-08-24 10:08:55 +02:00
Lorenzo Marcantonio 78e41187b3 Moved utilities for angles in trigo.h
New conversion routines and sin/cos implementation for angles in decidegrees
2013-05-02 20:06:58 +02:00
Wayne Stambaugh 7d0ec1a138 More encapsulation work.
* Complete encapsulation of the MODULE class.
* Complete encapsulation of the EDA_TEXT class.
* Encapsulate most of the ZONE_CONTAINER class.
* Add pcbcommon library as a dependency for reSWIGging the scripting
  support.  This should cover most dependency cases.
2013-03-18 15:36:07 -04:00
Dick Hollenbeck 76e21c28a4 EAGLE_PLUGIN now establishes (trace_min), (via_min_size), (via_min_drill), and Default Net's (clearance)
by groking the eagle *.brd info.  This makes it more probable that fewer DRC errors come about on first 
DRC attempt.
2013-03-14 17:54:47 -05:00
Wayne Stambaugh 8a5ea7ec0d Pcbnew BOARD object encapsulation improvements. 2013-01-09 13:52:44 -05:00
Dick Hollenbeck 5cda6bc1a6 eagle plugin first work 2012-05-20 08:14:46 -05:00
Dick Hollenbeck b8a0ab4c52 switch to <> for includes from "" per conversation with Jean-Pierre and Wayne, adjust search paths 2012-01-22 22:33:36 -06:00
jean-pierre charras 2c150e4817 All: fix compatibility issues with wxWidgets 2.9.3
Minor cosmetic enhancements.
Pcbnew: more workd abput connection algorithms (work in progress)
2011-12-17 22:21:03 +01:00
Dick Hollenbeck 4c2a1dd5d1 more kicad_plugin work, make BOARD::m_NetInfo private 2011-12-09 23:33:24 -06:00
Wayne Stambaugh edd35b4e90 PCB common library header rationalization.
* All header files used to create the PCB common library now compile as
  stand alone code.  This prevents the need to define them in a specific
  order to make source code compile properly.  It should also now be
  possible to relocate the source code to build the common PCB library
  to a separate folder.
2011-09-23 09:57:12 -04:00
jean-pierre charras cdd9e8cabe Pcbnew: code cleanup 2010-11-26 18:47:35 +01:00
Dick Hollenbeck 636b2d301e function comments, fix ones in *.cpp files until they can be deleted if they exist in the headers 2010-11-12 10:36:43 -06:00
charras ae12e69860 fixed a minor problem in pcbnew compiled in DEBUG mode, that prints a lot of error messages when loading a board 2009-10-13 16:29:02 +00:00
charras 7776dd61eb use kbool 2.1 in zones calculations. see CHANGELOG for others changes and more info 2009-09-17 17:48:40 +00:00
dickelbeck 85dc98a58a more netclass work 2009-08-17 02:59:38 +00:00
charras e7c9ae2b45 First work about net classes. This is a work in progress and a moving target 2009-07-18 11:44:19 +00:00
charras 96e0bebd0e code cleaning 2009-06-20 19:09:43 +00:00
charras f43d1aaa54 Added text justification for graphic texts in libedit and more(see changelog) 2009-06-11 14:26:17 +00:00
charras edb48d461b Fixed minor bugs. Code cleaning 2009-06-06 18:08:49 +00:00
charras 483359b39a fixed a problem when loading a module from lib having some pads with an old netname 2009-06-05 15:57:41 +00:00
charras b1d1a71101 Finished code cleaning about ratsnets calculations and handling.
Minor others changes.
2009-05-28 08:42:24 +00:00
charras e073bdc042 Pcbnew: cleaned code in ratsnet calculations (work in progress). The new code is also faster. 2009-05-24 18:28:36 +00:00